* [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
@ 2021-08-10 22:53 Nate DeSimone
2021-08-11 1:56 ` Chiu, Chasel
[not found] ` <169A1DCEF9C635BF.17558@groups.io>
0 siblings, 2 replies; 4+ messages in thread
From: Nate DeSimone @ 2021-08-10 22:53 UTC (permalink / raw)
To: devel; +Cc: Chasel Chiu, Michael Kubacki, Benjamin Doron
The SA GNVS Area contains fields for the MMIO region
base address and length. This implements code to
populate those fields. The MMIO Base/Length are used
by ASL at runtime and must be populated for normal
system operation.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>
Cc: Benjamin Doron <benjamin.doron00@gmail.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../Acpi/BoardAcpiDxe/AcpiGnvsInit.c | 57 ++++++++++++++++++-
.../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 12 +++-
2 files changed, 63 insertions(+), 6 deletions(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
index 0d9d217e38..b09b92f2e6 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
@@ -1,7 +1,7 @@
/** @file
Acpi Gnvs Init Library.
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -11,11 +11,51 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include <Library/PciLib.h>
#include <Library/DebugLib.h>
#include <Library/BaseMemoryLib.h>
+#include <Library/UefiLib.h>
#include <Library/UefiBootServicesTableLib.h>
#include <PchAccess.h>
#include <Protocol/GlobalNvsArea.h>
#include <Protocol/MpService.h>
+#include <Protocol/SaGlobalNvsArea.h>
+
+/**
+ A protocol callback which updates MMIO Base and Length in SA GNVS area
+
+ @param[in] Event - The triggered event.
+ @param[in] Context - Context for this event.
+
+**/
+VOID
+UpdateSaGnvsForMmioResourceBaseLength (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ EFI_STATUS Status;
+ SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL *SaGlobalNvsAreaProtocol;
+
+ Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL, (VOID **) &SaGlobalNvsAreaProtocol);
+ if (Status != EFI_SUCCESS) {
+ return;
+ }
+ gBS->CloseEvent (Event);
+
+ //
+ // Configure MMIO Base/Length. This logic is only valid for platforms that use PciHostBridgeLibSimple.
+ //
+ DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
+ SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32 (PcdPciReservedMemBase);
+ if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
+ SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32 (PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
+ } else {
+ SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32) PcdGet64 (PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
+ }
+ if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64 (PcdPciReservedMemAbove4GBBase)) {
+ SaGlobalNvsAreaProtocol->Area->Mmio64Base = PcdGet64 (PcdPciReservedMemAbove4GBBase);
+ SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64 (PcdPciReservedMemAbove4GBLimit) - PcdGet64 (PcdPciReservedMemAbove4GBBase) + 1;
+ }
+}
/**
@brief
@@ -39,6 +79,7 @@ AcpiGnvsInit (
EFI_MP_SERVICES_PROTOCOL *MpService;
UINTN NumberOfCPUs;
UINTN NumberOfEnabledCPUs;
+ VOID *SaGlobalNvsRegistration;
Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
Address = 0xffffffff; // allocate address below 4G.
@@ -53,7 +94,7 @@ AcpiGnvsInit (
if (EFI_ERROR(Status)) {
return Status;
}
-
+
//
// Locate the MP services protocol
// Find the MP Protocol. This is an MP platform, so MP protocol must be there.
@@ -90,6 +131,16 @@ AcpiGnvsInit (
GNVS->Area->PL1LimitCS = 0;
GNVS->Area->PL1LimitCSValue = 4500;
+ //
+ // Update SA GNVS with MMIO Base/Length
+ //
+ EfiCreateProtocolNotifyEvent (
+ &gSaGlobalNvsAreaProtocolGuid,
+ TPL_CALLBACK,
+ UpdateSaGnvsForMmioResourceBaseLength,
+ NULL,
+ &SaGlobalNvsRegistration
+ );
+
return EFI_SUCCESS;
}
-
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
index 7d2e105e54..5d3d4c3a2b 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe.inf
@@ -1,7 +1,7 @@
### @file
# Component information file for AcpiPlatform module
#
-# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -38,6 +38,7 @@
PcdLib
UefiBootServicesTableLib
UefiRuntimeServicesTableLib
+ UefiLib
BaseMemoryLib
HobLib
AslUpdateLib
@@ -48,8 +49,15 @@
gEfiFirmwareVolume2ProtocolGuid ## CONSUMES
gEfiMpServiceProtocolGuid ## CONSUMES
gEfiGlobalNvsAreaProtocolGuid
+ gSaGlobalNvsAreaProtocolGuid ## CONSUMES
[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
+ gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
+
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiGnvsAddress
gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiSleepState
@@ -65,5 +73,3 @@
gEfiPciRootBridgeIoProtocolGuid AND
gEfiVariableArchProtocolGuid AND
gEfiVariableWriteArchProtocolGuid
-
-
--
2.27.0.windows.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
2021-08-10 22:53 [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS Nate DeSimone
@ 2021-08-11 1:56 ` Chiu, Chasel
[not found] ` <169A1DCEF9C635BF.17558@groups.io>
1 sibling, 0 replies; 4+ messages in thread
From: Chiu, Chasel @ 2021-08-11 1:56 UTC (permalink / raw)
To: Desimone, Nathaniel L, devel@edk2.groups.io
Cc: Michael Kubacki, Benjamin Doron
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
> -----Original Message-----
> From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> Sent: Wednesday, August 11, 2021 6:53 AM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Michael Kubacki
> <Michael.Kubacki@microsoft.com>; Benjamin Doron
> <benjamin.doron00@gmail.com>
> Subject: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO
> Base/Length to SA GNVS
>
> The SA GNVS Area contains fields for the MMIO region base address and
> length. This implements code to populate those fields. The MMIO
> Base/Length are used by ASL at runtime and must be populated for normal
> system operation.
>
> Cc: Chasel Chiu <chasel.chiu@intel.com>
> Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>
> Cc: Benjamin Doron <benjamin.doron00@gmail.com>
> Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> ---
> .../Acpi/BoardAcpiDxe/AcpiGnvsInit.c | 57 ++++++++++++++++++-
> .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 12 +++-
> 2 files changed, 63 insertions(+), 6 deletions(-)
>
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.
> c
> index 0d9d217e38..b09b92f2e6 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> +++
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit
> +++ .c
> @@ -1,7 +1,7 @@
> /** @file
> Acpi Gnvs Init Library.
>
> -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> +Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -11,11 +11,51 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> #include <Library/PciLib.h> #include <Library/DebugLib.h> #include
> <Library/BaseMemoryLib.h>
> +#include <Library/UefiLib.h>
> #include <Library/UefiBootServicesTableLib.h>
>
> #include <PchAccess.h>
> #include <Protocol/GlobalNvsArea.h>
> #include <Protocol/MpService.h>
> +#include <Protocol/SaGlobalNvsArea.h>
> +
> +/**
> + A protocol callback which updates MMIO Base and Length in SA GNVS
> +area
> +
> + @param[in] Event - The triggered event.
> + @param[in] Context - Context for this event.
> +
> +**/
> +VOID
> +UpdateSaGnvsForMmioResourceBaseLength (
> + IN EFI_EVENT Event,
> + IN VOID *Context
> + )
> +{
> + EFI_STATUS Status;
> + SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL
> *SaGlobalNvsAreaProtocol;
> +
> + Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL,
> + (VOID **) &SaGlobalNvsAreaProtocol); if (Status != EFI_SUCCESS) {
> + return;
> + }
> + gBS->CloseEvent (Event);
> +
> + //
> + // Configure MMIO Base/Length. This logic is only valid for platforms that
> use PciHostBridgeLibSimple.
> + //
> + DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
> + SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32
> +(PcdPciReservedMemBase);
> + if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
> + SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32
> +(PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
> + } else {
> + SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32) PcdGet64
> +(PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
> + }
> + if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64
> (PcdPciReservedMemAbove4GBBase)) {
> + SaGlobalNvsAreaProtocol->Area->Mmio64Base = PcdGet64
> (PcdPciReservedMemAbove4GBBase);
> + SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64
> +(PcdPciReservedMemAbove4GBLimit) - PcdGet64
> +(PcdPciReservedMemAbove4GBBase) + 1;
> + }
> +}
>
> /**
> @brief
> @@ -39,6 +79,7 @@ AcpiGnvsInit (
> EFI_MP_SERVICES_PROTOCOL *MpService;
> UINTN NumberOfCPUs;
> UINTN NumberOfEnabledCPUs;
> + VOID *SaGlobalNvsRegistration;
>
> Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
> Address = 0xffffffff; // allocate address below 4G.
> @@ -53,7 +94,7 @@ AcpiGnvsInit (
> if (EFI_ERROR(Status)) {
> return Status;
> }
> -
> +
> //
> // Locate the MP services protocol
> // Find the MP Protocol. This is an MP platform, so MP protocol must be
> there.
> @@ -90,6 +131,16 @@ AcpiGnvsInit (
> GNVS->Area->PL1LimitCS = 0;
> GNVS->Area->PL1LimitCSValue = 4500;
>
> + //
> + // Update SA GNVS with MMIO Base/Length //
> + EfiCreateProtocolNotifyEvent (
> + &gSaGlobalNvsAreaProtocolGuid,
> + TPL_CALLBACK,
> + UpdateSaGnvsForMmioResourceBaseLength,
> + NULL,
> + &SaGlobalNvsRegistration
> + );
> +
> return EFI_SUCCESS;
> }
> -
> diff --git
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> .inf
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> .inf
> index 7d2e105e54..5d3d4c3a2b 100644
> ---
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> .inf
> +++
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> +++ .inf
> @@ -1,7 +1,7 @@
> ### @file
> # Component information file for AcpiPlatform module # -# Copyright (c)
> 2017 - 2019, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2017 - 2021, Intel Corporation. All rights
> +reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,6 +38,7 @@
> PcdLib
> UefiBootServicesTableLib
> UefiRuntimeServicesTableLib
> + UefiLib
> BaseMemoryLib
> HobLib
> AslUpdateLib
> @@ -48,8 +49,15 @@
> gEfiFirmwareVolume2ProtocolGuid ## CONSUMES
> gEfiMpServiceProtocolGuid ## CONSUMES
> gEfiGlobalNvsAreaProtocolGuid
> + gSaGlobalNvsAreaProtocolGuid ## CONSUMES
>
> [Pcd]
> + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
> + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
> +
> gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiGnvsAddress
>
> gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiSleepState
> @@ -65,5 +73,3 @@
> gEfiPciRootBridgeIoProtocolGuid AND
> gEfiVariableArchProtocolGuid AND
> gEfiVariableWriteArchProtocolGuid
> -
> -
> --
> 2.27.0.windows.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
[not found] ` <169A1DCEF9C635BF.17558@groups.io>
@ 2021-08-11 3:24 ` Chiu, Chasel
2021-08-11 3:48 ` Nate DeSimone
0 siblings, 1 reply; 4+ messages in thread
From: Chiu, Chasel @ 2021-08-11 3:24 UTC (permalink / raw)
To: devel@edk2.groups.io, Chiu, Chasel, Desimone, Nathaniel L
Cc: Michael Kubacki, Benjamin Doron
Hi Nate,
Internal test case failed, please see below inline for comments.
Thanks,
Chasel
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu,
> Chasel
> Sent: Wednesday, August 11, 2021 9:56 AM
> To: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>;
> devel@edk2.groups.io
> Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>; Benjamin Doron
> <benjamin.doron00@gmail.com>
> Subject: Re: [edk2-devel] [edk2-platforms] [PATCH V1]
> KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
>
>
> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
>
> > -----Original Message-----
> > From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> > Sent: Wednesday, August 11, 2021 6:53 AM
> > To: devel@edk2.groups.io
> > Cc: Chiu, Chasel <chasel.chiu@intel.com>; Michael Kubacki
> > <Michael.Kubacki@microsoft.com>; Benjamin Doron
> > <benjamin.doron00@gmail.com>
> > Subject: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO
> > Base/Length to SA GNVS
> >
> > The SA GNVS Area contains fields for the MMIO region base address and
> > length. This implements code to populate those fields. The MMIO
> > Base/Length are used by ASL at runtime and must be populated for
> > normal system operation.
> >
> > Cc: Chasel Chiu <chasel.chiu@intel.com>
> > Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>
> > Cc: Benjamin Doron <benjamin.doron00@gmail.com>
> > Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> > ---
> > .../Acpi/BoardAcpiDxe/AcpiGnvsInit.c | 57 ++++++++++++++++++-
> > .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 12 +++-
> > 2 files changed, 63 insertions(+), 6 deletions(-)
> >
> > diff --git
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.
> > c
> > index 0d9d217e38..b09b92f2e6 100644
> > ---
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> > +++
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit
> > +++ .c
> > @@ -1,7 +1,7 @@
> > /** @file
> > Acpi Gnvs Init Library.
> >
> > -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> > +Copyright (c) 2017 - 2021, Intel Corporation. All rights
> > +reserved.<BR>
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > **/
> > @@ -11,11 +11,51 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #include <Library/PciLib.h> #include <Library/DebugLib.h> #include
> > <Library/BaseMemoryLib.h>
> > +#include <Library/UefiLib.h>
> > #include <Library/UefiBootServicesTableLib.h>
> >
> > #include <PchAccess.h>
> > #include <Protocol/GlobalNvsArea.h>
> > #include <Protocol/MpService.h>
> > +#include <Protocol/SaGlobalNvsArea.h>
> > +
> > +/**
> > + A protocol callback which updates MMIO Base and Length in SA GNVS
> > +area
> > +
> > + @param[in] Event - The triggered event.
> > + @param[in] Context - Context for this event.
> > +
> > +**/
> > +VOID
> > +UpdateSaGnvsForMmioResourceBaseLength (
> > + IN EFI_EVENT Event,
> > + IN VOID *Context
> > + )
Should we add EFIAPI to this function?
> > +{
> > + EFI_STATUS Status;
> > + SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL
> > *SaGlobalNvsAreaProtocol;
> > +
> > + Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid, NULL,
> > + (VOID **) &SaGlobalNvsAreaProtocol); if (Status != EFI_SUCCESS) {
> > + return;
> > + }
> > + gBS->CloseEvent (Event);
> > +
> > + //
> > + // Configure MMIO Base/Length. This logic is only valid for
> > + platforms that
> > use PciHostBridgeLibSimple.
> > + //
> > + DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
> > + SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32
> > +(PcdPciReservedMemBase);
> > + if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
> > + SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32
> > +(PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
> > + } else {
> > + SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32) PcdGet64
> > +(PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
> > + }
> > + if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64
> > (PcdPciReservedMemAbove4GBBase)) {
> > + SaGlobalNvsAreaProtocol->Area->Mmio64Base = PcdGet64
> > (PcdPciReservedMemAbove4GBBase);
> > + SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64
> > +(PcdPciReservedMemAbove4GBLimit) - PcdGet64
> > +(PcdPciReservedMemAbove4GBBase) + 1;
> > + }
> > +}
> >
> > /**
> > @brief
> > @@ -39,6 +79,7 @@ AcpiGnvsInit (
> > EFI_MP_SERVICES_PROTOCOL *MpService;
> > UINTN NumberOfCPUs;
> > UINTN NumberOfEnabledCPUs;
> > + VOID *SaGlobalNvsRegistration;
> >
> > Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
> > Address = 0xffffffff; // allocate address below 4G.
> > @@ -53,7 +94,7 @@ AcpiGnvsInit (
> > if (EFI_ERROR(Status)) {
> > return Status;
> > }
> > -
> > +
> > //
> > // Locate the MP services protocol
> > // Find the MP Protocol. This is an MP platform, so MP protocol
> > must be there.
> > @@ -90,6 +131,16 @@ AcpiGnvsInit (
> > GNVS->Area->PL1LimitCS = 0;
> > GNVS->Area->PL1LimitCSValue = 4500;
> >
> > + //
> > + // Update SA GNVS with MMIO Base/Length //
> > + EfiCreateProtocolNotifyEvent (
> > + &gSaGlobalNvsAreaProtocolGuid,
> > + TPL_CALLBACK,
> > + UpdateSaGnvsForMmioResourceBaseLength,
> > + NULL,
> > + &SaGlobalNvsRegistration
> > + );
The build failure is here, please help to fix it:
/edk2-platforms/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c:140:5: error: passing argument 3 of 'EfiCreateProtocolNotifyEvent' from incompatible pointer type [-Werror=incompatible-pointer-types]/edk2-platforms/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c:14:0:
/edk2/MdePkg/Include/Library/UefiLib.h:168:1: note: expected 'EFI_EVENT_NOTIFY' but argument is of type 'void (*)(void *, void *)'
EfiCreateProtocolNotifyEvent(
> > +
> > return EFI_SUCCESS;
> > }
> > -
> > diff --git
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > .inf
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > .inf
> > index 7d2e105e54..5d3d4c3a2b 100644
> > ---
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > .inf
> > +++
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > +++ .inf
> > @@ -1,7 +1,7 @@
> > ### @file
> > # Component information file for AcpiPlatform module # -# Copyright
> > (c)
> > 2017 - 2019, Intel Corporation. All rights reserved.<BR>
> > +# Copyright (c) 2017 - 2021, Intel Corporation. All rights
> > +reserved.<BR>
> > #
> > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,6 +38,7 @@
> > PcdLib
> > UefiBootServicesTableLib
> > UefiRuntimeServicesTableLib
> > + UefiLib
> > BaseMemoryLib
> > HobLib
> > AslUpdateLib
> > @@ -48,8 +49,15 @@
> > gEfiFirmwareVolume2ProtocolGuid ## CONSUMES
> > gEfiMpServiceProtocolGuid ## CONSUMES
> > gEfiGlobalNvsAreaProtocolGuid
> > + gSaGlobalNvsAreaProtocolGuid ## CONSUMES
> >
> > [Pcd]
> > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
> > +
> > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiGnvsAddress
> >
> > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiSleepState
> > @@ -65,5 +73,3 @@
> > gEfiPciRootBridgeIoProtocolGuid AND
> > gEfiVariableArchProtocolGuid AND
> > gEfiVariableWriteArchProtocolGuid
> > -
> > -
> > --
> > 2.27.0.windows.1
>
>
>
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [edk2-devel] [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
2021-08-11 3:24 ` [edk2-devel] " Chiu, Chasel
@ 2021-08-11 3:48 ` Nate DeSimone
0 siblings, 0 replies; 4+ messages in thread
From: Nate DeSimone @ 2021-08-11 3:48 UTC (permalink / raw)
To: Chiu, Chasel, devel@edk2.groups.io; +Cc: Michael Kubacki, Benjamin Doron
Thank you for letting me know Chasel, please see PATCH V2 for the fix.
Thanks,
Nate
-----Original Message-----
From: Chiu, Chasel <chasel.chiu@intel.com>
Sent: Tuesday, August 10, 2021 8:25 PM
To: devel@edk2.groups.io; Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>; Benjamin Doron <benjamin.doron00@gmail.com>
Subject: RE: [edk2-devel] [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
Hi Nate,
Internal test case failed, please see below inline for comments.
Thanks,
Chasel
> -----Original Message-----
> From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Chiu,
> Chasel
> Sent: Wednesday, August 11, 2021 9:56 AM
> To: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>;
> devel@edk2.groups.io
> Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>; Benjamin Doron
> <benjamin.doron00@gmail.com>
> Subject: Re: [edk2-devel] [edk2-platforms] [PATCH V1]
> KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS
>
>
> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
>
> > -----Original Message-----
> > From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
> > Sent: Wednesday, August 11, 2021 6:53 AM
> > To: devel@edk2.groups.io
> > Cc: Chiu, Chasel <chasel.chiu@intel.com>; Michael Kubacki
> > <Michael.Kubacki@microsoft.com>; Benjamin Doron
> > <benjamin.doron00@gmail.com>
> > Subject: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO
> > Base/Length to SA GNVS
> >
> > The SA GNVS Area contains fields for the MMIO region base address
> > and length. This implements code to populate those fields. The MMIO
> > Base/Length are used by ASL at runtime and must be populated for
> > normal system operation.
> >
> > Cc: Chasel Chiu <chasel.chiu@intel.com>
> > Cc: Michael Kubacki <Michael.Kubacki@microsoft.com>
> > Cc: Benjamin Doron <benjamin.doron00@gmail.com>
> > Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
> > ---
> > .../Acpi/BoardAcpiDxe/AcpiGnvsInit.c | 57 ++++++++++++++++++-
> > .../Acpi/BoardAcpiDxe/BoardAcpiDxe.inf | 12 +++-
> > 2 files changed, 63 insertions(+), 6 deletions(-)
> >
> > diff --git
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.
> > c
> > index 0d9d217e38..b09b92f2e6 100644
> > ---
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c
> > +++
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit
> > +++ .c
> > @@ -1,7 +1,7 @@
> > /** @file
> > Acpi Gnvs Init Library.
> >
> > -Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
> > +Copyright (c) 2017 - 2021, Intel Corporation. All rights
> > +reserved.<BR>
> > SPDX-License-Identifier: BSD-2-Clause-Patent
> >
> > **/
> > @@ -11,11 +11,51 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
> > #include <Library/PciLib.h> #include <Library/DebugLib.h> #include
> > <Library/BaseMemoryLib.h>
> > +#include <Library/UefiLib.h>
> > #include <Library/UefiBootServicesTableLib.h>
> >
> > #include <PchAccess.h>
> > #include <Protocol/GlobalNvsArea.h> #include
> > <Protocol/MpService.h>
> > +#include <Protocol/SaGlobalNvsArea.h>
> > +
> > +/**
> > + A protocol callback which updates MMIO Base and Length in SA GNVS
> > +area
> > +
> > + @param[in] Event - The triggered event.
> > + @param[in] Context - Context for this event.
> > +
> > +**/
> > +VOID
> > +UpdateSaGnvsForMmioResourceBaseLength (
> > + IN EFI_EVENT Event,
> > + IN VOID *Context
> > + )
Should we add EFIAPI to this function?
> > +{
> > + EFI_STATUS Status;
> > + SYSTEM_AGENT_GLOBAL_NVS_AREA_PROTOCOL
> > *SaGlobalNvsAreaProtocol;
> > +
> > + Status = gBS->LocateProtocol (&gSaGlobalNvsAreaProtocolGuid,
> > + NULL, (VOID **) &SaGlobalNvsAreaProtocol); if (Status != EFI_SUCCESS) {
> > + return;
> > + }
> > + gBS->CloseEvent (Event);
> > +
> > + //
> > + // Configure MMIO Base/Length. This logic is only valid for
> > + platforms that
> > use PciHostBridgeLibSimple.
> > + //
> > + DEBUG ((DEBUG_INFO, "[BoardAcpiDxe] Update SA GNVS Area.\n"));
> > + SaGlobalNvsAreaProtocol->Area->Mmio32Base = PcdGet32
> > +(PcdPciReservedMemBase);
> > + if (PcdGet32 (PcdPciReservedMemLimit) != 0) {
> > + SaGlobalNvsAreaProtocol->Area->Mmio32Length = PcdGet32
> > +(PcdPciReservedMemLimit) - PcdGet32 (PcdPciReservedMemBase) + 1;
> > + } else {
> > + SaGlobalNvsAreaProtocol->Area->Mmio32Length = ((UINT32)
> > +PcdGet64
> > +(PcdPciExpressBaseAddress)) - PcdGet32 (PcdPciReservedMemBase);
> > + }
> > + if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64
> > (PcdPciReservedMemAbove4GBBase)) {
> > + SaGlobalNvsAreaProtocol->Area->Mmio64Base = PcdGet64
> > (PcdPciReservedMemAbove4GBBase);
> > + SaGlobalNvsAreaProtocol->Area->Mmio64Length = PcdGet64
> > +(PcdPciReservedMemAbove4GBLimit) - PcdGet64
> > +(PcdPciReservedMemAbove4GBBase) + 1;
> > + }
> > +}
> >
> > /**
> > @brief
> > @@ -39,6 +79,7 @@ AcpiGnvsInit (
> > EFI_MP_SERVICES_PROTOCOL *MpService;
> > UINTN NumberOfCPUs;
> > UINTN NumberOfEnabledCPUs;
> > + VOID *SaGlobalNvsRegistration;
> >
> > Pages = EFI_SIZE_TO_PAGES (sizeof (EFI_GLOBAL_NVS_AREA));
> > Address = 0xffffffff; // allocate address below 4G.
> > @@ -53,7 +94,7 @@ AcpiGnvsInit (
> > if (EFI_ERROR(Status)) {
> > return Status;
> > }
> > -
> > +
> > //
> > // Locate the MP services protocol
> > // Find the MP Protocol. This is an MP platform, so MP protocol
> > must be there.
> > @@ -90,6 +131,16 @@ AcpiGnvsInit (
> > GNVS->Area->PL1LimitCS = 0;
> > GNVS->Area->PL1LimitCSValue = 4500;
> >
> > + //
> > + // Update SA GNVS with MMIO Base/Length //
> > + EfiCreateProtocolNotifyEvent (
> > + &gSaGlobalNvsAreaProtocolGuid,
> > + TPL_CALLBACK,
> > + UpdateSaGnvsForMmioResourceBaseLength,
> > + NULL,
> > + &SaGlobalNvsRegistration
> > + );
The build failure is here, please help to fix it:
/edk2-platforms/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c:140:5: error: passing argument 3 of 'EfiCreateProtocolNotifyEvent' from incompatible pointer type [-Werror=incompatible-pointer-types]/edk2-platforms/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/AcpiGnvsInit.c:14:0:
/edk2/MdePkg/Include/Library/UefiLib.h:168:1: note: expected 'EFI_EVENT_NOTIFY' but argument is of type 'void (*)(void *, void *)'
EfiCreateProtocolNotifyEvent(
> > +
> > return EFI_SUCCESS;
> > }
> > -
> > diff --git
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > .inf
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > .inf
> > index 7d2e105e54..5d3d4c3a2b 100644
> > ---
> >
> a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > .inf
> > +++
> >
> b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/BoardAcpiDxe
> > +++ .inf
> > @@ -1,7 +1,7 @@
> > ### @file
> > # Component information file for AcpiPlatform module # -#
> > Copyright
> > (c)
> > 2017 - 2019, Intel Corporation. All rights reserved.<BR>
> > +# Copyright (c) 2017 - 2021, Intel Corporation. All rights
> > +reserved.<BR>
> > #
> > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -38,6 +38,7 @@
> > PcdLib
> > UefiBootServicesTableLib
> > UefiRuntimeServicesTableLib
> > + UefiLib
> > BaseMemoryLib
> > HobLib
> > AslUpdateLib
> > @@ -48,8 +49,15 @@
> > gEfiFirmwareVolume2ProtocolGuid ## CONSUMES
> > gEfiMpServiceProtocolGuid ## CONSUMES
> > gEfiGlobalNvsAreaProtocolGuid
> > + gSaGlobalNvsAreaProtocolGuid ## CONSUMES
> >
> > [Pcd]
> > + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemBase
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemLimit
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase
> > + gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit
> > +
> > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiGnvsAddress
> >
> > gKabylakeOpenBoardPkgTokenSpaceGuid.PcdAcpiSleepState
> > @@ -65,5 +73,3 @@
> > gEfiPciRootBridgeIoProtocolGuid AND
> > gEfiVariableArchProtocolGuid AND
> > gEfiVariableWriteArchProtocolGuid
> > -
> > -
> > --
> > 2.27.0.windows.1
>
>
>
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2021-08-11 3:48 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2021-08-10 22:53 [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Add MMIO Base/Length to SA GNVS Nate DeSimone
2021-08-11 1:56 ` Chiu, Chasel
[not found] ` <169A1DCEF9C635BF.17558@groups.io>
2021-08-11 3:24 ` [edk2-devel] " Chiu, Chasel
2021-08-11 3:48 ` Nate DeSimone
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox