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From: "Chiu, Chasel" <chasel.chiu@intel.com>
To: "Ni, Ray" <ray.ni@intel.com>,
	"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
	"Zeng, Star" <star.zeng@intel.com>
Subject: Re: [PATCH v2] IntelFsp2Pkg: LoadMicrocodeDefault() causing unnecessary delay.
Date: Thu, 30 Mar 2023 15:29:58 +0000	[thread overview]
Message-ID: <BN9PR11MB54834115576E82ABB32E7CA2E68E9@BN9PR11MB5483.namprd11.prod.outlook.com> (raw)
In-Reply-To: <MN6PR11MB82441069219D03817E7EC0378C8E9@MN6PR11MB8244.namprd11.prod.outlook.com>


Thanks for reviewing Ray!
Please see my reply below inline.


> -----Original Message-----
> From: Ni, Ray <ray.ni@intel.com>
> Sent: Wednesday, March 29, 2023 10:31 PM
> To: Chiu, Chasel <chasel.chiu@intel.com>; devel@edk2.groups.io
> Cc: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>; Zeng, Star
> <star.zeng@intel.com>
> Subject: RE: [PATCH v2] IntelFsp2Pkg: LoadMicrocodeDefault() causing
> unnecessary delay.
> 
> >
> > +   mov   eax, 1
> >
> > +   cpuid
> >
> > +   mov   ecx, MSR_IA32_BIOS_SIGN_ID
> >
> > +   rdmsr                         ; Get current microcode signature
> >
> > +   xor   eax, eax
> >
> > +   test  edx, edx
> >
> > +   jnz   Exit2
> >
> 1. SDM uses following assembly to read current microcode signature.
> 
> Example 10-9. Assembly Code to Retrieve the Update Revision MOV ECX,
> 08BH ;IA32_BIOS_SIGN_ID XOR EAX, EAX ;clear EAX XOR EDX, EDX ;clear EDX
> WRMSR ;Load 0 to MSR at 8BH MOV EAX, 1 Cupid MOV ECX,
> 08BH ;IA32_BIOS_SIGN_ID rdmsr ;Read Model Specific Register
> 
> 
> Comparing against yours, I think there are two diffs:
> 1). you missed the write-zero to msr 8b


I will add this back.


> 2). you cleared RAX (I don't know why)


This is for returning 0 (EFI_SUCCESS) to caller when microcode already loaded.



> 
> And the existing code "LoadCheck:" actually contains exactly the SDM
> recommended logic to get current microcode revision.
> Why not use that directly?
> 
> > -   je    Continue
> >
> > +   je    Done ; if already one version microcode loaded, go to done
> 
> 2. You changed another behavior: from load all microcodes to load one only.
> Can you separate it in a standalone patch and explain in commit?
> I guess since the 1st check you added will skip loading when cpu microcode
> revision is not 0, so the change here is to align with that behavior.



This is another optimization for reducing unnecessary delay and I explained this in commit message (second line).
Because that we usually only put one version microcode for one CPU in FV, if LoadMicrocodeDefault() already found one matching microcode and attempted to load it, then it should return with either SUCCESS or ERROR and no need to parse rest of the microcode files in FV. 

Commit message:
FSP should support the scenario that CPU microcode already loaded before calling LoadMicrocodeDefault(), in this case it should return directly without spending more time.
Also the LoadMicrocodeDefault() should only attempt to load one version of the microcode for current CPU and return.







      reply	other threads:[~2023-03-30 15:30 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-29 15:43 [PATCH v2] IntelFsp2Pkg: LoadMicrocodeDefault() causing unnecessary delay Chiu, Chasel
2023-03-30  3:21 ` [edk2-devel] " Kuo, Ted
2023-03-30  5:30 ` Ni, Ray
2023-03-30 15:29   ` Chiu, Chasel [this message]

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