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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks for the comments. Updated inline. Thanks, Dun -----Original Message----- From: Ni, Ray =20 Sent: Tuesday, April 25, 2023 2:14 PM To: Tan, Dun ; devel@edk2.groups.io Cc: Dong, Eric ; Kumar, Rahul R ; Gerd Hoffmann ; Chen, Xiao X Subject: RE: [PATCH 2/3] UefiCpuPkg: Update PT code to support enable colle= ct performance 1. ProcessorTrace capabilities might differ in different cpu threads. So, the capabilities detection needs to be done in ProcTraceSupport() which= runs on each AP. Dun: Sure, I'll add two new fields in PROC_TRACE_DATA and update the fields= in ProcTraceSupport(). 2. TSCEn is not guarded by Ebx.Bits.ConfigurablePsb, right? Dun: Yes, Ebx.Bits.ConfigurablePsb is only for CYC. TSCEn is always support= ed. But I think if CYC is not supported, we don't need to enable CYC, right= ? 3. Why do you need to clear the CYCEn/CYCThresh/TSCEn bit when the ProcTrac= eEnablePerformanceCollecting is FALSE? Dun: Seems this part is not needed. I'll remove the code that clear the the= CYCEn/CYCThresh/TSCEn bits. 4. Please use a PCD name that's consistent with existing ones. Such as: Pcd= CpuProcTracePerformanceCollecting?=20 Dun: Ok, I'll update it. > -----Original Message----- > From: Tan, Dun > Sent: Tuesday, April 25, 2023 1:48 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ;=20 > Kumar, Rahul R ; Gerd Hoffmann=20 > ; Chen, Xiao X > Subject: [PATCH 2/3] UefiCpuPkg: Update PT code to support enable=20 > collect performance >=20 > Update ProcTrace feature code to support enable collect performance=20 > data by generating CYC and TSC packets. Add a new dynamic PCD to=20 > indicate if enable performance collecting. In ProcTrace.c code, if=20 > this new PCD is true, CYC and TSC packets will be generated by setting=20 > the corresponding MSR bits feilds. >=20 > Bugzila: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4423 > Signed-off-by: Dun Tan > Cc: Eric Dong > Cc: Ray Ni > Cc: Rahul Kumar > Cc: Gerd Hoffmann > Cc: Xiao X Chen > --- > UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf | > 1 + > UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c | 66 > +++++++++++++++++++++++++++++++++++++++++++++++------------------ > - > UefiCpuPkg/UefiCpuPkg.dec | 8 ++= ++++++ > 3 files changed, 56 insertions(+), 19 deletions(-) >=20 > diff --git > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > index 319c8b4842..e31c1e7317 100644 > --- > a/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > +++ > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/CpuCommonFeaturesLib.inf > @@ -63,3 +63,4 @@ > gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceOutputScheme ## > SOMETIMES_CONSUMES > gUefiCpuPkgTokenSpaceGuid.PcdCpuProcTraceMemSize ## > SOMETIMES_CONSUMES > gUefiCpuPkgTokenSpaceGuid.PcdEnableProcessorTraceOnBspOnly ## > SOMETIMES_CONSUMES > + gUefiCpuPkgTokenSpaceGuid.ProcTraceEnablePerformanceCollecting ## > SOMETIMES_CONSUMES > diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > index f57544bf7d..1a101b7288 100644 > --- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > +++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/ProcTrace.c > @@ -171,25 +171,26 @@ ProcTraceInitialize ( > IN BOOLEAN State > ) > { > - UINT32 MemRegionSize; > - UINTN Pages; > - UINTN Alignment; > - UINTN MemRegionBaseAddr; > - UINTN *ThreadMemRegionTable; > - UINTN Index; > - UINTN TopaTableBaseAddr; > - UINTN AlignedAddress; > - UINTN *TopaMemArray; > - PROC_TRACE_TOPA_TABLE *TopaTable; > - PROC_TRACE_DATA *ProcTraceData; > - BOOLEAN FirstIn; > - MSR_IA32_RTIT_CTL_REGISTER CtrlReg; > - MSR_IA32_RTIT_STATUS_REGISTER StatusReg; > - MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg; > - MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg; > - RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr; > - BOOLEAN IsBsp; > - BOOLEAN EnableOnBspOnly; > + UINT32 MemRegionSize; > + UINTN Pages; > + UINTN Alignment; > + UINTN MemRegionBaseAddr; > + UINTN *ThreadMemRegionTable; > + UINTN Index; > + UINTN TopaTableBaseAddr; > + UINTN AlignedAddress; > + UINTN *TopaMemArray; > + PROC_TRACE_TOPA_TABLE *TopaTable; > + PROC_TRACE_DATA *ProcTraceData; > + BOOLEAN FirstIn; > + MSR_IA32_RTIT_CTL_REGISTER CtrlReg; > + MSR_IA32_RTIT_STATUS_REGISTER StatusReg; > + MSR_IA32_RTIT_OUTPUT_BASE_REGISTER OutputBaseReg; > + MSR_IA32_RTIT_OUTPUT_MASK_PTRS_REGISTER OutputMaskPtrsReg; > + RTIT_TOPA_TABLE_ENTRY *TopaEntryPtr; > + BOOLEAN IsBsp; > + BOOLEAN EnableOnBspOnly; > + CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF_EBX Ebx; >=20 > // > // The scope of the MSR_IA32_RTIT_* is core for below processor=20 > type, only program @@ -510,6 +511,33 @@ ProcTraceInitialize ( > CtrlReg.Bits.User =3D 1; > CtrlReg.Bits.BranchEn =3D 1; > CtrlReg.Bits.TraceEn =3D 1; > + > + AsmCpuidEx (CPUID_INTEL_PROCESSOR_TRACE, > CPUID_INTEL_PROCESSOR_TRACE_MAIN_LEAF, NULL, &Ebx.Uint32, NULL, NULL); > + > + // > + // Generate CYC/TSC timing packets to to collect performance data. > + // > + if (PcdGetBool (ProcTraceEnablePerformanceCollecting)) { > + if (Ebx.Bits.ConfigurablePsb =3D=3D 1) { > + CtrlReg.Bits.CYCEn =3D 1; > + CtrlReg.Bits.CYCThresh =3D 5; > + > + // > + // Write to TSCEn is always supported > + // > + CtrlReg.Bits.TSCEn =3D 1; > + } else { > + DEBUG ((DEBUG_INFO, "ProcTrace: CYC packet is not supported.=20 > + Failed > to enable Performance Collecting \n")); > + } > + } else { > + if (Ebx.Bits.ConfigurablePsb =3D=3D 1) { > + CtrlReg.Bits.CYCEn =3D 0; > + CtrlReg.Bits.CYCThresh =3D 0; > + } > + > + CtrlReg.Bits.TSCEn =3D 0; > + } > + > CPU_REGISTER_TABLE_WRITE64 ( > ProcessorNumber, > Msr, > diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec=20 > index 1a4b9333ab..2b0de6d5c3 100644 > --- a/UefiCpuPkg/UefiCpuPkg.dec > +++ b/UefiCpuPkg/UefiCpuPkg.dec > @@ -429,5 +429,13 @@ > # @Prompt Enable CPU processor trace only on BSP. >=20 > gUefiCpuPkgTokenSpaceGuid.PcdEnableProcessorTraceOnBspOnly|FALSE|B > OOLEAN|0x60000019 >=20 > + ## This PCD indicates if enable performance collecting when CPU > processor trace is enabled.

> + # CYC/TSC timing packets will be generated to collect performance=20 > + data if > this PCD is TRUE. > + # This PCD is ignored if CPU processor trace is disabled.

=20 > + # TRUE - Performance collecting will be enabled in processor=20 > + trace.
# FASLE - Performance collecting will be disabled in=20 > + processor trace.
# @Prompt Enable performance collecting when=20 > + processor trace is > enabled. > + > gUefiCpuPkgTokenSpaceGuid.ProcTraceEnablePerformanceCollecting|FALSE > |BOOLEAN|0x60000020 > + > [UserExtensions.TianoCore."ExtraFiles"] > UefiCpuPkgExtra.uni > -- > 2.39.1.windows.1