From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by mx.groups.io with SMTP id smtpd.web08.12898.1612057110529534913 for ; Sat, 30 Jan 2021 17:38:31 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.onmicrosoft.com header.s=selector2-intel-onmicrosoft-com header.b=xjtrOKNl; spf=pass (domain: intel.com, ip: 192.55.52.151, mailfrom: jiewen.yao@intel.com) IronPort-SDR: h3UAVlGeKn12WtEgeXFvLQkHBvQh0PrvewjaKZMgESSgXvJID8pLUw4or2PBjdz93WWEONsZwc HM7JC2n1K71g== X-IronPort-AV: E=McAfee;i="6000,8403,9880"; a="160330736" X-IronPort-AV: E=Sophos;i="5.79,389,1602572400"; d="scan'208";a="160330736" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Jan 2021 17:38:29 -0800 IronPort-SDR: 7cpmp4BV7a1OSOZWydAqKRcw48nCp6V6xFRoChHSiNSF10aHJz/uwBuW8oEp5ie5fHK8rS1QhT hxaAxpnk9gGQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,389,1602572400"; d="scan'208";a="395199663" Received: from orsmsx604.amr.corp.intel.com ([10.22.229.17]) by orsmga007.jf.intel.com with ESMTP; 30 Jan 2021 17:38:29 -0800 Received: from orsmsx610.amr.corp.intel.com (10.22.229.23) by ORSMSX604.amr.corp.intel.com (10.22.229.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Sat, 30 Jan 2021 17:38:28 -0800 Received: from orsedg603.ED.cps.intel.com (10.7.248.4) by orsmsx610.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2 via Frontend Transport; Sat, 30 Jan 2021 17:38:28 -0800 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (104.47.36.54) by edgegateway.intel.com (134.134.137.100) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.1713.5; Sat, 30 Jan 2021 17:38:26 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BapdojRNBh2wTUbyfU4k/t5TnQvq+ov/TauKfhC6nRoyS6K1C125Ae7exc08OdRmGMufr9XYYYm8WcR+uBfLxf3OkOi1P1d5St3FXnjqRTNrL+gzsfWyY+nezryumyj7wxNJA5v1tLpJFD8yuR8z+NMf34o1+VlRXysDsAHk5RMmtqDTq3MhPhvZg8aiVTDEtPLjs/WQfWE9zFjbptF9LgFYwVj8Bg3H9b0Q2BQlzuDI13hMRtDI/p7P4QgvfFUmBFhdlOAKFhZ/aVW5o5b7jAYIJvuQ/fri/bVTef3dseijWaVPh1fM38n6KsU0wA2wNGi0DPE5gKa8D+H1VGbZGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ExxwpPy7lDhIi5nixs5qZwU6GWmcOtAWNF9XptTp1q4=; b=cv64aVdfSyjmCbtOrjMJ72doYlXq6QaBRb3x/C4hSDLXxRO4ig3BY4tyKwX0wQyRV6+xYGyHSWP8go3p8Xd83oJdI2+jm5AxLO8STC1/cnwJMQLrHH6/9znJXkAFWicAyAbI5/42VP/4esTXnDU1uOlxd7dKwg4NoJWN7QD0Bbq6i9JIEhFPKKhr/ZHQDUJ2agPJkLCZtJKXCl7t254zVuaJHFu3oXkAFON+hxPaehy7DWndtBT4KvfvppIfwjIMlb3lVRr7tu3zSAFqZg8X6LRH+D3knFK3rVx8xPhZkOgwH/ImwWMizY/FHanXHMDyCBa13gRAWFCOcUUDXpErfw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ExxwpPy7lDhIi5nixs5qZwU6GWmcOtAWNF9XptTp1q4=; b=xjtrOKNlOwe57+lXXHQwMgGKSPe3NibAZVT6/JHky8jPkbegwLvqxX5TdVjqb7YlfM75+Ymy8vruRuPhA+Q/MbvXQVmx2C1Jo6yqnhPvfoBluXEOSivzGEfmZfl9wT75xf3mKjF+Y4wBx9QByPdG5u1V/HhlRQvFA5z9d7wWUxQ= Received: from BY5PR11MB4166.namprd11.prod.outlook.com (2603:10b6:a03:191::25) by BYAPR11MB3320.namprd11.prod.outlook.com (2603:10b6:a03:18::25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3784.17; Sun, 31 Jan 2021 01:38:24 +0000 Received: from BY5PR11MB4166.namprd11.prod.outlook.com ([fe80::5983:f233:56d6:8132]) by BY5PR11MB4166.namprd11.prod.outlook.com ([fe80::5983:f233:56d6:8132%4]) with mapi id 15.20.3805.024; Sun, 31 Jan 2021 01:38:24 +0000 From: "Yao, Jiewen" To: "Sheng, W" , "devel@edk2.groups.io" CC: "Dong, Eric" , "Ni, Ray" , "Laszlo Ersek" , "Kumar, Rahul1" , "Yao, Jiewen" Subject: Re: [PATCH 2/2] UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow stack token busy bit Thread-Topic: [PATCH 2/2] UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow stack token busy bit Thread-Index: AQHW9hTDzcMmsj/tkEKUsKDvi1/UrKpA8IQw Date: Sun, 31 Jan 2021 01:38:24 +0000 Message-ID: References: <20210129075946.31684-1-w.sheng@intel.com> <20210129075946.31684-3-w.sheng@intel.com> In-Reply-To: <20210129075946.31684-3-w.sheng@intel.com> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [101.87.139.49] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: c36934da-c624-4189-7df0-08d8c588e66a x-ms-traffictypediagnostic: BYAPR11MB3320: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 3s+IZKYi5ndjVUkmv53I54D8ANNwj++GiRdk3CWZuD72j/PhDE/4lVvNbw30A9civBJsqoDNHf78n5yTE67W4y6+mni0sCjfAJdeNSGfLpJw3FD0fEdRNVmF8tsBbAkUSbn0iCFqn3WKYQiVD7b/RGcRlJFq9sCzaqIYcSAG5bGUA5KJzZ519+ClDBGctxZbbHacPXPcH/DxrR5gYJ84lf5qFheOn/EDQ0kWx/d2bry/sO9H05RWXfnUrKzee01CyzjemLbudBfYvLw2nTh1zbbeC/h0RYAvtfa62FGZ9ImE+qb48n30XGoPFUM4XnHLMa7FqykR4GttJitiOw7A6tbzxhRhaB//7PVWJXCqK8V1T8dI3o/8TfrtRNtyNlSz4DmX8C9pDz/yN90LtZ4FUsITQ/gW/OcQgeFrU0MWpDIP7wArDr42Ta+P3PnKg1CsqloFGkO+vjRsNYaulZqi1ss0OxhcSBqXyK0YO1M/amwXLJuoGBIBoP94D/7AHUANnBtzOwKmEVzNyMFJ+EpRiO2Z74FnkyCclEmgSvk+ubKbZVhRGYMyNgHv/VSO7IpkrqvQMwH4XeyJL1z8ICZuZ9cMZik75s/8i4oPaVhYnRo= x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BY5PR11MB4166.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(136003)(366004)(376002)(396003)(39860400002)(346002)(83380400001)(52536014)(316002)(4326008)(8676002)(54906003)(86362001)(55016002)(9686003)(6506007)(66446008)(19627235002)(5660300002)(53546011)(66946007)(966005)(186003)(478600001)(71200400001)(2906002)(64756008)(110136005)(7696005)(66556008)(107886003)(66476007)(26005)(8936002)(33656002)(76116006);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata: =?us-ascii?Q?xEapXiekU+Xd/oQJEXmDIh2tv96IaQfWyxQR19jkrem3KI3LcQA1fYWTITz6?= =?us-ascii?Q?tAwXs1tH0Z6N4FpX0wEhBZlaX9JX/OISYTU5kCLg0WC2cC4VbG1oZBke+h/t?= =?us-ascii?Q?lVBP6I34B0+tBBfrU2MNkOoJ6QaKNuZwHXwa07nPcn4jLU7nfdx6nduDgWl9?= =?us-ascii?Q?o9MmZ+XUG1MfUhAe2Kq+D0ghOX8fE1SDFRSVw3c1hBb6pQwDSh+1TzWSPXUW?= =?us-ascii?Q?pse5EVzpl9A2Qxp5uvGk/B7AKcSPhoO22foQoR6NnNN6phK2L2WvjDz4Ff7/?= =?us-ascii?Q?su9joI5eiF6tiEpGkJCqplJKHee/J7nEpXhlOJfTdFaHc1h5+vgNUCU42NFz?= =?us-ascii?Q?ZkDeZZfuqueu316MvlyTENO4oe3W8Wgtt04uCUpDS5KdDgoGY7ttmrn8szZP?= =?us-ascii?Q?9LMCahh9f6gAw4aEY5+a/8+9X3aqTX+XvQoyElYNS81VFmFVTTZZVtvuEriT?= =?us-ascii?Q?wgGr2NXzmyRzOsjnOVVgQiSoOtB2KcMfgdKZ6hcEPtAjeCAkJVwn1obeQz7L?= =?us-ascii?Q?QJ379N992kXPHfpNm4Iz52k54cFmon3tqDlBNXfIV7OWkmokz8gFnal1GtfU?= =?us-ascii?Q?r4eOJ57LyTvr7o3QfbV6HVbVA2b32jrctYgUBqfldXAwU0O2at5gRFRXi9gN?= =?us-ascii?Q?SQ/5if8VlqDdkScf28EjZU0dDCRITAn9qglqYQTnAYW2xQ9vE6hdafiAM0lN?= =?us-ascii?Q?XUz33/zU3y5oHGHnLp4RfCi7WPVPxGp5H0DIa3ddR0dvDu4YM2f1uJLFeyFY?= =?us-ascii?Q?LPfGCCq6tlSHuIVL97aeVa1Qr6ib4u5Ol9rcW7BiWBnApVwb1jRRXxTDc/Y+?= =?us-ascii?Q?0sTXxLEPIVUTI87SltW6HgJaV+k058q+jNgUXoNA//KrpA/L7wmXb1pifjyl?= =?us-ascii?Q?iKF6Gkfx0yapeEKmMO7e4YqseIiGiu3vQURYN8qm5nmVbpXVfVGDR2eFhFaR?= =?us-ascii?Q?onBjo1tdRIwrtI+ADoU4dd8PGo1lj+NpRxt4N+okKxhVxSRGmRYldpSr7C/D?= =?us-ascii?Q?MWvfRQ9mD8nOJldxzJKcUIXRIZvgjXZWYiLyK8Ke8iGTQCpaiDZdsWTiDnpe?= =?us-ascii?Q?3pD/x7qN?= MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BY5PR11MB4166.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c36934da-c624-4189-7df0-08d8c588e66a X-MS-Exchange-CrossTenant-originalarrivaltime: 31 Jan 2021 01:38:24.1799 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: SM5B4etcZwSTKe5MY8qhMYWQ6Gye4G/xU9CQKfzm/r7LWZPJc0d4elSUS42t6EV2+McwrmAHQ6DRJKjwm5Edkg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3320 Return-Path: jiewen.yao@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi I have some feedback. 1) Would you please confirm you have validated the https://github.com/tiano= core/edk2/tree/master/UefiCpuPkg/Library/SmmCpuFeaturesLib and https://gith= ub.com/tianocore/edk2/tree/master/UefiCpuPkg/PiSmmCpuDxeSmm with dynamic pa= ging turn on (gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|FAL= SE), and with multiple page fault triggered in the code? 2) Would you please add comment for the assembly instruction? I saw good comment from the original author. Not sure why you removed them? push %rax ; SSP should be 0xFD8 at this point mov $0x04, %rax ; advance past cs:lip:prevssp;supervisor shadow= stack token INCSSP %rax ; After this SSP should be 0xFF8 SAVEPREVSSP ; now s shadow stack restore token will be crea= ted at 0xFD0 RDSSP %rax ; Read new SSP - should be 0x1000 CLRSSBSY (%rax - $0x10) ; Clear token at 0xFF0; SSP should be 0 after t= his RESTORESSP (%rax - $0x30) ; Restore to token at 0xFD0 - new SSP will be= 0xFD0 Mov $0x01, %rax ; Pop off the new save token created INCSSP %rax ; SSP should be 0xFD8 now pop %rax ; restore rax Retf ; Return 3) Please draw the stack layout in the file. It will help other people main= tain the code later. For example: +------------------------------------+ 0xFD0 | FREE | // it is 0xFD8|0x02|(L= MA & CS.L), after SAVEPREVSSP. +------------------------------------+ 0xFD8 | Prev SSP | +------------------------------------+ 0xFE0 | RIP | +------------------------------------+ 0xFE8 | CS | +------------------------------------+ 0xFF0 | 0xFF0 | BUSY | // BUSY flag cleared after C= LRSSBSY +------------------------------------+ 0xFF8 | 0xFD8|0x02|(LMA & CS.L) | +------------------------------------+ Thank you Yao Jiewen > -----Original Message----- > From: Sheng, W > Sent: Friday, January 29, 2021 4:00 PM > To: devel@edk2.groups.io > Cc: Dong, Eric ; Ni, Ray ; Laszlo = Ersek > ; Kumar, Rahul1 ; Yao, Jiewen > > Subject: [PATCH 2/2] UefiCpuPkg/CpuExceptionHandlerLib: Clear CET shadow > stack token busy bit >=20 > If CET shadows stack feature enabled in SMM and stack switch is enabled. > When code execute from SMM handler to SMM exception, CPU will check SMM > exception shadow stack token busy bit if it is cleared or not. > If it is set, it will trigger #DF exception. > If it is not set, CPU will set the busy bit when enter SMM exception. > The busy bit should be cleared when return back form SMM exception to SMM > handler. Otherwise, keeping busy bit in set state will cause to trigger > #DF exception when enter SMM exception next time. > So, we use instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP to clear the > shadow stack token busy bit before RETF instruction in SMM exception. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3192 >=20 > Signed-off-by: Sheng Wei > Cc: Eric Dong > Cc: Ray Ni > Cc: Laszlo Ersek > Cc: Rahul Kumar > Cc: Jiewen Yao > --- > .../DxeCpuExceptionHandlerLib.inf | 3 +++ > .../PeiCpuExceptionHandlerLib.inf | 3 +++ > .../SecPeiCpuExceptionHandlerLib.inf | 4 ++++ > .../SmmCpuExceptionHandlerLib.inf | 3 +++ > .../X64/Xcode5ExceptionHandlerAsm.nasm | 28 > +++++++++++++++++++++- > .../Xcode5SecPeiCpuExceptionHandlerLib.inf | 4 ++++ > 6 files changed, 44 insertions(+), 1 deletion(-) >=20 > diff --git > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf > index 07b34c92a8..e7a81bebdb 100644 > --- > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf > +++ > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf > @@ -43,6 +43,9 @@ > gUefiCpuPkgTokenSpaceGuid.PcdCpuStackSwitchExceptionList > gUefiCpuPkgTokenSpaceGuid.PcdCpuKnownGoodStackSize >=20 > +[FeaturePcd] > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## > CONSUMES > + > [Packages] > MdePkg/MdePkg.dec > MdeModulePkg/MdeModulePkg.dec > diff --git > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf > index feae7b3e06..cf5bfe4083 100644 > --- > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf > +++ > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf > @@ -57,3 +57,6 @@ > [Pcd] > gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard # CONSUMES >=20 > +[FeaturePcd] > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## > CONSUMES > + > diff --git > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.= i > nf > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.= i > nf > index 967cb61ba6..8ae4feae62 100644 > --- > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.= i > nf > +++ > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.= i > nf > @@ -49,3 +49,7 @@ > LocalApicLib > PeCoffGetEntryPointLib > VmgExitLib > + > +[FeaturePcd] > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## > CONSUMES > + > diff --git > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf > index 4cdb11c04e..5c3d1f7cfd 100644 > --- > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf > +++ > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf > @@ -53,3 +53,6 @@ > DebugLib > VmgExitLib >=20 > +[FeaturePcd] > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## > CONSUMES > + > diff --git > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerAs > m.nasm > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerAs > m.nasm > index 26cae56cc5..13fd147f11 100644 > --- > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerAs > m.nasm > +++ > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerAs > m.nasm > @@ -1,5 +1,5 @@ > ;-----------------------------------------------------------------------= ------- ; > -; Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.
> +; Copyright (c) 2012 - 2021, Intel Corporation. All rights reserved.
> ; SPDX-License-Identifier: BSD-2-Clause-Patent > ; > ; Module Name: > @@ -13,6 +13,7 @@ > ; Notes: > ; > ;-----------------------------------------------------------------------= ------- > +%include "Nasm.inc" >=20 > ; > ; CommonExceptionHandler() > @@ -23,6 +24,7 @@ > extern ASM_PFX(mErrorCodeFlag) ; Error code flags for exceptions > extern ASM_PFX(mDoFarReturnFlag) ; Do far return flag > extern ASM_PFX(CommonExceptionHandler) > +extern ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard)) >=20 > SECTION .data >=20 > @@ -371,6 +373,30 @@ DoReturn: > push qword [rax + 0x18] ; save EFLAGS in new location > mov rax, [rax] ; restore rax > popfq ; restore EFLAGS > + > + push rax > + cmp byte [dword ASM_PFX(FeaturePcdGet (PcdCpuSmmStackGuard))], 0 > + jz CetDone > + mov rax, cr4 > + and rax, 0x800000 ; check if CET is enabled > + jz CetDone > + push rbx > + mov rax, 0x04 > + INCSSP_RAX > + SAVEPREVSSP > + READSSP_RAX > + mov rbx, rax > + sub rax, 0x10 > + CLRSSBSY_RAX > + mov rax, rbx > + sub rax, 0x30 > + RSTORSSP_RAX > + mov rax, 0x01 > + INCSSP_RAX > + pop rbx > +CetDone: > + pop rax > + > DB 0x48 ; prefix to composite "retq" with next "r= etf" > retf ; far return > DoIret: > diff --git > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan > dlerLib.inf > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan > dlerLib.inf > index 743c2aa766..a15f125d5b 100644 > --- > a/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan > dlerLib.inf > +++ > b/UefiCpuPkg/Library/CpuExceptionHandlerLib/Xcode5SecPeiCpuExceptionHan > dlerLib.inf > @@ -54,3 +54,7 @@ > LocalApicLib > PeCoffGetEntryPointLib > VmgExitLib > + > +[FeaturePcd] > + gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmStackGuard ## > CONSUMES > + > -- > 2.16.2.windows.1