From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web09.11343.1611664673602097872 for ; Tue, 26 Jan 2021 04:37:53 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.onmicrosoft.com header.s=selector2-intel-onmicrosoft-com header.b=EBFKMshI; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: jiewen.yao@intel.com) IronPort-SDR: VqBU72PrGlvQfQI0UokbJkFogP6XFJxAvZMBHbtwkkJX6Ux+rOWM9WrbAHGT3u2xrrfBzsJ3Ag G5e/hWc2gofA== X-IronPort-AV: E=McAfee;i="6000,8403,9875"; a="159070407" X-IronPort-AV: E=Sophos;i="5.79,375,1602572400"; d="scan'208,217";a="159070407" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jan 2021 04:37:49 -0800 IronPort-SDR: 7Fwsm3qGvvkVw1YpivmVU2onNFTbjyXXfrZL10pSD5qMhL0lPkpblscgSQtORe61aztGxskoSD de2HrpqaowqA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.79,375,1602572400"; d="scan'208,217";a="350654880" Received: from orsmsx602.amr.corp.intel.com ([10.22.229.15]) by fmsmga007.fm.intel.com with ESMTP; 26 Jan 2021 04:37:48 -0800 Received: from orsmsx602.amr.corp.intel.com (10.22.229.15) by ORSMSX602.amr.corp.intel.com (10.22.229.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2; Tue, 26 Jan 2021 04:37:48 -0800 Received: from ORSEDG601.ED.cps.intel.com (10.7.248.6) by orsmsx602.amr.corp.intel.com (10.22.229.15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2106.2 via Frontend Transport; Tue, 26 Jan 2021 04:37:48 -0800 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (104.47.66.45) by edgegateway.intel.com (134.134.137.102) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.1713.5; Tue, 26 Jan 2021 04:37:46 -0800 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Vb4hKtUYb1hsqTGDGpY2IBrATZFAicq07WZW+Vi65aS6BA83F1bvVo3YDFzVmddUPGRfIsgzlGLqJ3t7wTGwdRyEAhj8SQBU02KCxu+BT5lCTDa2VwVYGP2wr1Rs3+6XCuB5ibXv4M8HHvOMvWhQZj32fIHDDlLJuCjyYbLOzfVxV5Uyp2NwsQy8HeR4/TmclwfYTVy+asjXwCrImWfNHLRSlC12soL2Wk+T7FpB9Hd4Awj17l0ggE/KoLjSIkXUvHST/0UGc06pbbwjkV9iGo0rSe4XgyuRu1K1nRFjVAVwAms0+uFZl/+9dEhlW/kmJQYpy6QFH0IfsO+KaLBwnQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zD7AszmmNG5lL+qM2u+X/itYRqvNxBXqwGG94IUWj9g=; b=AFHGixVKH5auip5uLFK842fW/vCHivKtbc0k4ZOpLUFzCLzsUvk7ulBGEYZXVyNXGpjJwy+LO5iGRyUxbgteNoiUxLUCpJEU97KbMoLf65rz1/IMZ7JAzCd2IaiDhGeRNwFjj+oCJMiUIVl8w8u8/Lmb7nt4FGcxaFi9VyQf5Hx5rl+TzvAL5rWGdU85e9BXzmght3/cyqnOLEuSvQnV9NGhi+4saxxsJrc24pScycvDCPw87EqPs6EtqiPjzbnvbNSPofS6LP2RpIyLybbKf359CcBclijtV0TVzg46iEwtHNjM/QasbhwIbKZlqvkGffSv0FuB+yx1N65GRAWYiA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zD7AszmmNG5lL+qM2u+X/itYRqvNxBXqwGG94IUWj9g=; b=EBFKMshIaaDnL/RsLDE0wVs+v8yanaEAhuo9ItRDbGGNHJJQXIvWrLTDLK8LDGrm0AGQ/juNk7wL2fbmEygOy8904BHrAyvsGS2d4sMCWM5EaHSdX7prsJylk9AuWAtPc/Fiq1VuS3yKHoOPK3f0H37hukEw6j6yO6garkR6zTI= Received: from BY5PR11MB4166.namprd11.prod.outlook.com (2603:10b6:a03:191::25) by BYAPR11MB3542.namprd11.prod.outlook.com (2603:10b6:a03:b2::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3784.13; Tue, 26 Jan 2021 12:37:45 +0000 Received: from BY5PR11MB4166.namprd11.prod.outlook.com ([fe80::5983:f233:56d6:8132]) by BY5PR11MB4166.namprd11.prod.outlook.com ([fe80::5983:f233:56d6:8132%4]) with mapi id 15.20.3784.019; Tue, 26 Jan 2021 12:37:45 +0000 From: "Yao, Jiewen" To: Kun Qin , "devel@edk2.groups.io" CC: Ard Biesheuvel , Sami Mujawar , Supreeth Venkatesh Subject: Re: [edk2-devel] [PATCH v3 05/18] StandaloneMmPkg: StandaloneMmMemLib: Extends support for X64 architecture Thread-Topic: [edk2-devel] [PATCH v3 05/18] StandaloneMmPkg: StandaloneMmMemLib: Extends support for X64 architecture Thread-Index: AQHW6sXDOs4B7xa80ECsU/RT/OSneKoxVl5BgAiUDgA= Date: Tue, 26 Jan 2021 12:37:45 +0000 Message-ID: References: <165A3A34C1B605DD.30138@groups.io> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-version: 11.5.1.3 dlp-product: dlpe-windows dlp-reaction: no-action authentication-results: outlook.com; dkim=none (message not signed) header.d=none;outlook.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.198.147.198] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: be4b3542-440d-42d6-9023-08d8c1f72e9a x-ms-traffictypediagnostic: BYAPR11MB3542: x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5236; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: cni6LFmmgcv9GKIqAfg/nraU12dgT/JtDh4CkDup2GIpX3PheV39ZJV41yZLBzdcZeRmZutVGG1ar7rA7DrBv/SE+IGmr61CwJXZISwroR9u1r5Ha+uOKj9Een9Z1DrTokzIpB2+/w7592UaDpnrrv4AAjojZTDDJxUXiHkP0ZzdZTmn6ZmduWy6Y/vqGUb/xw6jWMc1o9Dj+mb7ipIZgxrV2F1SXx/dB/FXXZNHm7hSJQOJzRvs0q8DZwgTWsE7qCgGuIXH9gywpFGR/dNdKu0nWQq/9kmIVS+dWrFTxuu2noqaO5zvvBquj0M3jX3JWhCqtnKjFcU0tKWGw9PQrJnZwXOw4kisT54g2yURUvQ8UG6aidQrwuEr3s6jfjs4vUT68/qvMEHJBCn31AIomA3kLf7sl7DHVYbSWeE83sSBedmbvDUM67do+1+UHBewjKl3Id0mp7T1oQm2BPJxmw== x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BY5PR11MB4166.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(6029001)(4636009)(39860400002)(366004)(396003)(136003)(376002)(346002)(5660300002)(83380400001)(66946007)(45080400002)(64756008)(86362001)(30864003)(76116006)(166002)(966005)(7696005)(8676002)(33656002)(478600001)(55016002)(2906002)(8936002)(26005)(71200400001)(4326008)(53546011)(110136005)(9686003)(186003)(6506007)(52536014)(54906003)(66556008)(66446008)(316002)(66476007);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata: =?us-ascii?Q?GbV5Tqw6GNQTCY9w0Y+K0M9B7vsjoC/vX7kVdeUQfBpD7KMtJ3ULxi+pq3FY?= =?us-ascii?Q?gLfcqeQHoOudSGFuxqlzon0kC+ODO5VxEyX/Z7sCHyn7FUdpdVU1pnd+GtoH?= =?us-ascii?Q?zZXDH0frYAhtVhIQocF3pNcHeqHwpdLWWAg1SDIM5sceiwEgz03+wv5SVhws?= =?us-ascii?Q?InYPVk/1KVd/Lutw/RQykd36LyK1xMSbhOBjvHKbq22htagI4LUTpKc9IX93?= =?us-ascii?Q?7lpRdqrw95NGe65h4xWBlP2ewE/mevzslB/63tbg61ahRghl1tMQeWIFUVLZ?= =?us-ascii?Q?wxNZ1H8FlVde1STe7GR5c7/qqui1hJDhSR/jjxrtYEyOiRCj5XHGwYmYbFrl?= =?us-ascii?Q?yqrj5NBDs2xlukJ9t0m3uQBW7+2Q4ko27SABJM1h8W1wFzSRUE1PBd022GCf?= =?us-ascii?Q?t8+taXqJHs8y317AZdlnqRYZxFoa2xXZT0ascupRYLkSoA+/XsYPbXiimgnN?= =?us-ascii?Q?g63ijzfNQ38VBQx61iDMIJpCOnSu/FS/bjjAiqJxzT1UelFGrvUmoioAOCYI?= =?us-ascii?Q?OlOVyMcuz+eYiL0mCjP+TWBLISn97Y4HZg4MN8rpe8rFbRdwbYy8vH4VVuCH?= =?us-ascii?Q?wVj38tXaBcDy/RGXrr8fYV5+T6eZM9uHgzDmvztuQXuYtW3nzVtoW0H3uCRH?= =?us-ascii?Q?yyQnUAeCkofYkDiAKWmshWihhqAgGH+yT35kmfxQsfiSFFROXSTAF91pQHSq?= =?us-ascii?Q?Fe0mUKdt7rIZcugZ5iN3ZY1hRZHxzerouRi63847SXLtlj3MPCohWUVEFDjS?= =?us-ascii?Q?dLILALccyKmj/MC5TNFm1C0MwpjVIJOVPW83+YQAHiedseC81DCXQiWUl/RW?= =?us-ascii?Q?yk5sN4+CVs3IZBG/1YWND1CdIMFbLf0cLgiqXI7aCFu/1nYExD63A5HrvQ7K?= =?us-ascii?Q?TYyRHbVYUuYtl1mqD6BoqxtK1FwCBqHK6+JIZebIxkv+tpPbBDTmNdwTPmjD?= =?us-ascii?Q?XCrDNqwHxWOLRdYDc+2ixVpUldNLQ0MUWwd367ySqEOrAkj3o3vb0ywmx9pD?= =?us-ascii?Q?4gRe1ekMs+JAe+oHVw9pjhUdzoGk/T7dtWd51vr8Ae2QKv2x6KAnhgUrNJYu?= =?us-ascii?Q?/zWNnlTY?= x-ms-exchange-transport-forked: True MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BY5PR11MB4166.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: be4b3542-440d-42d6-9023-08d8c1f72e9a X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Jan 2021 12:37:45.4530 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: hQmO7fUNtaZHXQSdb7dK5zvQ5Gf33a9FT1HPlyttXEmI/HLUrBaeJzZz4NQpa8Q/dHNNdWb2HHJaTmJnmtk35g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB3542 Return-Path: jiewen.yao@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_BY5PR11MB416694097E7C8C914B2CB34A8CBC9BY5PR11MB4166namp_" --_000_BY5PR11MB416694097E7C8C914B2CB34A8CBC9BY5PR11MB4166namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Thanks. Looks good to me. Reviewed-by: Jiewen Yao From: Kun Qin Sent: Thursday, January 21, 2021 9:44 AM To: devel@edk2.groups.io; Yao, Jiewen Cc: Ard Biesheuvel ; Sami Mujawar ; Supreeth Venkatesh Subject: RE: [edk2-devel] [PATCH v3 05/18] StandaloneMmPkg: StandaloneMmMe= mLib: Extends support for X64 architecture Hi Jiewen, Do you have further concerns about this specific patch? I did created a Bu= gzilla ticket to track the OS memory protection concern here: 3168 - Add no= n-MMRAM memory protection for Standalone MM environment (tianocore.org). It introduces a new pr= oposal to allow access of DXE/RT regions from MMRAM, but requires non trivi= al change. Please let me know if you hold different opinions towards the pr= oposal or this patch. Thanks, Kun From: Kun Qin Sent: Thursday, January 14, 2021 14:36 To: devel@edk2.groups.io Cc: Ard Biesheuvel; Sami Mujawar; Jiewen Yao; Supreeth Venka= tesh Subject: [edk2-devel] [PATCH v3 05/18] StandaloneMmPkg: StandaloneMmMemLib= : Extends support for X64 architecture This change extends StandaloneMmMemLib library to support X64 architecture. The implementation is ported from MdePkg/Library/SmmMemLib. Cc: Ard Biesheuvel > Cc: Sami Mujawar > Cc: Jiewen Yao > Cc: Supreeth Venkatesh > Signed-off-by: Kun Qin > --- Notes: v3: - Updated destructor description of varibales to pass CI build. v2: - Added routine to fix bug of not initializing MmRanges [Jiewen] - Extends support to x86 instead of x64 only [Hao] StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLibInte= rnal.c | 27 ++++ StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c = | 52 +++++++ StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInternal.= c | 155 ++++++++++++++++++++ StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf = | 13 +- 4 files changed, 246 insertions(+), 1 deletion(-) diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/Standalone= MmMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/Sta= ndaloneMmMemLibInternal.c index cb7c5e677a6b..4124959e0435 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLi= bInternal.c +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLi= bInternal.c @@ -40,4 +40,31 @@ MmMemLibInternalCalculateMaximumSupportAddress ( DEBUG ((DEBUG_INFO, "mMmMemLibInternalMaximumSupportAddress =3D 0x%lx\n= ", mMmMemLibInternalMaximumSupportAddress)); } +/** + Initialize cached Mmram Ranges from HOB. + + @retval EFI_UNSUPPORTED The routine is unable to extract MMRAM inform= ation. + @retval EFI_SUCCESS MmRanges are populated successfully. + +**/ +EFI_STATUS +MmMemLibInternalPopulateMmramRanges ( + VOID + ) +{ + // Not implemented for AARCH64. + return EFI_SUCCESS; +} + +/** + Deinitialize cached Mmram Ranges. + +**/ +VOID +MmMemLibInternalFreeMmramRanges ( + VOID + ) +{ + // Not implemented for AARCH64. +} diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib= .c b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c index b533bd8390cd..2737f95315eb 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c @@ -37,6 +37,27 @@ MmMemLibInternalCalculateMaximumSupportAddress ( VOID ); +/** + Initialize cached Mmram Ranges from HOB. + + @retval EFI_UNSUPPORTED The routine is unable to extract MMRAM inform= ation. + @retval EFI_SUCCESS MmRanges are populated successfully. + +**/ +EFI_STATUS +MmMemLibInternalPopulateMmramRanges ( + VOID + ); + +/** + Deinitialize cached Mmram Ranges. + +**/ +VOID +MmMemLibInternalFreeMmramRanges ( + VOID + ); + /** This function check if the buffer is valid per processor architecture a= nd not overlap with MMRAM. @@ -253,11 +274,42 @@ MemLibConstructor ( IN EFI_MM_SYSTEM_TABLE *MmSystemTable ) { + EFI_STATUS Status; // // Calculate and save maximum support address // MmMemLibInternalCalculateMaximumSupportAddress (); + // + // Initialize cached Mmram Ranges from HOB. + // + Status =3D MmMemLibInternalPopulateMmramRanges (); + + return Status; +} + +/** + Destructor for Mm Mem library. + + @param ImageHandle The image handle of the process. + @param MmSystemTable The EFI System Table pointer. + + @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS. + +**/ +EFI_STATUS +EFIAPI +MemLibDestructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_MM_SYSTEM_TABLE *MmSystemTable + ) +{ + + // + // Deinitialize cached Mmram Ranges. + // + MmMemLibInternalFreeMmramRanges (); + return EFI_SUCCESS; } diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMem= LibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmM= emLibInternal.c new file mode 100644 index 000000000000..1a978541716a --- /dev/null +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInte= rnal.c @@ -0,0 +1,155 @@ +/** @file + Internal ARCH Specific file of MM memory check library. + + MM memory check library implementation. This library consumes MM_ACCESS= _PROTOCOL + to get MMRAM information. In order to use this library instance, the pl= atform should produce + all MMRAM range via MM_ACCESS_PROTOCOL, including the range for firmwar= e (like MM Core + and MM driver) and/or specific dedicated hardware. + + Copyright (c) 2015, Intel Corporation. All rights reserved.
+ Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
+ Copyright (c) Microsoft Corporation. + + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#include +#include +#include +#include +#include +#include + +#include +#include + +// +// Maximum support address used to check input buffer +// +extern EFI_PHYSICAL_ADDRESS mMmMemLibInternalMaximumSupportAddress; +extern EFI_MMRAM_DESCRIPTOR *mMmMemLibInternalMmramRanges; +extern UINTN mMmMemLibInternalMmramCount; + +/** + Calculate and save the maximum support address. + +**/ +VOID +MmMemLibInternalCalculateMaximumSupportAddress ( + VOID + ) +{ + VOID *Hob; + UINT32 RegEax; + UINT8 PhysicalAddressBits; + + // + // Get physical address bits supported. + // + Hob =3D GetFirstHob (EFI_HOB_TYPE_CPU); + if (Hob !=3D NULL) { + PhysicalAddressBits =3D ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace; + } else { + AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL); + if (RegEax >=3D 0x80000008) { + AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL); + PhysicalAddressBits =3D (UINT8) RegEax; + } else { + PhysicalAddressBits =3D 36; + } + } + // + // IA-32e paging translates 48-bit linear addresses to 52-bit physical = addresses. + // + ASSERT (PhysicalAddressBits <=3D 52); + if (PhysicalAddressBits > 48) { + PhysicalAddressBits =3D 48; + } + + // + // Save the maximum support address in one global variable + // + mMmMemLibInternalMaximumSupportAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN= )(LShiftU64 (1, PhysicalAddressBits) - 1); + DEBUG ((DEBUG_INFO, "mMmMemLibInternalMaximumSupportAddress =3D 0x%lx\n= ", mMmMemLibInternalMaximumSupportAddress)); +} + +/** + Initialize cached Mmram Ranges from HOB. + + @retval EFI_UNSUPPORTED The routine is unable to extract MMRAM inform= ation. + @retval EFI_SUCCESS MmRanges are populated successfully. + +**/ +EFI_STATUS +MmMemLibInternalPopulateMmramRanges ( + VOID + ) +{ + VOID *HobStart; + EFI_HOB_GUID_TYPE *GuidHob; + MM_CORE_DATA_HOB_DATA *DataInHob; + MM_CORE_PRIVATE_DATA *MmCorePrivateData; + EFI_HOB_GUID_TYPE *MmramRangesHob; + EFI_MMRAM_HOB_DESCRIPTOR_BLOCK *MmramRangesHobData; + EFI_MMRAM_DESCRIPTOR *MmramDescriptors; + + HobStart =3D GetHobList (); + DEBUG ((DEBUG_INFO, "%a - 0x%x\n", __FUNCTION__, HobStart)); + + // + // Extract MM Core Private context from the Hob. If absent search for + // a Hob containing the MMRAM ranges + // + GuidHob =3D GetNextGuidHob (&gMmCoreDataHobGuid, HobStart); + if (GuidHob =3D=3D NULL) { + MmramRangesHob =3D GetFirstGuidHob (&gEfiMmPeiMmramMemoryReserveGuid)= ; + if (MmramRangesHob =3D=3D NULL) { + return EFI_UNSUPPORTED; + } + + MmramRangesHobData =3D GET_GUID_HOB_DATA (MmramRangesHob); + if (MmramRangesHobData =3D=3D NULL || MmramRangesHobData->Descriptor = = =3D=3D NULL) { + return EFI_UNSUPPORTED; + } + + mMmMemLibInternalMmramCount =3D MmramRangesHobData->NumberOfMmReserve= dRegions; + MmramDescriptors =3D MmramRangesHobData->Descriptor; + } else { + DataInHob =3D GET_GUID_HOB_DATA (GuidHob); + if (DataInHob =3D=3D NULL) { + return EFI_UNSUPPORTED; + } + + MmCorePrivateData =3D (MM_CORE_PRIVATE_DATA *) (UINTN) DataInHob->Add= ress; + if (MmCorePrivateData =3D=3D NULL || MmCorePrivateData->MmramRanges = =3D=3D 0) { + return EFI_UNSUPPORTED; + } + + mMmMemLibInternalMmramCount =3D (UINTN) MmCorePrivateData->MmramRange= Count; + MmramDescriptors =3D (EFI_MMRAM_DESCRIPTOR *) (UINTN) MmCorePrivateDa= ta->MmramRanges; + } + + mMmMemLibInternalMmramRanges =3D AllocatePool (mMmMemLibInternalMmramCo= unt * sizeof (EFI_MMRAM_DESCRIPTOR)); + if (mMmMemLibInternalMmramRanges) { + CopyMem (mMmMemLibInternalMmramRanges, + MmramDescriptors, + mMmMemLibInternalMmramCount * sizeof (EFI_MMRAM_DESCRIPTOR))= ; + } + + return EFI_SUCCESS; +} + +/** + Deinitialize cached Mmram Ranges. + +**/ +VOID +MmMemLibInternalFreeMmramRanges ( + VOID + ) +{ + if (mMmMemLibInternalMmramRanges !=3D NULL) { + FreePool (mMmMemLibInternalMmramRanges); + } +} + diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib= .inf b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf index 49da02e54e6d..062b0d7a1161 100644 --- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf @@ -8,6 +8,7 @@ # # Copyright (c) 2015, Intel Corporation. All rights reserved.
# Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.
+# Copyright (c) Microsoft Corporation. # # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,16 +23,20 @@ [Defines] PI_SPECIFICATION_VERSION =3D 0x00010032 LIBRARY_CLASS =3D MemLib|MM_STANDALONE MM_CORE_STANDAL= ONE CONSTRUCTOR =3D MemLibConstructor + DESTRUCTOR =3D MemLibDestructor # # The following information is for reference only and not required by the= build tools. # -# VALID_ARCHITECTURES =3D AARCH64 +# VALID_ARCHITECTURES =3D IA32 X64 AARCH64 # [Sources.Common] StandaloneMmMemLib.c +[Sources.IA32, Sources.X64] + X86StandaloneMmMemLibInternal.c + [Sources.AARCH64] AArch64/StandaloneMmMemLibInternal.c @@ -42,3 +47,9 @@ [Packages] [LibraryClasses] BaseMemoryLib DebugLib + HobLib + MemoryAllocationLib + +[Guids] + gMmCoreDataHobGuid ## SOMETIMES_CONSUMES ## HOB + gEfiMmPeiMmramMemoryReserveGuid ## SOMETIMES_CONSUMES ## HOB -- 2.30.0.windows.1 --_000_BY5PR11MB416694097E7C8C914B2CB34A8CBC9BY5PR11MB4166namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Thanks. Looks good to me.

 

Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>= ;

 

From: Kun Qin <kun.q@outlook.com>
Sent: Thursday, January 21, 2021 9:44 AM
To: devel@edk2.groups.io; Yao, Jiewen <jiewen.yao@intel.com><= br> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com>; Sami Mujawar <= ;sami.mujawar@arm.com>; Supreeth Venkatesh <supreeth.venkatesh@arm.co= m>
Subject: RE: [edk2-devel] [PATCH v3 05/18] StandaloneMmPkg: Standal= oneMmMemLib: Extends support for X64 architecture

 

Hi Jiewen,

 

Do you have further concerns about this specific pa= tch? I did created a Bugzilla ticket to track the OS memory protection conc= ern here: 3168 = 211; Add non-MMRAM memory protection for Standalone MM environment (tianoco= re.org). It introduces a new proposal to allow access of DXE/RT regions= from MMRAM, but requires non trivial change. Please let me know if you hold different opinions towards the proposal or= this patch.

 

Thanks,

Kun

 

From: K= un Qin
Sent: Thursday, January 14, 2021 14:36
To: devel@edk2.groups.io
Cc: Ard Biesheuvel; <= a href=3D"mailto:sami.mujawar@arm.com"> Sami Mujawar; Jiewen Yao; = Supreeth Venkatesh
Subject: [edk2-devel] [PATCH v3 05/18] StandaloneMmPkg: StandaloneM= mMemLib: Extends support for X64 architecture

 

This change extends = StandaloneMmMemLib library to support X64
architecture. The implementation is ported from MdePkg/Library/SmmMemLib.<= br>
Cc: Ard Biesheuvel <ard.biesh= euvel@arm.com>
Cc: Sami Mujawar <sami.mujawar@= arm.com>
Cc: Jiewen Yao <jiewen.yao@inte= l.com>
Cc: Supreeth Venkatesh <s= upreeth.venkatesh@arm.com>

Signed-off-by: Kun Qin <kun.q@outl= ook.com>
---

Notes:
    v3:
    - Updated destructor description of varibales to pass C= I build.
   
    v2:
    - Added routine to fix bug of not initializing MmRanges= [Jiewen]
    - Extends support to x86 instead of x64 only [Hao]

 StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLi= bInternal.c |  27 ++++
 StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c = ;            &n= bsp;   |  52 +++++++
 StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInte= rnal.c      | 155 ++++++++++++++++++++
 StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf&nb= sp;            =   |  13 +-
 4 files changed, 246 insertions(+), 1 deletion(-)

diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/Standalone= MmMemLibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/Sta= ndaloneMmMemLibInternal.c
index cb7c5e677a6b..4124959e0435 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLi= bInternal.c
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/AArch64/StandaloneMmMemLi= bInternal.c
@@ -40,4 +40,31 @@ MmMemLibInternalCalculateMaximumSupportAddress (
   DEBUG ((DEBUG_INFO, "mMmMemLibInternalMaximumSupportAddr= ess =3D 0x%lx\n", mMmMemLibInternalMaximumSupportAddress));
 }
 
+/**
+  Initialize cached Mmram Ranges from HOB.
+
+  @retval EFI_UNSUPPORTED   The routine is unable to extra= ct MMRAM information.
+  @retval EFI_SUCCESS       MmRanges a= re populated successfully.
+
+**/
+EFI_STATUS
+MmMemLibInternalPopulateMmramRanges (
+  VOID
+  )
+{
+  // Not implemented for AARCH64.
+  return EFI_SUCCESS;
+}
+
+/**
+  Deinitialize cached Mmram Ranges.
+
+**/
+VOID
+MmMemLibInternalFreeMmramRanges (
+  VOID
+  )
+{
+  // Not implemented for AARCH64.
+}
 
diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib= .c b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c
index b533bd8390cd..2737f95315eb 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.c
@@ -37,6 +37,27 @@ MmMemLibInternalCalculateMaximumSupportAddress (
   VOID
   );
 
+/**
+  Initialize cached Mmram Ranges from HOB.
+
+  @retval EFI_UNSUPPORTED   The routine is unable to extra= ct MMRAM information.
+  @retval EFI_SUCCESS       MmRanges a= re populated successfully.
+
+**/
+EFI_STATUS
+MmMemLibInternalPopulateMmramRanges (
+  VOID
+  );
+
+/**
+  Deinitialize cached Mmram Ranges.
+
+**/
+VOID
+MmMemLibInternalFreeMmramRanges (
+  VOID
+  );
+
 /**
   This function check if the buffer is valid per processor arch= itecture and not overlap with MMRAM.
 
@@ -253,11 +274,42 @@ MemLibConstructor (
   IN EFI_MM_SYSTEM_TABLE    *MmSystemTable
   )
 {
+  EFI_STATUS Status;
 
   //
   // Calculate and save maximum support address
   //
   MmMemLibInternalCalculateMaximumSupportAddress ();
 
+  //
+  // Initialize cached Mmram Ranges from HOB.
+  //
+  Status =3D MmMemLibInternalPopulateMmramRanges ();
+
+  return Status;
+}
+
+/**
+  Destructor for Mm Mem library.
+
+  @param ImageHandle    The image handle of the proce= ss.
+  @param MmSystemTable  The EFI System Table pointer.
+
+  @retval EFI_SUCCESS   The constructor always returns EFI= _SUCCESS.
+
+**/
+EFI_STATUS
+EFIAPI
+MemLibDestructor (
+  IN EFI_HANDLE         = ;    ImageHandle,
+  IN EFI_MM_SYSTEM_TABLE    *MmSystemTable
+  )
+{
+
+  //
+  // Deinitialize cached Mmram Ranges.
+  //
+  MmMemLibInternalFreeMmramRanges ();
+
   return EFI_SUCCESS;
 }
diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMem= LibInternal.c b/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmM= emLibInternal.c
new file mode 100644
index 000000000000..1a978541716a
--- /dev/null
+++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/X86StandaloneMmMemLibInte= rnal.c
@@ -0,0 +1,155 @@
+/** @file
+  Internal ARCH Specific file of MM memory check library.
+
+  MM memory check library implementation. This library consumes MM_A= CCESS_PROTOCOL
+  to get MMRAM information. In order to use this library instance, t= he platform should produce
+  all MMRAM range via MM_ACCESS_PROTOCOL, including the range for fi= rmware (like MM Core
+  and MM driver) and/or specific dedicated hardware.
+
+  Copyright (c) 2015, Intel Corporation. All rights reserved.<BR&= gt;
+  Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.<BR= >
+  Copyright (c) Microsoft Corporation.
+
+  SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#include <PiMm.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+
+#include <Guid/MmCoreData.h>
+#include <Guid/MmramMemoryReserve.h>
+
+//
+// Maximum support address used to check input buffer
+//
+extern EFI_PHYSICAL_ADDRESS  mMmMemLibInternalMaximumSupportAddress;=
+extern EFI_MMRAM_DESCRIPTOR *mMmMemLibInternalMmramRanges;
+extern UINTN          &= nbsp;      mMmMemLibInternalMmramCount;
+
+/**
+  Calculate and save the maximum support address.
+
+**/
+VOID
+MmMemLibInternalCalculateMaximumSupportAddress (
+  VOID
+  )
+{
+  VOID         *Hob;
+  UINT32       RegEax;
+  UINT8        PhysicalAddressBit= s;
+
+  //
+  // Get physical address bits supported.
+  //
+  Hob =3D GetFirstHob (EFI_HOB_TYPE_CPU);
+  if (Hob !=3D NULL) {
+    PhysicalAddressBits =3D ((EFI_HOB_CPU *) Hob)->Size= OfMemorySpace;
+  } else {
+    AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);<= br> +    if (RegEax >=3D 0x80000008) {
+      AsmCpuid (0x80000008, &RegEax, NULL, N= ULL, NULL);
+      PhysicalAddressBits =3D (UINT8) RegEax; +    } else {
+      PhysicalAddressBits =3D 36;
+    }
+  }
+  //
+  // IA-32e paging translates 48-bit linear addresses to 52-bit phys= ical addresses.
+  //
+  ASSERT (PhysicalAddressBits <=3D 52);
+  if (PhysicalAddressBits > 48) {
+    PhysicalAddressBits =3D 48;
+  }
+
+  //
+  // Save the maximum support address in one global variable
+  //
+  mMmMemLibInternalMaximumSupportAddress =3D (EFI_PHYSICAL_ADDRESS)(= UINTN)(LShiftU64 (1, PhysicalAddressBits) - 1);
+  DEBUG ((DEBUG_INFO, "mMmMemLibInternalMaximumSupportAddress = =3D 0x%lx\n", mMmMemLibInternalMaximumSupportAddress));
+}
+
+/**
+  Initialize cached Mmram Ranges from HOB.
+
+  @retval EFI_UNSUPPORTED   The routine is unable to extra= ct MMRAM information.
+  @retval EFI_SUCCESS       MmRanges a= re populated successfully.
+
+**/
+EFI_STATUS
+MmMemLibInternalPopulateMmramRanges (
+  VOID
+  )
+{
+  VOID          &n= bsp;            = ;     *HobStart;
+  EFI_HOB_GUID_TYPE        &= nbsp;      *GuidHob;
+  MM_CORE_DATA_HOB_DATA       &nb= sp;   *DataInHob;
+  MM_CORE_PRIVATE_DATA       &nbs= p;    *MmCorePrivateData;
+  EFI_HOB_GUID_TYPE        &= nbsp;      *MmramRangesHob;
+  EFI_MMRAM_HOB_DESCRIPTOR_BLOCK  *MmramRangesHobData;
+  EFI_MMRAM_DESCRIPTOR       &nbs= p;    *MmramDescriptors;
+
+  HobStart =3D GetHobList ();
+  DEBUG ((DEBUG_INFO, "%a - 0x%x\n", __FUNCTION__, HobStar= t));
+
+  //
+  // Extract MM Core Private context from the Hob. If absent search = for
+  // a Hob containing the MMRAM ranges
+  //
+  GuidHob =3D GetNextGuidHob (&gMmCoreDataHobGuid, HobStart); +  if (GuidHob =3D=3D NULL) {
+    MmramRangesHob =3D GetFirstGuidHob (&gEfiMmPeiMmra= mMemoryReserveGuid);
+    if (MmramRangesHob =3D=3D NULL) {
+      return EFI_UNSUPPORTED;
+    }
+
+    MmramRangesHobData =3D GET_GUID_HOB_DATA (MmramRangesH= ob);
+    if (MmramRangesHobData =3D=3D NULL || MmramRangesHobDa= ta->Descriptor =3D=3D NULL) {
+      return EFI_UNSUPPORTED;
+    }
+
+    mMmMemLibInternalMmramCount =3D MmramRangesHobData->= ;NumberOfMmReservedRegions;
+    MmramDescriptors =3D MmramRangesHobData->Descriptor= ;
+  } else {
+    DataInHob =3D GET_GUID_HOB_DATA (GuidHob);
+    if (DataInHob =3D=3D NULL) {
+      return EFI_UNSUPPORTED;
+    }
+
+    MmCorePrivateData =3D (MM_CORE_PRIVATE_DATA *) (UINTN)= DataInHob->Address;
+    if (MmCorePrivateData =3D=3D NULL || MmCorePrivateData= ->MmramRanges =3D=3D 0) {
+      return EFI_UNSUPPORTED;
+    }
+
+    mMmMemLibInternalMmramCount =3D (UINTN) MmCorePrivateD= ata->MmramRangeCount;
+    MmramDescriptors =3D (EFI_MMRAM_DESCRIPTOR *) (UINTN) = MmCorePrivateData->MmramRanges;
+  }
+
+  mMmMemLibInternalMmramRanges =3D AllocatePool (mMmMemLibInternalMm= ramCount * sizeof (EFI_MMRAM_DESCRIPTOR));
+  if (mMmMemLibInternalMmramRanges) {
+    CopyMem (mMmMemLibInternalMmramRanges,
+             = MmramDescriptors,
+             = mMmMemLibInternalMmramCount * sizeof (EFI_MMRAM_DESCRIPTOR));
+  }
+
+  return EFI_SUCCESS;
+}
+
+/**
+  Deinitialize cached Mmram Ranges.
+
+**/
+VOID
+MmMemLibInternalFreeMmramRanges (
+  VOID
+  )
+{
+  if (mMmMemLibInternalMmramRanges !=3D NULL) {
+    FreePool (mMmMemLibInternalMmramRanges);
+  }
+}
+
diff --git a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib= .inf b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf index 49da02e54e6d..062b0d7a1161 100644
--- a/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf +++ b/StandaloneMmPkg/Library/StandaloneMmMemLib/StandaloneMmMemLib.inf @@ -8,6 +8,7 @@
 #
 #  Copyright (c) 2015, Intel Corporation. All rights reserved.&= lt;BR>
 #  Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.= <BR>
+#  Copyright (c) Microsoft Corporation.
 #
 #  SPDX-License-Identifier: BSD-2-Clause-Patent
 #
@@ -22,16 +23,20 @@ [Defines]
   PI_SPECIFICATION_VERSION       = = =3D 0x00010032
   LIBRARY_CLASS        =           =3D MemLib|MM_STANDA= LONE MM_CORE_STANDALONE
   CONSTRUCTOR        &n= bsp;           =3D MemLib= Constructor
+  DESTRUCTOR         &n= bsp;           =3D MemLib= Destructor
 
 #
 # The following information is for reference only and not required b= y the build tools.
 #
-#  VALID_ARCHITECTURES       &nbs= p;   =3D AARCH64
+#  VALID_ARCHITECTURES       &nbs= p;   =3D IA32 X64 AARCH64
 #
 
 [Sources.Common]
   StandaloneMmMemLib.c
 
+[Sources.IA32, Sources.X64]
+  X86StandaloneMmMemLibInternal.c
+
 [Sources.AARCH64]
   AArch64/StandaloneMmMemLibInternal.c
 
@@ -42,3 +47,9 @@ [Packages]
 [LibraryClasses]
   BaseMemoryLib
   DebugLib
+  HobLib
+  MemoryAllocationLib
+
+[Guids]
+  gMmCoreDataHobGuid        =           ## SOMETIMES_CONSUME= S ## HOB
+  gEfiMmPeiMmramMemoryReserveGuid     ## SOMETIM= ES_CONSUMES ## HOB
--
2.30.0.windows.1



 

--_000_BY5PR11MB416694097E7C8C914B2CB34A8CBC9BY5PR11MB4166namp_--