From: "Yao, Jiewen" <jiewen.yao@intel.com>
To: "Sheng, W" <w.sheng@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
"Liu, Zhiguang" <zhiguang.liu@intel.com>
Subject: Re: [PATCH] MdePkg/Include: Add CET instructions to Nasm.inc
Date: Fri, 29 Jan 2021 06:35:37 +0000 [thread overview]
Message-ID: <BY5PR11MB4166B5C8868695EA54E36D6B8CB99@BY5PR11MB4166.namprd11.prod.outlook.com> (raw)
In-Reply-To: <20210129023448.30348-1-w.sheng@intel.com>
Hi Wei
Would you please send out the second patch to consume these instruction?
As such people can have a full picture on what the issue is and what the solution is.
Thank you
Yao Jiewen
> -----Original Message-----
> From: Sheng, W <w.sheng@intel.com>
> Sent: Friday, January 29, 2021 10:35 AM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Liming Gao
> <gaoliming@byosoft.com.cn>; Liu, Zhiguang <zhiguang.liu@intel.com>; Yao,
> Jiewen <jiewen.yao@intel.com>
> Subject: [PATCH] MdePkg/Include: Add CET instructions to Nasm.inc
>
> This is to add instruction SAVEPREVSSP, CLRSSBSY and RSTORSSP_RAX in
> Nasm,
> because these instructions are not supported yet.
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3192
>
> Signed-off-by: Sheng Wei <w.sheng@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> ---
> MdePkg/Include/Ia32/Nasm.inc | 14 +++++++++++++-
> MdePkg/Include/X64/Nasm.inc | 14 +++++++++++++-
> 2 files changed, 26 insertions(+), 2 deletions(-)
>
> diff --git a/MdePkg/Include/Ia32/Nasm.inc
> b/MdePkg/Include/Ia32/Nasm.inc
> index 31ce861f1e..9c1b7796ea 100644
> --- a/MdePkg/Include/Ia32/Nasm.inc
> +++ b/MdePkg/Include/Ia32/Nasm.inc
> @@ -1,6 +1,6 @@
> ;------------------------------------------------------------------------------
> ;
> -; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
> +; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
> ; SPDX-License-Identifier: BSD-2-Clause-Patent
> ;
> ; Abstract:
> @@ -20,3 +20,15 @@
> %macro INCSSP_EAX 0
> DB 0xF3, 0x0F, 0xAE, 0xE8
> %endmacro
> +
> +%macro SAVEPREVSSP 0
> + DB 0xF3, 0x0F, 0x01, 0xEA
> +%endmacro
> +
> +%macro CLRSSBSY_EAX 0
> + DB 0x67, 0xF3, 0x0F, 0xAE, 0x30
> +%endmacro
> +
> +%macro RSTORSSP_EAX 0
> + DB 0x67, 0xF3, 0x0F, 0x01, 0x28
> +%endmacro
> diff --git a/MdePkg/Include/X64/Nasm.inc
> b/MdePkg/Include/X64/Nasm.inc
> index 42412735ea..c5189982bb 100644
> --- a/MdePkg/Include/X64/Nasm.inc
> +++ b/MdePkg/Include/X64/Nasm.inc
> @@ -1,6 +1,6 @@
> ;------------------------------------------------------------------------------
> ;
> -; Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
> +; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
> ; SPDX-License-Identifier: BSD-2-Clause-Patent
> ;
> ; Abstract:
> @@ -20,3 +20,15 @@
> %macro INCSSP_RAX 0
> DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8
> %endmacro
> +
> +%macro SAVEPREVSSP 0
> + DB 0xF3, 0x0F, 0x01, 0xEA
> +%endmacro
> +
> +%macro CLRSSBSY_RAX 0
> + DB 0xF3, 0x0F, 0xAE, 0x30
> +%endmacro
> +
> +%macro RSTORSSP_RAX 0
> + DB 0xF3, 0x0F, 0x01, 0x28
> +%endmacro
> --
> 2.16.2.windows.1
next prev parent reply other threads:[~2021-01-29 6:35 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 2:34 [PATCH] MdePkg/Include: Add CET instructions to Nasm.inc Sheng Wei
2021-01-29 6:35 ` Yao, Jiewen [this message]
2021-01-29 8:32 ` Sheng Wei
2021-01-29 9:20 ` Yao, Jiewen
2021-01-29 17:22 ` Michael D Kinney
2021-01-29 19:03 ` Bret Barkelew
2021-02-02 2:43 ` 回复: " gaoliming
2021-02-02 3:38 ` Sheng Wei
2021-02-02 3:50 ` 回复: " gaoliming
2021-02-02 15:23 ` [edk2-devel] " Michael D Kinney
2021-02-02 15:21 ` Michael D Kinney
2021-02-02 16:01 ` Laszlo Ersek
2021-02-03 0:06 ` Sheng Wei
2021-02-03 2:01 ` 回复: " gaoliming
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