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BY5PR11MB4226 Return-Path: michael.a.kubacki@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Michael Kubacki > -----Original Message----- > From: Desimone, Nathaniel L > Sent: Wednesday, November 13, 2019 10:07 PM > To: devel@edk2.groups.io > Cc: Kubacki, Michael A ; Chiu, Chasel > ; Gao, Liming > Subject: [edk2-platforms] [PATCH V1 10/13] MinPlatformPkg: Coding style > cleanups in MinPlatformPkg.dec >=20 > Cc: Michael Kubacki > Cc: Chasel Chiu > Cc: Liming Gao > Signed-off-by: Nate DeSimone > --- > .../Intel/MinPlatformPkg/MinPlatformPkg.dec | 281 +++++++++--------- > 1 file changed, 139 insertions(+), 142 deletions(-) >=20 > diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > index 856c17f737..c6b5881646 100644 > --- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > +++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec > @@ -14,184 +14,182 @@ >=20 >=20 >=20 >=20 > [Defines] >=20 > -DEC_SPECIFICATION =3D 0x00010017 >=20 > -PACKAGE_NAME =3D MinPlatformPkg >=20 > -PACKAGE_VERSION =3D 0.1 >=20 > -PACKAGE_GUID =3D 463B3B00-0D18-4a5f-90C0-D5B851D2574B >=20 > - >=20 > + DEC_SPECIFICATION =3D 0x00010017 >=20 > + PACKAGE_NAME =3D MinPlatformPkg >=20 > + PACKAGE_VERSION =3D 0.1 >=20 > + PACKAGE_GUID =3D 463B3B00-0D18-4a5f-90C0-D5B851D2574B >=20 >=20 >=20 > [Includes] >=20 > -Include >=20 > + Include >=20 >=20 >=20 > [Ppis] >=20 > -gEdkiiSiliconInitializedPpiGuid =3D {0x82a72dc8, 0x61ec, 0x403e, {0xb1, = 0x5a, > 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}} >=20 > + gEdkiiSiliconInitializedPpiGuid =3D {0x82a72dc8, 0x61ec, 0x403e, {0x= b1, 0x5a, > 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}} >=20 >=20 >=20 > -gPeiBaseMemoryTestPpiGuid =3D { 0xb6ec423c, 0x21d2, 0x490d, { 0x85= , > 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } } >=20 > -gPeiPlatformMemorySizePpiGuid =3D { 0x9a7ef41e, 0xc140, 0x4bd1, { 0xb8= , > 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6 } } >=20 > + gPeiBaseMemoryTestPpiGuid =3D {0xb6ec423c, 0x21d2, 0x490d, {0x= 85, > 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74}} >=20 > + gPeiPlatformMemorySizePpiGuid =3D {0x9a7ef41e, 0xc140, 0x4bd1, {0x= b8, > 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6}} >=20 >=20 >=20 > [Guids] >=20 > -gMinPlatformPkgTokenSpaceGuid =3D {0x69d13bf0, 0xaf91, 0x4d96, > {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} >=20 > + gMinPlatformPkgTokenSpaceGuid =3D {0x69d13bf0, 0xaf91, 0x4d96, {0x= aa, > 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}} >=20 >=20 >=20 > -gAdapterInfoPlatformTestPointGuid =3D {0x5381e3ea, 0xb77, 0x4580, {0xad, > 0xdf, 0xa9, 0x1c, 0x8, 0x3b, 0xf2, 0x97}} >=20 > + gAdapterInfoPlatformTestPointGuid =3D {0x5381e3ea, 0x0b77, 0x4580, > {0xad, 0xdf, 0xa9, 0x1c, 0x08, 0x3b, 0xf2, 0x97}} >=20 >=20 >=20 > -gBoardDetectGuid =3D {0x1792429d, 0x9d94, 0x4e08, {0xa0, 0x99,= 0x73, > 0xa2, 0x86, 0xae, 0xb4, 0x35}} >=20 > -gBoardPreMemInitGuid =3D {0x191dcfcf, 0xe16e, 0x43bb, {0x9b, 0xc3,= 0x6e, > 0xee, 0x6f, 0xab, 0x3a, 0x27}} >=20 > -gBoardPostMemInitGuid =3D {0xa0e933ea, 0xa69, 0x47fb, {0xb2, 0xab, > 0xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}} >=20 > -gBoardNotificationInitGuid =3D {0x78dbcabf, 0xc544, 0x4e6f, {0xaf, 0x3a,= 0x71, > 0x17, 0xd9, 0x42, 0x4e, 0xd1}} >=20 > + gBoardDetectGuid =3D {0x1792429d, 0x9d94, 0x4e08, {0x= a0, 0x99, > 0x73, 0xa2, 0x86, 0xae, 0xb4, 0x35}} >=20 > + gBoardPreMemInitGuid =3D {0x191dcfcf, 0xe16e, 0x43bb, {0x= 9b, 0xc3, > 0x6e, 0xee, 0x6f, 0xab, 0x3a, 0x27}} >=20 > + gBoardPostMemInitGuid =3D {0xa0e933ea, 0xa69, 0x47fb, {0x= b2, 0xab, > 0xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}} >=20 > + gBoardNotificationInitGuid =3D {0x78dbcabf, 0xc544, 0x4e6f, {0x= af, 0x3a, > 0x71, 0x17, 0xd9, 0x42, 0x4e, 0xd1}} >=20 >=20 >=20 > -gBoardAcpiTableGuid =3D {0xd70e9f57, 0x69f, 0x4bef, {0x96, 0xc0,= 0x84, > 0x74, 0xf4, 0xa2, 0x5f, 0x3a}} >=20 > -gBoardAcpiEnableGuid =3D {0x9727b610, 0xf645, 0x4429, {0x89, 0x21,= 0x2c, > 0x2b, 0x58, 0xdc, 0xbb, 0xa}} >=20 > + gBoardAcpiTableGuid =3D {0xd70e9f57, 0x69f, 0x4bef, {0x= 96, 0xc0, > 0x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}} >=20 > + gBoardAcpiEnableGuid =3D {0x9727b610, 0xf645, 0x4429, {0x= 89, 0x21, > 0x2c, 0x2b, 0x58, 0xdc, 0xbb, 0x0a}} >=20 >=20 >=20 > -gDefaultDataFileGuid =3D { 0x1ae42876, 0x008f, 0x= 4161, { 0xb2, > 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43 }} >=20 > -gDefaultDataOptSizeFileGuid =3D { 0x003e7b41, 0x98a2, 0x= 4be2, { > 0xb2, 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25 }} >=20 > + gDefaultDataFileGuid =3D {0x1ae42876, 0x008f, 0x4161, {0x= b2, 0xb7, > 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43}} >=20 > + gDefaultDataOptSizeFileGuid =3D {0x003e7b41, 0x98a2, 0x4be2, {0x= b2, > 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25}} >=20 >=20 >=20 > [LibraryClasses] >=20 >=20 >=20 > -PeiLib|Include/Library/PeiLib.h >=20 > + PeiLib|Include/Library/PeiLib.h >=20 >=20 >=20 > -AslUpdateLib|Include/Library/AslUpdateLib.h >=20 > -BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h >=20 > -BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h >=20 > + AslUpdateLib|Include/Library/AslUpdateLib.h >=20 > + BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h >=20 > + BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h >=20 >=20 >=20 > -SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h >=20 > -SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h >=20 > + SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h >=20 > + SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h >=20 >=20 >=20 > -SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h >=20 > + SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h >=20 >=20 >=20 > -BoardInitLib|Include/Library/BoardInitLib.h >=20 > -MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h >=20 > -SecBoardInitLib|Include/Library/SecBoardInitLib.h >=20 > + BoardInitLib|Include/Library/BoardInitLib.h >=20 > + MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h >=20 > + SecBoardInitLib|Include/Library/SecBoardInitLib.h >=20 >=20 >=20 > -TestPointLib|Include/Library/TestPointLib.h >=20 > -TestPointCheckLib|Include/Library/TestPointCheckLib.h >=20 > + TestPointLib|Include/Library/TestPointLib.h >=20 > + TestPointCheckLib|Include/Library/TestPointCheckLib.h >=20 >=20 >=20 > SetCacheMtrrLib|Include/Library/SetCacheMtrrLib.h >=20 >=20 >=20 > [PcdsFixedAtBuild, PcdsPatchableInModule] >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32| > 0x80000000 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000 > 040|UINT32|0x80000001 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT3 > 2|0x80000002 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32| > 0x80000000 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000 > 040|UINT32|0x80000001 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT3 > 2|0x80000002 >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32 > |0x9000000B >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0 > x9000000C >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32 > |0x9000000B >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0 > x9000000C >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0 > x9000000D >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x90 > 00000E >=20 > -gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0 > x9000000D >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x90 > 00000E >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014 >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x900 > 00012 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x900 > 00013 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x900 > 00012 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x900 > 00013 >=20 >=20 >=20 > -gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000 > 016 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UI > NT32|0x90000017 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x > 90000018 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000 > 016 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UI > NT32|0x90000017 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x > 90000018 >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90 > 000021 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x9000 > 0022 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90 > 000023 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90 > 000021 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x9000 > 0022 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90 > 000023 >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8| > 0x90000025 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x > 90000026 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x900 > 00027 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8| > 0x90000025 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x > 90000026 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x900 > 00027 >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0 > x65|UINT32|0x20000500 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30 > |UINT32|0x20000501 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x4 > 02|UINT32|0x20000502 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b| > UINT32|0x20000503 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25| > UINT32|0x20000504 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0 > x65|UINT32|0x20000500 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30 > |UINT32|0x20000501 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x4 > 02|UINT32|0x20000502 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b| > UINT32|0x20000503 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25| > UINT32|0x20000504 >=20 >=20 >=20 > -# >=20 > -# The PCDs are used to control the Windows SMM Security Mitigations Tabl= e > - Protection Flags >=20 > -# >=20 > -# BIT0: If set, expresses that for all synchronous SMM entries,SMM will > validate that input and output buffers lie entirely within the expected f= ixed > memory regions. >=20 > -# BIT1: If set, expresses that for all synchronous SMM entries, SMM will > validate that input and output pointers embedded within the fixed > communication buffer only refer to address ranges \ >=20 > -# that lie entirely within the expected fixed memory regions. >=20 > -# BIT2: Firmware setting this bit is an indication that it will not allo= w > reconfiguration of system resources via non-architectural mechanisms. >=20 > -# BIT3-31: Reserved >=20 > -# >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10 > 001006 >=20 > + # >=20 > + # The PCDs are used to control the Windows SMM Security Mitigations > Table - Protection Flags >=20 > + # >=20 > + # BIT0: If set, expresses that for all synchronous SMM entries,SMM wil= l > validate that input and output buffers lie entirely within the expected f= ixed > memory regions. >=20 > + # BIT1: If set, expresses that for all synchronous SMM entries, SMM wi= ll > validate that input and output pointers embedded within the fixed > communication buffer only refer to address ranges \ >=20 > + # that lie entirely within the expected fixed memory regions. >=20 > + # BIT2: Firmware setting this bit is an indication that it will not al= low > reconfiguration of system resources via non-architectural mechanisms. >=20 > + # BIT3-31: Reserved >=20 > + # >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10 > 001006 >=20 >=20 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOO > LEAN|0x00100206 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOO > LEAN|0x00100206 >=20 >=20 >=20 > -# >=20 > -# See HstiIbvFeatureBit.h for the definition >=20 > -# >=20 > -# #define HSTI_BYTE_ BIT >=20 > -# >=20 > -# It means BYTE BIT is for feature . >=20 > -# >=20 > -gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, > 0x00}|VOID*|0x00100301 >=20 > + # >=20 > + # See HstiIbvFeatureBit.h for the definition >=20 > + # >=20 > + # #define HSTI_BYTE_ BIT >=20 > + # >=20 > + # It means BYTE BIT is for feature . >=20 > + # >=20 > + gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, > 0x00, 0x00}|VOID*|0x00100301 >=20 >=20 >=20 > -# >=20 > -# See TestPointCheckLib.h for the definition >=20 > -# >=20 > -# #define TEST_POINT_BYTE_ BIT >=20 > -# >=20 > -# It means BYTE BIT is for feature . >=20 > -# BYTE0 BY= TE1 BYTE2 BYTE3 BYTE4 BYTE5 > BYTE6 BYTE7 BYTE8 >=20 > -# Stage debug: {0x03, 0= x00, 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > -# Stage memory: {0x03, 0= x07, 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > -# Stage UEFI boot: {0x03, 0= x07, 0x03, 0x05, 0x0F, 0x00, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > -# Stage OS boot: {0x03, 0= x07, 0x03, 0x05, 0x3F, 0x00, > 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > -# Stage Secure boot: {0x03, 0= x0F, 0x03, 0x1D, 0x3F, > 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > -# Stage Advanced: {0x03, 0= x0F, 0x03, 0x1D, 0x3F, > 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > -gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, > 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0= x00, > 0x00, 0x00}|VOID*|0x00100302 >=20 > + # >=20 > + # See TestPointCheckLib.h for the definition >=20 > + # >=20 > + # #define TEST_POINT_BYTE_ BIT >=20 > + # >=20 > + # It means BYTE BIT is for feature . >=20 > + # BYTE0 = BYTE1 BYTE2 BYTE3 BYTE4 BYTE5 > BYTE6 BYTE7 BYTE8 >=20 > + # Stage debug: {0x03,= 0x00, 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > + # Stage memory: {0x03,= 0x07, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > + # Stage UEFI boot: {0x03,= 0x07, 0x03, 0x05, 0x0F, > 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > + # Stage OS boot: {0x03,= 0x07, 0x03, 0x05, 0x3F, > 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > + # Stage Secure boot: {0x03,= 0x0F, 0x03, 0x1D, 0x3F, > 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > + # Stage Advanced: {0x03,= 0x0F, 0x03, 0x1D, 0x3F, > 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00} >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, > 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0= x00, > 0x00, 0x00}|VOID*|0x00100302 >=20 >=20 >=20 > -[PcdsFixedAtBuild, PcdsPatchableInModule] >=20 > -## >=20 > -## The Flash relevant PCD are ineffective and will be patched basing on = FDF > definitions during build. >=20 > -## Set all of them to 0 here to prevent from confusion. >=20 > -## >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|U > INT32|0x10000001 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x > 10000002 >=20 > - >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|U > INT32|0x30000004 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UI > NT32|0x30000005 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000| > UINT32|0x30000006 >=20 > - >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000| > UINT32|0x20000004 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000| > UINT32|0x20000005 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000 > |UINT32|0x20000006 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000 > |UINT32|0x20000007 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000| > UINT32|0x20000008 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x0000000 > 0|UINT32|0x20000009 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UI > NT32|0x2000000A >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UIN > T32|0x2000000B >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|U > INT32|0x2000000C >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT > 32|0x2000000D >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT > 32|0x2000000E >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UI > NT32|0x2000000F >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UIN > T32|0x20000010 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT > 32|0x20000011 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UI > NT32|0x20000012 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UI > NT32|0x20000013 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UI > NT32|0x20000014 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000| > UINT32|0x20000015 >=20 > - >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UIN > T32|0x20000016 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT > 32|0x20000017 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UI > NT32|0x20000018 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x0000 > 0000|UINT32|0x20000019 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x000 > 00000|UINT32|0x2000001A >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x > 00000000|UINT32|0x2000001B >=20 > - >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32 > |0x20000021 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32| > 0x20000022 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT3 > 2|0x20000023 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT3 > 2|0x20000024 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32 > |0x20000025 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT > 32|0x20000026 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32 > |0x20000027 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32| > 0x20000028 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT3 > 2|0x20000029 >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32 > |0x2000002A >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32 > |0x2000002B >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT > 32|0x2000002C >=20 > + ## >=20 > + ## The Flash relevant PCD are ineffective and will be patched basing o= n > FDF definitions during build. >=20 > + ## Set all of them to 0 here to prevent from confusion. >=20 > + ## >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|U > INT32|0x10000001 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x > 10000002 >=20 > + >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|U > INT32|0x30000004 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UI > NT32|0x30000005 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000| > UINT32|0x30000006 >=20 > + >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000| > UINT32|0x20000004 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000| > UINT32|0x20000005 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000 > |UINT32|0x20000006 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000 > |UINT32|0x20000007 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000| > UINT32|0x20000008 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x0000000 > 0|UINT32|0x20000009 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UI > NT32|0x2000000A >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UIN > T32|0x2000000B >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|U > INT32|0x2000000C >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT > 32|0x2000000D >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT > 32|0x2000000E >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UI > NT32|0x2000000F >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UIN > T32|0x20000010 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT > 32|0x20000011 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UI > NT32|0x20000012 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UI > NT32|0x20000013 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UI > NT32|0x20000014 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000| > UINT32|0x20000015 >=20 > + >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UIN > T32|0x20000016 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT > 32|0x20000017 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UI > NT32|0x20000018 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x0000 > 0000|UINT32|0x20000019 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x000 > 00000|UINT32|0x2000001A >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x > 00000000|UINT32|0x2000001B >=20 > + >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32 > |0x20000021 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32| > 0x20000022 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT3 > 2|0x20000023 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT3 > 2|0x20000024 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32 > |0x20000025 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT > 32|0x20000026 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32 > |0x20000027 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32| > 0x20000028 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT3 > 2|0x20000029 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32 > |0x2000002A >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32 > |0x2000002B >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT > 32|0x2000002C >=20 >=20 >=20 > [PcdsDynamic, PcdsDynamicEx] >=20 > - > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000 > 019 >=20 > + > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000 > 019 >=20 >=20 >=20 > [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx] >=20 >=20 >=20 > @@ -261,7 +259,7 @@ > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000 > 019 >=20 >=20 > [PcdsFixedAtBuild] >=20 >=20 >=20 > - # >=20 > + ## MinPlatform Boot Stage Selector >=20 > # Stage 1 - enable debug (system deadloop after debug init) >=20 > # Stage 2 - mem init (system deadloop after mem init) >=20 > # Stage 3 - boot to shell only >=20 > @@ -305,4 +303,3 @@ > gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000 > 019 > gMinPlatformPkgTokenSpaceGuid.PcdTpm2Enable > |FALSE|BOOLEAN|0xF00000A5 >=20 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdSmiHandlerProfileEnable|FALSE|BOOL > EAN|0xF00000A6 >=20 > gMinPlatformPkgTokenSpaceGuid.PcdPerformanceEnable > |FALSE|BOOLEAN|0xF00000A7 >=20 > - >=20 > -- > 2.23.0.windows.1