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Swatisri Kantamsetti To: gaoliming , 'Name' , "devel@edk2.groups.io" , "Sami.Mujawar@arm.com" , "Alexei.Fedorov@arm.com" , "pierre.gondois@arm.com" , "michael.d.kinney@intel.com" , "zhiguang.liu@intel.com" Subject: Re: [PATCH 2/2] MdePkg:IORT header update for IORT Rev E.e spec Thread-Topic: [PATCH 2/2] MdePkg:IORT header update for IORT Rev E.e spec Thread-Index: AQHZMOtoOkSr3FT9cEOUmGZ+efKCva6068cAgAiyIOM= Date: Fri, 3 Feb 2023 18:47:41 +0000 Message-ID: References: <13bc39429583f0129b2935970df6489191004ad2.1674671138.git.swatisrik@nvidia.com> <012701d933a6$cff11010$6fd33030$@byosoft.com.cn> In-Reply-To: <012701d933a6$cff11010$6fd33030$@byosoft.com.cn> Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: msip_labels: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: BY5PR12MB5543:EE_|PH7PR12MB8105:EE_ x-ms-office365-filtering-correlation-id: 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Just checking to see when this patch could be merge= d?

Thanks,
Swati
From: gaoliming <gaolimi= ng@byosoft.com.cn>
Sent: Saturday, January 28, 2023 10:59 PM
To: 'Name' <username@nvidia.com>; devel@edk2.groups.io <dev= el@edk2.groups.io>; Sami.Mujawar@arm.com <Sami.Mujawar@arm.com>; A= lexei.Fedorov@arm.com <Alexei.Fedorov@arm.com>; pierre.gondois@arm.co= m <pierre.gondois@arm.com>; michael.d.kinney@intel.com <michael.d.= kinney@intel.com>; zhiguang.liu@intel.com <zhiguang.liu@intel.com>
Cc: Swatisri Kantamsetti <swatisrik@nvidia.com>
Subject: =BB=D8=B8=B4: [PATCH 2/2] MdePkg:IORT header update for IOR= T Rev E.e spec
 
External email: Use caution opening links or attac= hments


Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn>

> -----=D3=CA=BC=FE=D4=AD=BC=FE-----
> =B7=A2=BC=FE=C8=CB: Name <username@nvidia.com>
> =B7=A2=CB=CD=CA=B1=BC=E4: 2023=C4=EA1=D4=C226=C8=D5 2:41
> =CA=D5=BC=FE=C8=CB: devel@edk2.groups.io; Sami.Mujawar@arm.com;
> Alexei.Fedorov@arm.com; pierre.gondois@arm.com;
> michael.d.kinney@intel.com; gaoliming@byosoft.com.cn;
> zhiguang.liu@intel.com
> =B3=AD=CB=CD: Swatisri Kantamsetti <swatisrik@nvidia.com>
> =D6=F7=CC=E2: [PATCH 2/2] MdePkg:IORT header update for IORT Rev E.e s= pec
>
> From: Swatisri Kantamsetti <swatisrik@nvidia.com>
>
> The IO Remapping Table, Platform Design Document, Revision E.e,
> Sept 2022 (https://nam11.safelinks.protection.outlook.com/?url= =3Dhttps%3A%2F%2Fdeveloper.arm.com%2Fdocumentation%2Fden0049%2Fee&data= =3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b45e32ea908db01bdfd93%7C43= 083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687766743781%7CUnknown%7CTWF= pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D= %7C3000%7C%7C%7C&sdata=3DYfn%2BzXkA2rKS4Y44XkU65gMLQy8OL3iqPF2AmyYmRNM%= 3D&reserved=3D0)
> added flags in SMMUv3 node for validity of ID mappings for MSIs
> related to control interrupts.
>
> Therefore, update the IORT header file to:
> - increment IORT table revision to 6
> - add support for DeviceId valid flag
>
> Signed-off-by: Swatisri Kantamsetti <swatisrik@nvidia.com>
> ---
>  MdePkg/Include/IndustryStandard/IoRemappingTable.h | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> index f48a4a95cd..544aa67a05 100644
> --- a/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> +++ b/MdePkg/Include/IndustryStandard/IoRemappingTable.h
> @@ -9,6 +9,8 @@
>    @par Reference(s):
>    - IO Remapping Table, Platform Design Document, Revi= sion E.d, Feb 2022
>      (https://nam11.safelinks.protection= .outlook.com/?url=3Dhttps%3A%2F%2Fdeveloper.arm.com%2Fdocumentation%2Fden00= 49%2F&data=3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b45e32ea908d= b01bdfd93%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687766743781%7= CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwi= LCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=3DYb238OnzfBZR8f9ad%2F5S0Ol3XetVpt= oMG24AO4Yj8To%3D&reserved=3D0)
> +  - IO Remapping Table, Platform Design Document, Revision E.e, = Sept 2022
> +      (https://nam11.safelinks.protecti= on.outlook.com/?url=3Dhttps%3A%2F%2Fdeveloper.arm.com%2Fdocumentation%2Fden= 0049%2F&data=3D05%7C01%7Cswatisrik%40nvidia.com%7C39d6cc086d3b45e32ea90= 8db01bdfd93%7C43083d15727340c1b7db39efd9ccc17a%7C0%7C0%7C638105687766743781= %7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haW= wiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=3DYb238OnzfBZR8f9ad%2F5S0Ol3XetV= ptoMG24AO4Yj8To%3D&reserved=3D0)
>
>    @par Glossary:
>    - Ref  : Reference
> @@ -24,6 +26,7 @@
>  #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00  0x0
>  #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_04  0x4 &= nbsp; //
> Deprecated
>  #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05  0x5
> +#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06  0x6
>
>  #define EFI_ACPI_IORT_TYPE_ITS_GROUP     0x0=
>  #define EFI_ACPI_IORT_TYPE_NAMED_COMP    0x1
> @@ -59,6 +62,7 @@
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE  &nbs= p; BIT0
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE   = ;  BIT1
>  #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN  BIT3 > +#define EFI_ACPI_IORT_SMMUv3_FLAG_DEVICEID_VALID    BI= T4
>
>  #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC   &nbs= p;       0x0
>  #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X  0x1 > --
> 2.17.1



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