From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web10.6428.1600911480940960790 for ; Wed, 23 Sep 2020 18:38:01 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@intel.onmicrosoft.com header.s=selector2-intel-onmicrosoft-com header.b=wr7q+kqh; spf=pass (domain: intel.com, ip: 134.134.136.126, mailfrom: aaron.li@intel.com) IronPort-SDR: ZyWUxyBARuT5jXe8iNJI4dyqGY27x6l0IE+OiO9jhC8zuTjA6KkSGP7CFcoheFeIgmW/kxAhM0 h/wWjMkElzUQ== X-IronPort-AV: E=McAfee;i="6000,8403,9753"; a="148815559" X-IronPort-AV: E=Sophos;i="5.77,296,1596524400"; d="scan'208";a="148815559" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Sep 2020 18:38:00 -0700 IronPort-SDR: 9E212nUKu0set766WMu8c8St3exMmuFUNJSRgY+jkVyFhgUsp7m/WlpkNg87i8EAHTMrCE7XXH t5mAGATMhDow== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,296,1596524400"; d="scan'208";a="511294135" Received: from orsmsx606.amr.corp.intel.com ([10.22.229.19]) by fmsmga006.fm.intel.com with ESMTP; 23 Sep 2020 18:37:59 -0700 Received: from orsmsx612.amr.corp.intel.com (10.22.229.25) by ORSMSX606.amr.corp.intel.com (10.22.229.19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 23 Sep 2020 18:37:59 -0700 Received: from orsmsx601.amr.corp.intel.com (10.22.229.14) by ORSMSX612.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Wed, 23 Sep 2020 18:37:58 -0700 Received: from ORSEDG602.ED.cps.intel.com (10.7.248.7) by orsmsx601.amr.corp.intel.com (10.22.229.14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5 via Frontend Transport; Wed, 23 Sep 2020 18:37:58 -0700 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (104.47.56.174) by edgegateway.intel.com (134.134.137.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.1713.5; Wed, 23 Sep 2020 18:37:56 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Vu9dfNfzZA4ByTac+TFF8cibXVpuzjw9MEwUcTcpIRKxogvU/V5+SX1kT58oEgcr2+LSAevnzW4ICFZc8+GIjnbNZhiKP9la8MkXJaYiI7SipXl34f0Q4Wj037Fkow08LJk/dSCIyx8n/81xPYYsGIQG3x8pyo6iIbwQdsoqa0NzzISXG5PC3WG05hKrZbW5/ehJYX50DCeJV8rLJtwKgqPRSfzVuuVFQxvxo89fTibiXJPy2bqH8nDz2J+ewxXIEA0hXAuns0VMUbVl1KvUWG8AkZFl76aC7BIivbwYj2OEkTODQenkRT5FSsvQ5TbJzw/zJj8Fhpg3o8QseRujqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aaPQ7wTj3BQE0Q66UH8nq4ovh9ym9U32exz711QOlYk=; b=L9SMXufl/SBvZyi++IV69Vpe+8oSmw0+BU8RejLGTTki9RgfaytR/fmP2IlBRHYZWBn4bYetAnDeh7p7GhoQNsT8dYOxWI8r7nWK60AR0XsAJXSYBsHBSHs/uy1+fShjwxIc2HYIHAipP66EVpIsgbUL1yXuoTkEZUNqlieJpNOGbUO7IsXQe7Uw07Qv04zsjalGmGl5QLLy8GJrANp+v6Jlk7vkT3AUo1ATwJ932Q+ccYX44V/ahLMFuABPDXWWpcOWsc5YxrubQzUPORGgiXnnHocqQJiH6noqn3GuH/T9eKTVDDfl0etKPbZbWG63oHk2w5SUhNkODSBfcQkVhA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel.onmicrosoft.com; s=selector2-intel-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=aaPQ7wTj3BQE0Q66UH8nq4ovh9ym9U32exz711QOlYk=; b=wr7q+kqhQYs/v562YYF0Bsuc2vY3VKowVffDJ19M2zaQDd2IqzDcOUOqsqr05opkzkBb/+DvKSb3kCwWZ8BgdgEmIu7ZHQHhDjEt2rnsAoohee0Pjc9dFzlog/VDUfDJWQ9FQqmNeqVxrAA29lAWIEKM3C/Bu9JHf65l750cUBI= Received: from BYAPR11MB3623.namprd11.prod.outlook.com (2603:10b6:a03:b5::18) by BYAPR11MB2600.namprd11.prod.outlook.com (2603:10b6:a02:c8::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3391.19; Thu, 24 Sep 2020 01:37:55 +0000 Received: from BYAPR11MB3623.namprd11.prod.outlook.com ([fe80::958c:2df9:71d3:4acd]) by BYAPR11MB3623.namprd11.prod.outlook.com ([fe80::958c:2df9:71d3:4acd%3]) with mapi id 15.20.3391.026; Thu, 24 Sep 2020 01:37:55 +0000 From: "Aaron Li" To: "Ni, Ray" , "devel@edk2.groups.io" CC: "Chaganty, Rangasai V" , "Fu, Siyuan" Subject: Re: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD for shadowing all microcode. Thread-Topic: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD for shadowing all microcode. Thread-Index: AQHWcH3xyuJZ6EUoG028rAn2IG6CzKl2AuzAgAFBYQA= Date: Thu, 24 Sep 2020 01:37:55 +0000 Message-ID: References: <20200812075452.9054-1-aaron.li@intel.com> In-Reply-To: Accept-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-originating-ip: [192.198.147.198] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 129ffda0-5448-45ab-e17a-08d8602a75ef x-ms-traffictypediagnostic: BYAPR11MB2600: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:5516; x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: NyGrC9bq6GUkJveIJ8j7ulDPmzWbCT0uiOKo0K/Lr2Q/CDSn212bqJVUIqWY/CMBdeurY2cBkvGYYfto/IyKf0s8ATmDW+u1MasamDOAW3TstoS4vaT1vbfeRbcrmT01xCe9DfIPv6ESDmnYqnYUElAYQ0YSozSrILknf9Oq1K2eJKKUb1+JcV5wAxLY/AAcomh5QMyRlF2BjlMfs+tS6QyaAqJma3wbZEUhBYn8smlRBpvNms4XblgXxpa67/aKu5d9lnTpdmqxcyU32cUyNsLOGpcaNUrm+0X/GS8yYagKxw6I7ydp59odb3gx4tU4QiKCdcLdMnxDnqPHGZ3Iu55gq/8ymJxjRxOvT0xiGvhYUG/V8K1w6mPNbayi1gmIh292eAVnFR0LjVPctvwYQ53UlSh8eKxg9bAdaoGDkTnXN3iHaHRE5R2NbnIJH5c+MmQaVu8xkIHlaeGV36qx7A== x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:BYAPR11MB3623.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(4636009)(376002)(136003)(346002)(366004)(39860400002)(396003)(71200400001)(110136005)(52536014)(5660300002)(2906002)(8676002)(54906003)(478600001)(8936002)(966005)(4326008)(33656002)(86362001)(66556008)(66946007)(76116006)(64756008)(66476007)(83380400001)(26005)(9686003)(66446008)(7696005)(53546011)(107886003)(55016002)(6506007)(186003)(316002)(14943795004);DIR:OUT;SFP:1102; x-ms-exchange-antispam-messagedata: N4CF4vDoGTf5J1G3aURKTIQ11DbGMDRC1dGfk4zzjE29Z6ZHpwRB/JDFyt0j+NHKlADjRiK8GrdylM7v8Wmb89Thi4IxOgi4xJ3N+8bzUMukCOSp4+8mzlfrk6ihUXEbpQEuBJi5Zf8p6eqwDZoUE8gr1oOVRs6jxFYriIHuexqHIXUUm58kE63P+H71mT/1AhOFhJiD9gXPIlqEl/EhHwsKjxXNuMsJvxwIslbTUZ7v9mBVdtVyE1lhT+X1HuJnaPJG5vyVPxFOBxuP1hrdVMQ+mKlDwCGFgKBRIIupkJ6S1A9g9kCER8a4JTiUBW4Rt/tfMAgkMLf3CSe+Z4N1nKcgs7xL81yoMFfowO5JJQAe15rLDZqbu7qFyI+E8WBJwerVnQWq+JMeB1CYEjpc+64ed70Ej3pFUiJow8rDlp76mzFEuy1lRRQLUGzER7oDF3rS/3YsquZY17VibRUV/R71/54jxGsRk3krsmlf4IVoB5CrXIrB05tjyvLTVApMGIcF50ha1lXg33otVuFE5jbwxlWaF87CuDgOEZY6sNYTkU1QDZRXIgVtgboA0lnkA4h4ZD9jo7zS3WG8JlCNw7zy+bhaA0N8YG9WLEIaEFE91/MYeL9NLifWAar11F0FOV66/iTz7bwc3iukT397Gw== MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BYAPR11MB3623.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 129ffda0-5448-45ab-e17a-08d8602a75ef X-MS-Exchange-CrossTenant-originalarrivaltime: 24 Sep 2020 01:37:55.4634 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: kLdLh42yv0/7bhBH/n1txNwgs4+bom4uOcx8/IbEnYzQYKaxpx2NVejhcw4Afe7uEkx8HAPnqlRcDhdJJGC+PQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR11MB2600 Return-Path: aaron.li@intel.com X-OriginatorOrg: intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Ray, Accroding to https://edk2.groups.io/g/devel/files/Designs/2020/0214/Support= %20the%202nd%20Microcode%20FV%20Flash%20Region.pdf The ShadowMicrocodePei provide a FIT based shadow microcode ppi to MpInitLi= b. It's needed. Best, Aaron > -----Original Message----- > From: Ni, Ray > Sent: Wednesday, September 23, 2020 2:25 PM > To: Li, Aaron ; devel@edk2.groups.io > Cc: Chaganty, Rangasai V ; Fu, Siyuan > > Subject: RE: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD > for shadowing all microcode. >=20 > MpInitLib already contains logic to shadow microcode to memory. > Is this still needed? >=20 > > -----Original Message----- > > From: Li, Aaron > > Sent: Wednesday, August 12, 2020 3:55 PM > > To: devel@edk2.groups.io > > Cc: Ni, Ray ; Chaganty, Rangasai V > > ; Fu, Siyuan > > Subject: [PATCH v1 1/1] IntelSiliconPkg/ShadowMicrocodePei: Add PCD for > > shadowing all microcode. > > > > This patch is to add a PCD PcdShadowAllMicrocode to support shadowing > > all microcode patch to memory. > > > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2891 > > > > Signed-off-by: Aaron Li > > Cc: Ray Ni > > Cc: Rangasai V Chaganty > > Cc: Siyuan Fu > > --- > > > > > Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodeP > ei.c > > | 4 ++++ > > > > > Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocodeP > ei.i > > nf | 3 +++ > > Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec = | 7 +++++++ > > 3 files changed, 14 insertions(+) > > > > diff --git > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .c > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .c > > index 8d6574f66794..5c7ee6910c8e 100644 > > --- > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .c > > +++ > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .c > > @@ -132,6 +132,10 @@ IsMicrocodePatchNeedLoad ( > > CPU_MICROCODE_EXTENDED_TABLE *ExtendedTable; > > > > UINTN Index; > > > > > > > > + if (FeaturePcdGet (PcdShadowAllMicrocode)) { > > > > + return TRUE; > > > > + } > > > > + > > > > // > > > > // Check the 'ProcessorSignature' and 'ProcessorFlags' in microcode = patch > > header. > > > > // > > > > diff --git > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .inf > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .inf > > index 019400ab31da..581780add891 100644 > > --- > > > a/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .inf > > +++ > > > b/Silicon/Intel/IntelSiliconPkg/Feature/ShadowMicrocode/ShadowMicrocod > ePei > > .inf > > @@ -39,5 +39,8 @@ [Guids] > > gEdkiiMicrocodeShadowInfoHobGuid > > > > gEdkiiMicrocodeStorageTypeFlashGuid > > > > > > > > +[Pcd] > > > > + gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode > > > > + > > > > [Depex] > > > > TRUE > > > > diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > index e4a7fec3a3ea..3a12fe99fac6 100644 > > --- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > +++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec > > @@ -76,6 +76,13 @@ [Protocols] > > # Include/Protocol/PlatformDeviceSecurityPolicy.h > > > > gEdkiiDeviceSecurityPolicyProtocolGuid =3D {0x7ea41a99, 0x5e32, 0x4c= 97, > > {0x88, 0xc4, 0xd6, 0xe7, 0x46, 0x84, 0x9, 0xd4}} > > > > > > > > +[PcdsFeatureFlag] > > > > + ## Indicates if all microcode update patches shall be shadowed to > memory. > > > > + # TRUE - All microcode patches will be shadowed.
> > > > + # FALSE - Only the microcode for current present processors will b= e > > shadowed.
> > > > + # @Prompt Shadow all microcode update patches. > > > > + > > > gIntelSiliconPkgTokenSpaceGuid.PcdShadowAllMicrocode|FALSE|BOOLEAN| > 0x > > 00000006 > > > > + > > > > [PcdsFixedAtBuild, PcdsPatchableInModule] > > > > ## Error code for VTd error.

> > > > # EDKII_ERROR_CODE_VTD_ERROR =3D (EFI_IO_BUS_UNSPECIFIED | > > (EFI_OEM_SPECIFIC | 0x00000000)) =3D 0x02008000
> > > > -- > > 2.23.0.windows.1