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Thread-Topic: [edk2-platforms: PATCH v2 2/6] MinPlatformPkg: Add SetCacheLib library class. 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Michael Kubacki > -----Original Message----- > From: Chiu, Chasel > Sent: Wednesday, October 30, 2019 5:30 PM > To: devel@edk2.groups.io > Cc: Kubacki, Michael A ; Desimone, Nathaniel > L ; Gao, Liming > Subject: [edk2-platforms: PATCH v2 2/6] MinPlatformPkg: Add SetCacheLib > library class. >=20 > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D2314 >=20 > MinPlatformPkg PlatformInit modules to consume SetCacheLib. >=20 > Cc: Michael Kubacki > Cc: Nate DeSimone > Cc: Liming Gao > Signed-off-by: Chasel Chiu > --- >=20 > Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPo= s > tMem.c | 149 +---------------------------------------------------------= ----------------- > -------------------------------------------------------------------------= - >=20 > Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPr= e > Mem.c | 164 ++--------------------------------------------------------= ----------------- > -------------------------------------------------------------------------= ---------------- >=20 > Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPo= s > tMem.inf | 11 +---------- >=20 > Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInitPr= e > Mem.inf | 7 ++----- > 4 files changed, 6 insertions(+), 325 deletions(-) >=20 > diff --git > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > ostMem.c > b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > ostMem.c > index 70e6b9a495..df64d4fc0d 100644 > --- > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > ostMem.c > +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Platfor > +++ mInitPostMem.c > @@ -13,8 +13,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include > #include #include > -#include -#include > >=20 > #include > #include @@ -22,6 +20,7 @@ SPDX- > License-Identifier: BSD-2-Clause-Patent #include > #include #include > +#include >=20 > EFI_STATUS > EFIAPI > @@ -38,152 +37,6 @@ static EFI_PEI_NOTIFY_DESCRIPTOR > mEndOfPeiNotifyList =3D { }; >=20 > /** > - Update MTRR setting and set write back as default memory attribute. > - > - @retval EFI_SUCCESS The function completes successfully. > - @retval Others Some error occurs. > -**/ > -EFI_STATUS > -EFIAPI > -SetCacheMtrrAfterEndOfPei ( > - VOID > - ) > -{ > - EFI_STATUS Status; > - MTRR_SETTINGS MtrrSetting; > - EFI_PEI_HOB_POINTERS Hob; > - UINT64 MemoryBase; > - UINT64 MemoryLength; > - UINT64 Power2Length; > - EFI_BOOT_MODE BootMode; > - UINTN Index; > - UINT64 SmramSize; > - UINT64 SmramBase; > - EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *SmramHobDescriptorBlock; > - Status =3D PeiServicesGetBootMode (&BootMode); > - ASSERT_EFI_ERROR (Status); > - > - if (BootMode =3D=3D BOOT_ON_S3_RESUME) { > - return EFI_SUCCESS; > - } > - // > - // Clear the CAR Settings > - // > - ZeroMem(&MtrrSetting, sizeof(MTRR_SETTINGS)); > - > - // > - // Default Cachable attribute will be set to WB to support large memor= y > size/hot plug memory > - // > - MtrrSetting.MtrrDefType &=3D ~((UINT64)(0xFF)); > - MtrrSetting.MtrrDefType |=3D (UINT64) CacheWriteBack; > - > - // > - // Set fixed cache for memory range below 1MB > - // > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - 0x0, > - 0xA0000, > - CacheWriteBack > - ); > - ASSERT_EFI_ERROR (Status); > - > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - 0xA0000, > - 0x20000, > - CacheUncacheable > - ); > - ASSERT_EFI_ERROR (Status); > - > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - 0xC0000, > - 0x40000, > - CacheWriteProtected > - ); > - ASSERT_EFI_ERROR ( Status); > - > - // > - // PI SMM IPL can't set SMRAM to WB because at that time CPU ARCH > protocol is not available. > - // Set cacheability of SMRAM to WB here to improve SMRAM initializatio= n > performance. > - // > - SmramSize =3D 0; > - SmramBase =3D 0; > - Status =3D PeiServicesGetHobList ((VOID **) &Hob.Raw); > - while (!END_OF_HOB_LIST (Hob)) { > - if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_GUID_EXTENSION) { > - if (CompareGuid (&Hob.Guid->Name, &gEfiSmmSmramMemoryGuid)) { > - SmramHobDescriptorBlock =3D (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *) > (Hob.Guid + 1); > - for (Index =3D 0; Index < SmramHobDescriptorBlock- > >NumberOfSmmReservedRegions; Index++) { > - if (SmramHobDescriptorBlock->Descriptor[Index].PhysicalStart > > 0x100000) { > - SmramSize +=3D SmramHobDescriptorBlock- > >Descriptor[Index].PhysicalSize; > - if (SmramBase =3D=3D 0 || SmramBase > SmramHobDescriptorBloc= k- > >Descriptor[Index].CpuStart) { > - SmramBase =3D SmramHobDescriptorBlock- > >Descriptor[Index].CpuStart; > - } > - } > - } > - break; > - } > - } > - Hob.Raw =3D GET_NEXT_HOB (Hob); > - } > - > - // > - // Set non system memory as UC > - // > - MemoryBase =3D 0x100000000; > - > - // > - // Add IED size to set whole SMRAM as WB to save MTRR count > - // > - MemoryLength =3D MemoryBase - (SmramBase + SmramSize); > - while (MemoryLength !=3D 0) { > - Power2Length =3D GetPowerOfTwo64 (MemoryLength); > - MemoryBase -=3D Power2Length; > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - MemoryBase, > - Power2Length, > - CacheUncacheable > - ); > - ASSERT_EFI_ERROR (Status); > - MemoryLength -=3D Power2Length; > - } > - > - DEBUG ((DEBUG_INFO, "PcdPciReservedMemAbove4GBLimit - 0x%lx\n", > PcdGet64 (PcdPciReservedMemAbove4GBLimit))); > - DEBUG ((DEBUG_INFO, "PcdPciReservedMemAbove4GBBase - 0x%lx\n", > PcdGet64 (PcdPciReservedMemAbove4GBBase))); > - if (PcdGet64 (PcdPciReservedMemAbove4GBLimit) > PcdGet64 > (PcdPciReservedMemAbove4GBBase)) { > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - PcdGet64 (PcdPciReservedMemAbove4GBBase), > - PcdGet64 (PcdPciReservedMemAbove4GBLimit) - P= cdGet64 > (PcdPciReservedMemAbove4GBBase) + 1, > - CacheUncacheable > - ); > - ASSERT_EFI_ERROR ( Status); > - } > - > - DEBUG ((DEBUG_INFO, "PcdPciReservedPMemAbove4GBLimit - 0x%lx\n", > PcdGet64 (PcdPciReservedPMemAbove4GBLimit))); > - DEBUG ((DEBUG_INFO, "PcdPciReservedPMemAbove4GBBase - 0x%lx\n", > PcdGet64 (PcdPciReservedPMemAbove4GBBase))); > - if (PcdGet64 (PcdPciReservedPMemAbove4GBLimit) > PcdGet64 > (PcdPciReservedPMemAbove4GBBase)) { > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - PcdGet64 (PcdPciReservedPMemAbove4GBBase), > - PcdGet64 (PcdPciReservedPMemAbove4GBLimit) - = PcdGet64 > (PcdPciReservedPMemAbove4GBBase) + 1, > - CacheUncacheable > - ); > - ASSERT_EFI_ERROR ( Status); > - } > - > - // > - // Update MTRR setting from MTRR buffer > - // > - MtrrSetAllMtrrs (&MtrrSetting); > - > - return Status; > -} > - > -/** > This function handles PlatformInit task at the end of PEI >=20 > @param[in] PeiServices Pointer to PEI Services Table. > diff --git > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > reMem.c > b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > reMem.c > index 2690511abe..731bc234b0 100644 > --- > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > reMem.c > +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Platfor > +++ mInitPreMem.c > @@ -1,7 +1,7 @@ > /** @file > Source code file for Platform Init Pre-Memory PEI module >=20 > -Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> +Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.
> SPDX-License-Identifier: BSD-2-Clause-Patent >=20 > **/ > @@ -15,7 +15,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include > #include #include > -#include #include > #include #include > @@ -26,6 +25,7 @@ SPDX-License-Identifier: > BSD-2-Clause-Patent #include > #include > #include > +#include > #include #include > #include @@ - > 319,166 +319,6 @@ Done: > return EFI_SUCCESS; > } >=20 > -/** > - Set Cache Mtrr. > -**/ > -VOID > -SetCacheMtrr ( > - VOID > - ) > -{ > - EFI_STATUS Status; > - EFI_PEI_HOB_POINTERS Hob; > - MTRR_SETTINGS MtrrSetting; > - UINT64 MemoryBase; > - UINT64 MemoryLength; > - UINT64 LowMemoryLength; > - UINT64 HighMemoryLength; > - EFI_BOOT_MODE BootMode; > - EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute; > - UINT64 CacheMemoryLength; > - > - /// > - /// Reset all MTRR setting. > - /// > - ZeroMem(&MtrrSetting, sizeof(MTRR_SETTINGS)); > - > - /// > - /// Cache the Flash area as WP to boost performance > - /// > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - (UINTN) PcdGet32 (PcdFlashAreaBaseAddress), > - (UINTN) PcdGet32 (PcdFlashAreaSize), > - CacheWriteProtected > - ); > - ASSERT_EFI_ERROR (Status); > - > - /// > - /// Update MTRR setting from MTRR buffer for Flash Region to be WP to > boost performance > - /// > - MtrrSetAllMtrrs (&MtrrSetting); > - > - /// > - /// Set low to 1 MB. Since 1MB cacheability will always be set > - /// until override by CSM. > - /// Initialize high memory to 0. > - /// > - LowMemoryLength =3D 0x100000; > - HighMemoryLength =3D 0; > - ResourceAttribute =3D ( > - EFI_RESOURCE_ATTRIBUTE_PRESENT | > - EFI_RESOURCE_ATTRIBUTE_INITIALIZED | > - EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE | > - EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE > - ); > - > - Status =3D PeiServicesGetBootMode (&BootMode); > - ASSERT_EFI_ERROR (Status); > - > - if (BootMode !=3D BOOT_ON_S3_RESUME) { > - ResourceAttribute |=3D EFI_RESOURCE_ATTRIBUTE_TESTED; > - } > - > - Status =3D PeiServicesGetHobList ((VOID **) &Hob.Raw); > - while (!END_OF_HOB_LIST (Hob)) { > - if (Hob.Header->HobType =3D=3D EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) { > - if ((Hob.ResourceDescriptor->ResourceType =3D=3D > EFI_RESOURCE_SYSTEM_MEMORY) || > - ((Hob.ResourceDescriptor->ResourceType =3D=3D > EFI_RESOURCE_MEMORY_RESERVED) && > - (Hob.ResourceDescriptor->ResourceAttribute =3D=3D ResourceAtt= ribute)) > - ) { > - if (Hob.ResourceDescriptor->PhysicalStart >=3D 0x100000000ULL) { > - HighMemoryLength +=3D Hob.ResourceDescriptor->ResourceLength; > - } else if (Hob.ResourceDescriptor->PhysicalStart >=3D 0x100000) = { > - LowMemoryLength +=3D Hob.ResourceDescriptor->ResourceLength; > - } > - } > - } > - > - Hob.Raw =3D GET_NEXT_HOB (Hob); > - } > - > - DEBUG ((DEBUG_INFO, "Memory Length (Below 4GB) =3D %lx.\n", > LowMemoryLength)); > - DEBUG ((DEBUG_INFO, "Memory Length (Above 4GB) =3D %lx.\n", > HighMemoryLength)); > - > - /// > - /// Assume size of main memory is multiple of 256MB > - /// > - MemoryLength =3D (LowMemoryLength + 0xFFFFFFF) & 0xF0000000; > - MemoryBase =3D 0; > - > - CacheMemoryLength =3D MemoryLength; > - /// > - /// Programming MTRRs to avoid override SPI region with UC when MAX > TOLUD Length >=3D 3.5GB > - /// > - if (MemoryLength > 0xDC000000) { > - CacheMemoryLength =3D 0xC0000000; > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - MemoryBase, > - CacheMemoryLength, > - CacheWriteBack > - ); > - ASSERT_EFI_ERROR (Status); > - > - MemoryBase =3D 0xC0000000; > - CacheMemoryLength =3D MemoryLength - 0xC0000000; > - if (MemoryLength > 0xE0000000) { > - CacheMemoryLength =3D 0x20000000; > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - MemoryBase, > - CacheMemoryLength, > - CacheWriteBack > - ); > - ASSERT_EFI_ERROR (Status); > - > - MemoryBase =3D 0xE0000000; > - CacheMemoryLength =3D MemoryLength - 0xE0000000; > - } > - } > - > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - MemoryBase, > - CacheMemoryLength, > - CacheWriteBack > - ); > - ASSERT_EFI_ERROR (Status); > - > - if (LowMemoryLength !=3D MemoryLength) { > - MemoryBase =3D LowMemoryLength; > - MemoryLength -=3D LowMemoryLength; > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - MemoryBase, > - MemoryLength, > - CacheUncacheable > - ); > - ASSERT_EFI_ERROR (Status); > - } > - > - /// > - /// VGA-MMIO - 0xA0000 to 0xC0000 to be UC > - /// > - Status =3D MtrrSetMemoryAttributeInMtrrSettings ( > - &MtrrSetting, > - 0xA0000, > - 0x20000, > - CacheUncacheable > - ); > - ASSERT_EFI_ERROR (Status); > - > - /// > - /// Update MTRR setting from MTRR buffer > - /// > - MtrrSetAllMtrrs (&MtrrSetting); > - > - return ; > -} > - > VOID > ReportCpuHob ( > VOID > diff --git > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > ostMem.inf > b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > ostMem.inf > index 0736c8d494..a14f20f150 100644 > --- > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > ostMem.inf > +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Platfor > +++ mInitPostMem.inf > @@ -23,15 +23,14 @@ > BaseMemoryLib > HobLib > PeiServicesLib > - MtrrLib > BoardInitLib > TestPointCheckLib > + SetCacheLib >=20 > [Packages] > MinPlatformPkg/MinPlatformPkg.dec > MdeModulePkg/MdeModulePkg.dec > MdePkg/MdePkg.dec > - UefiCpuPkg/UefiCpuPkg.dec >=20 > [Sources] > PlatformInitPostMem.c > @@ -44,14 +43,6 @@ >=20 > [Protocols] >=20 > -[Guids] > - gEfiSmmSmramMemoryGuid ## CONSUMES > - > [Depex] > gEfiPeiMemoryDiscoveredPpiGuid >=20 > -[Pcd] > - gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBBase > - gMinPlatformPkgTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit > - gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase > - gMinPlatformPkgTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit > diff --git > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > reMem.inf > b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > reMem.inf > index 2c3a13106e..de5f11f829 100644 > --- > a/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/PlatformInit= P > reMem.inf > +++ b/Platform/Intel/MinPlatformPkg/PlatformInit/PlatformInitPei/Platfor > +++ mInitPreMem.inf > @@ -1,7 +1,7 @@ > ### @file > # Component information file for the Platform Init Pre-Memory PEI module= . > # > -# Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.
> +# Copyright (c) 2017 - 2019, Intel Corporation. All rights > +reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -22,23 +22,20 @@ > HobLib > IoLib > MemoryAllocationLib > - MtrrLib > PeimEntryPoint > PeiServicesLib > ReportFvLib > TestPointCheckLib > TimerLib > + SetCacheLib >=20 > [Packages] > MinPlatformPkg/MinPlatformPkg.dec > MdeModulePkg/MdeModulePkg.dec > MdePkg/MdePkg.dec > - UefiCpuPkg/UefiCpuPkg.dec >=20 > [Pcd] > gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode ## > CONSUMES > - gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress ## > CONSUMES > - gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize ## CONSUM= ES > gMinPlatformPkgTokenSpaceGuid.PcdStopAfterDebugInit ## > CONSUMES > gMinPlatformPkgTokenSpaceGuid.PcdStopAfterMemInit ## > CONSUMES >=20 > -- > 2.13.3.windows.1