From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web10.3015.1663985804187717964 for ; Fri, 23 Sep 2022 19:16:45 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from lichao-PC (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Dx_2uFaC5jhgUhAA--.56625S2; Sat, 24 Sep 2022 10:16:37 +0800 (CST) Date: Sat, 24 Sep 2022 10:16:37 +0800 From: "Chao Li" To: =?utf-8?Q?=22Kinney=2C_Michael_D=22?= Cc: "=?utf-8?Q?=22devel=40edk2.groups.io=22?=" , =?utf-8?Q?=22Gao=2C_Liming=22?= , =?utf-8?Q?=22Liu=2C_Zhiguang=22?= Message-ID: In-Reply-To: References: Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch definitions. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Dx_2uFaC5jhgUhAA--.56625S2 X-Coremail-Antispam: 1UD129KBjvAXoWfGrW5GF48Aw1rJFy3Jw47Jwb_yoW8JFW3Wo W7Ga1Skw17Aw4YkrWDWw42gayjkr1vkw45Jr4FgFWkKa1xt3Z8K3ykJw4xZr1rtFy0qws8 GFyqqas5ZFW8Jwn5n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUYM7k0a2IF6w4kM7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0 x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj4 1l84x0c7CEw4AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0 I7IYx2IY6xkF7I0E14v26r1j6r4UM28EF7xvwVC2z280aVAFwI0_Cr0_Gr1UM28EF7xvwV C2z280aVCY1x0267AKxVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVAY j202j2C_Jr0_Gr1l5I8CrVACY4xI64kE6c02F40Ex7xfMc02F40Ew4AK048IF2xKxVW8JV W5JwAv7VC0I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCj c4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMx8GjcxK6IxK0xIIj40E5I8CrwCY02Avz4vE-s yl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWU GVWUWwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7V AKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r1j 6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42 IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07bo2-OUUUUU= X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQASCGMtod0D2QAest Content-Type: multipart/alternative; boundary="632e6885_445b936f_19a0" --632e6885_445b936f_19a0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Hi Mkie, I responded to your comment below. Thanks, Chao -------- On 9=E6=9C=88 23 2022, at 11:46 =E6=99=9A=E4=B8=8A, =22Kinney, Michael D=22= wrote: > One comment below. > > Mike > > -----Original Message----- > > =46rom: devel=40edk2.groups.io On Behalf Of = Chao Li > > Sent: Wednesday, September 14, 2022 2:41 AM > > To: devel=40edk2.groups.io > > Cc: Kinney, Michael D ; Gao, Liming ; Liu, Zhiguang > > Subject: =5Bedk2-devel=5D =5BPATCH v2 22/34=5D MdePkg/Include: LoongA= rch definitions. > > > > RE=46: https://bugzilla.tianocore.org/show=5Fbug.cgi=3Fid=3D4053 > > > > Add LoongArch processor related definitions. > > > > =46or the Http boot and PXE boot types seeing this URL section =22Pro= cessor > > Architecture Type=22 for the LOONGARCH values: > > https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.= xhtml > > > > =46or definitions of PE/CO=46=46 and LOONGARCH relocation types, see = the > > =22Machine Types=22 and =22Basic Relocation Types=22 sections of this= URL for > > LOONGARCH values: > > https://docs.microsoft.com/en-us/windows/win32/debug/pe-format > > > > =46or the register definitions of exceptions context, see the UE=46I = V2.10 > > 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH > > definitions: > > https://uefi.org/specs/UE=46I/2.10/18=5FProtocols=5FDebugger=5FSuppor= t.html > > > > Cc: Michael D Kinney > > Cc: Liming Gao > > Cc: Zhiguang Liu > > > > Signed-off-by: Chao Li > > --- > > MdePkg/Include/IndustryStandard/PeImage.h =7C 9 ++ > > MdePkg/Include/Protocol/DebugSupport.h =7C 107 ++++++++++++++++++++--= > > MdePkg/Include/Protocol/PxeBaseCode.h =7C 3 + > > MdePkg/Include/Uefi/UefiBaseType.h =7C 14 +++ > > MdePkg/Include/Uefi/UefiSpec.h =7C 16 ++-- > > 5 files changed, 136 insertions(+), 13 deletions(-) > > > > diff --git a/MdePkg/Include/IndustryStandard/PeImage.h b/MdePkg/Inclu= de/IndustryStandard/PeImage.h > > index 3109dc20f8..dd4cc25483 100644 > > --- a/MdePkg/Include/IndustryStandard/PeImage.h > > +++ b/MdePkg/Include/IndustryStandard/PeImage.h > > =40=40 -10,6 +10,7 =40=40 > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > > > > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved. > > > > Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Develo= pment LP. All rights reserved.
> > > > +Portions Copyright (c) 2022, Loongson Technology Corporation Limited= . All rights reserved.
> > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > =40=40 -38,6 +39,8 =40=40 SPDX-License-Identifier: BSD-2-Clause-Paten= t > > =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV32 0x5032 > > > > =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV64 0x5064 > > > > =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV128 0x5128 > > > > +=23define IMAGE=5F=46ILE=5FMACHINE=5FLOONGARCH32 0x6232 > > > > +=23define IMAGE=5F=46ILE=5FMACHINE=5FLOONGARCH64 0x6264 > > > > > > > > // > > > > // EXE file formats > > > > =40=40 -503,6 +506,12 =40=40 typedef struct =7B > > =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12I 7 > > > > =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12S 8 > > > > > > > > +// > > > > +// Relocation types of LoongArch processor. > > > > +// > > > > +=23define E=46I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH32=5FMARK=5FLA 8 > > > > +=23define E=46I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH64=5FMARK=5FLA 8 > > > > + > > > > /// > > > > /// Line number format. > > > > /// > > > > diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/= Protocol/DebugSupport.h > > index ec5b92a5c5..2b0ae2d157 100644 > > --- a/MdePkg/Include/Protocol/DebugSupport.h > > +++ b/MdePkg/Include/Protocol/DebugSupport.h > > =40=40 -654,17 +654,110 =40=40 typedef struct =7B > > UINT64 X31; > > > > =7D E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64; > > > > > > > > +// > > > > +// LoongArch processor exception types. > > > > +// > > > > +=23define EXCEPT=5FLOONGARCH=5FINT 0 > > > > +=23define EXCEPT=5FLOONGARCH=5FPIL 1 > > > > +=23define EXCEPT=5FLOONGARCH=5FPIS 2 > > > > +=23define EXCEPT=5FLOONGARCH=5FPI=46 3 > > > > +=23define EXCEPT=5FLOONGARCH=5FPME 4 > > > > +=23define EXCEPT=5FLOONGARCH=5FPNR 5 > > > > +=23define EXCEPT=5FLOONGARCH=5FPNX 6 > > > > +=23define EXCEPT=5FLOONGARCH=5FPPI 7 > > > > +=23define EXCEPT=5FLOONGARCH=5FADE 8 > > > > +=23define EXCEPT=5FLOONGARCH=5FALE 9 > > > > +=23define EXCEPT=5FLOONGARCH=5FBCE 10 > > > > +=23define EXCEPT=5FLOONGARCH=5FSYS 11 > > > > +=23define EXCEPT=5FLOONGARCH=5FBRK 12 > > > > +=23define EXCEPT=5FLOONGARCH=5FINE 13 > > > > +=23define EXCEPT=5FLOONGARCH=5FIPE 14 > > > > +=23define EXCEPT=5FLOONGARCH=5F=46PD 15 > > > > +=23define EXCEPT=5FLOONGARCH=5FSXD 16 > > > > +=23define EXCEPT=5FLOONGARCH=5FASXD 17 > > > > +=23define EXCEPT=5FLOONGARCH=5F=46PE 18 > > > > +=23define EXCEPT=5FLOONGARCH=5FTBR 64 // =46or code only, there is n= o such type in the ISA spec, the TLB refill is defined for an > > independent exception. > > > > + > > > > +// > > > > +// LoongArch processor Interrupt types. > > > > +// > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FSIP0 0 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FSIP1 1 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP0 2 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP1 3 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP2 4 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP3 5 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP4 6 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP5 7 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP6 8 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP7 9 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FPMC 10 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FTIMER 11 > > > > +=23define EXCEPT=5FLOONGARCH=5FINT=5FIPI 12 > > > > + > > > > +// > > > > +// =46or coding convenience, define the maximum valid > > > > +// LoongArch interrupt. > > > > +// > > > > +=23define MAX=5FLOONGARCH=5FINTERRUPT 14 > > Should this define be moved into the libs/modules that uses > this define=3F Prefer to only see definitions from specs in > this file. > Chao Li: Yes, this macro is defined in the UE=46I Spec V2.10 section 18.2= .5. If you insist on your opinion, I can remove it in this file. So what's yo= ur opinion now=3F > > + > > +typedef struct =7B > > + UINT64 R0; > > + UINT64 R1; > > + UINT64 R2; > > + UINT64 R3; > > + UINT64 R4; > > + UINT64 R5; > > + UINT64 R6; > > + UINT64 R7; > > + UINT64 R8; > > + UINT64 R9; > > + UINT64 R10; > > + UINT64 R11; > > + UINT64 R12; > > + UINT64 R13; > > + UINT64 R14; > > + UINT64 R15; > > + UINT64 R16; > > + UINT64 R17; > > + UINT64 R18; > > + UINT64 R19; > > + UINT64 R20; > > + UINT64 R21; > > + UINT64 R22; > > + UINT64 R23; > > + UINT64 R24; > > + UINT64 R25; > > + UINT64 R26; > > + UINT64 R27; > > + UINT64 R28; > > + UINT64 R29; > > + UINT64 R30; > > + UINT64 R31; > > + > > + UINT64 CRMD; // CuRrent MoDe information > > + UINT64 PRMD; // PRe-exception MoDe information > > + UINT64 EUEN; // Extended component Unit ENable > > + UINT64 MISC; // MISCellaneous controller > > + UINT64 EC=46G; // Exception Con=46iGuration > > + UINT64 ESTAT; // Exception STATus > > + UINT64 ERA; // Exception Return Address > > + UINT64 BADV; // BAD Virtual address > > + UINT64 BADI; // BAD Instruction > > +=7D E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64; > > + > > /// > > /// Universal E=46I=5FSYSTEM=5FCONTEXT definition. > > /// > > typedef union =7B > > - E=46I=5FSYSTEM=5FCONTEXT=5FEBC *SystemContextEbc; > > - E=46I=5FSYSTEM=5FCONTEXT=5FIA32 *SystemContextIa32; > > - E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64; > > - E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf; > > - E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemContextArm; > > - E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64 *SystemContextAArch64; > > - E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64 *SystemContextRiscV64; > > + E=46I=5FSYSTEM=5FCONTEXT=5FEBC *SystemContextEbc; > > + E=46I=5FSYSTEM=5FCONTEXT=5FIA32 *SystemContextIa32; > > + E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64; > > + E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf; > > + E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemContextArm; > > + E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64 *SystemContextAArch64; > > + E=46I=5FSYSTEM=5FCONTEXT=5FRISCV64 *SystemContextRiscV64; > > + E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64 *SystemContextLoongArch64; > > =7D E=46I=5FSYSTEM=5FCONTEXT; > > > > // > > diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Pro= tocol/PxeBaseCode.h > index 11872d602d..6787941a5d 100644 > --- a/MdePkg/Include/Protocol/PxeBaseCode.h > +++ b/MdePkg/Include/Protocol/PxeBaseCode.h > =40=40 -4,6 +4,7 =40=40 > > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
> > +Copyright (c) 2022, Loongson Technology Corporation Limited. All right= s reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > =40=40 -158,6 +159,8 =40=40 typedef UINT16 E=46I=5FPXE=5FBASE=5FCODE=5F= UDP=5FPORT; > =23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x000B > > =23elif defined (MDE=5FCPU=5FRISCV64) > > =23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x001B > > +=23elif defined (MDE=5FCPU=5FLOONGARCH64) > > +=23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x0027 > > =23endif > > > > /// > > diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi/U= efiBaseType.h > index 4a34ce8e25..83975a08eb 100644 > --- a/MdePkg/Include/Uefi/UefiBaseType.h > +++ b/MdePkg/Include/Uefi/UefiBaseType.h > =40=40 -4,6 +4,7 =40=40 > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
> > Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
> > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All righ= ts reserved.
> > +Copyright (c) 2022, Loongson Technology Corporation Limited. All right= s reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > =40=40 -246,6 +247,12 =40=40 typedef union =7B > =23define E=46I=5FIMAGE=5FMACHINE=5FRISCV64 0x5064 > > =23define E=46I=5FIMAGE=5FMACHINE=5FRISCV128 0x5128 > > > > +/// > > +/// PE32+ Machine type for LoongArch 32/64 images. > > +/// > > +=23define E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH32 0x6232 > > +=23define E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH64 0x6264 > > + > > =23if =21defined (E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FVALUE) && =21defined= (E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FVALUE) > > =23if defined (MDE=5FCPU=5FIA32) > > > > =40=40 -278,6 +285,13 =40=40 typedef union =7B > =23define E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C > > ((Machine) =3D=3D E=46I=5FIMAGE=5FMACHINE=5FRISCV64) > > > > +=23define E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTED(Machine) = (=46ALSE) > > + > > + =23elif defined (MDE=5FCPU=5FLOONGARCH64) > > + > > +=23define E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C > > + ((Machine) =3D=3D E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH64) > > + > > =23define E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTED(Machine) (= =46ALSE) > > > > =23elif defined (MDE=5FCPU=5FEBC) > > diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiS= pec.h > index 2b38b100f6..3abebbb8d9 100644 > --- a/MdePkg/Include/Uefi/UefiSpec.h > +++ b/MdePkg/Include/Uefi/UefiSpec.h > =40=40 -7,6 +7,7 =40=40 > > > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.
> > Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP.= All rights reserved.
> > +Copyright (c) 2022, Loongson Technology Corporation Limited. All right= s reserved.
> > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > =40=40 -2195,12 +2196,13 =40=40 typedef struct =7B > // > > // E=46I =46ile location to boot from on removable media devices > > // > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22=5C=5CE= =46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22 > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L=22=5C=5CE= =46I=5C=5CBOOT=5C=5CBOOTIA64.E=46I=22 > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64 L=22=5C=5CE=46= I=5C=5CBOOT=5C=5CBOOTX64.E=46I=22 > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C=5CE=46= I=5C=5CBOOT=5C=5CBOOTARM.E=46I=22 > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22 > > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22=5C=5CE= =46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L=22=5C=5CE= =46I=5C=5CBOOT=5C=5CBOOTIA64.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64 L=22=5C=5CE=46= I=5C=5CBOOT=5C=5CBOOTX64.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C=5CE=46= I=5C=5CBOOT=5C=5CBOOTARM.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22 > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FLOONGARCH64 L=22= =5C=5CE=46I=5C=5CBOOT=5C=5CBOOTLOONGARCH64.E=46I=22 > > > > =23if =21defined (E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME) > > =23if defined (MDE=5FCPU=5FIA32) > > =40=40 -2214,6 +2216,8 =40=40 typedef struct =7B > =23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE=5F= MEDIA=5F=46ILE=5FNAME=5FAARCH64 > > =23elif defined (MDE=5FCPU=5FRISCV64) > > =23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE=5F= MEDIA=5F=46ILE=5FNAME=5FRISCV64 > > + =23elif defined (MDE=5FCPU=5FLOONGARCH64) > > +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE=5F= MEDIA=5F=46ILE=5FNAME=5FLOONGARCH64 > > =23else > > =23error Unknown Processor Type > > =23endif > > -- > 2.27.0 > > > > -=3D-=3D-=3D-=3D-=3D-=3D > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (=2393766): https://edk2.groups.io/g/devel/message/93= 766 > Mute This Topic: https://groups.io/mt/93674237/1643496 > Group Owner: devel+owner=40edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub =5Bmichael.d.kinney=40= intel.com=5D > -=3D-=3D-=3D-=3D-=3D-=3D > --632e6885_445b936f_19a0 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Hi Mkie,
I responded to your comment below.

=


Thanks,
Chao
--------

=
On 9=E6=9C=88 23 2022, at = 11:46 =E6=99=9A=E4=B8=8A, =22Kinney, Michael D=22 <michael.d.kinney=40= intel.com> wrote:
One comment below.
<= br>
Mike

> -----Original Message-----
>= =46rom: devel=40edk2.groups.io <devel=40edk2.groups.io> On Behalf = Of Chao Li
> Sent: Wednesday, September 14, 2022 2:41 AM
> To: devel=40edk2.groups.io
> Cc: Kinney, Michael= D <michael.d.kinney=40intel.com>; Gao, Liming <gaoliming=40byos= oft.com.cn>; Liu, Zhiguang <zhiguang.liu=40intel.com>
= > Subject: =5Bedk2-devel=5D =5BPATCH v2 22/34=5D MdePkg/Include: Loong= Arch definitions.
>
> RE=46: https://bugzilla.t= ianocore.org/show=5Fbug.cgi=3Fid=3D4053
>
> Add= LoongArch processor related definitions.
>
> =46= or the Http boot and PXE boot types seeing this URL section =22Processor<= /div>
> Architecture Type=22 for the LOONGARCH values:
&= gt; https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameters.= xhtml
>
> =46or definitions of PE/CO=46=46 and = LOONGARCH relocation types, see the
> =22Machine Types=22 an= d =22Basic Relocation Types=22 sections of this URL for
> LO= ONGARCH values:
> https://docs.microsoft.com/en-us/windows/w= in32/debug/pe-format
>
> =46or the register def= initions of exceptions context, see the UE=46I V2.10
> 18.2.= 2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH
> de= finitions:
> https://uefi.org/specs/UE=46I/2.10/18=5FProtoco= ls=5FDebugger=5FSupport.html
>
> Cc: Michael D = Kinney <michael.d.kinney=40intel.com>
> Cc: Liming Gao= <gaoliming=40byosoft.com.cn>
> Cc: Zhiguang Liu <z= higuang.liu=40intel.com>
>
> Signed-off-by: = Chao Li <lichao=40loongson.cn>
> ---
> Md= ePkg/Include/IndustryStandard/PeImage.h =7C 9 ++
> MdePkg/In= clude/Protocol/DebugSupport.h =7C 107 ++++++++++++++++++++--
&g= t; MdePkg/Include/Protocol/PxeBaseCode.h =7C 3 +
> MdePkg/In= clude/Uefi/UefiBaseType.h =7C 14 +++
> MdePkg/Include/Uefi/U= efiSpec.h =7C 16 ++--
> 5 files changed, 136 insertions(+), = 13 deletions(-)
>
> diff --git a/MdePkg/Include= /IndustryStandard/PeImage.h b/MdePkg/Include/IndustryStandard/PeImage.h
> index 3109dc20f8..dd4cc25483 100644
> --- a/Md= ePkg/Include/IndustryStandard/PeImage.h
> +++ b/MdePkg/Inclu= de/IndustryStandard/PeImage.h
> =40=40 -10,6 +10,7 =40=40
> Copyright (c) 2006 - 2018, Intel Corporation. All rights res= erved.<BR>
>
> Portions copyright (c) 200= 8 - 2009, Apple Inc. All rights reserved.<BR>
>
<= div>> Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise D= evelopment LP. All rights reserved.<BR>
>
&g= t; +Portions Copyright (c) 2022, Loongson Technology Corporation Limited.= All rights reserved.<BR>
>
>
&= gt;
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
>
>
> =40=40 -38,6 +39,8 =40= =40 SPDX-License-Identifier: BSD-2-Clause-Patent
> =23define= IMAGE=5F=46ILE=5FMACHINE=5FRISCV32 0x5032
>
> = =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV64 0x5064
>
<= div>> =23define IMAGE=5F=46ILE=5FMACHINE=5FRISCV128 0x5128
&= gt;
> +=23define IMAGE=5F=46ILE=5FMACHINE=5FLOONGARCH32 0x62= 32
>
> +=23define IMAGE=5F=46ILE=5FMACHINE=5FLO= ONGARCH64 0x6264
>
>
>
&= gt; //
>
> // EXE file formats
>
> =40=40 -503,6 +506,12 =40=40 typedef struct =7B
&= gt; =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12I 7
&g= t;
> =23define E=46I=5FIMAGE=5FREL=5FBASED=5FRISCV=5FLOW12S = 8
>
>
>
> +//
>
> +// Relocation types of LoongArch processor.
=
>
> +//
>
> +=23define E=46= I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH32=5FMARK=5FLA 8
>
<= div>> +=23define E=46I=5FIMAGE=5FREL=5FBASED=5FLOONGARCH64=5FMARK=5FLA= 8
>
> +
>
> ///
>
> /// Line number format.
>
> ///
>
> diff --git a/MdePkg/Include/Prot= ocol/DebugSupport.h b/MdePkg/Include/Protocol/DebugSupport.h
&g= t; index ec5b92a5c5..2b0ae2d157 100644
> --- a/MdePkg/Includ= e/Protocol/DebugSupport.h
> +++ b/MdePkg/Include/Protocol/De= bugSupport.h
> =40=40 -654,17 +654,110 =40=40 typedef struct= =7B
> UINT64 X31;
>
> =7D E=46I=5F= SYSTEM=5FCONTEXT=5FRISCV64;
>
>
><= /div>
> +//
>
> +// LoongArch processor = exception types.
>
> +//
>
> +=23define EXCEPT=5FLOONGARCH=5FINT 0
>
&g= t; +=23define EXCEPT=5FLOONGARCH=5FPIL 1
>
> +=23= define EXCEPT=5FLOONGARCH=5FPIS 2
>
> +=23defin= e EXCEPT=5FLOONGARCH=5FPI=46 3
>
> +=23define E= XCEPT=5FLOONGARCH=5FPME 4
>
> +=23define EXCEPT= =5FLOONGARCH=5FPNR 5
>
> +=23define EXCEPT=5FLO= ONGARCH=5FPNX 6
>
> +=23define EXCEPT=5FLOONGAR= CH=5FPPI 7
>
> +=23define EXCEPT=5FLOONGARCH=5F= ADE 8
>
> +=23define EXCEPT=5FLOONGARCH=5FALE 9=
>
> +=23define EXCEPT=5FLOONGARCH=5FBCE 10
>
> +=23define EXCEPT=5FLOONGARCH=5FSYS 11
>
> +=23define EXCEPT=5FLOONGARCH=5FBRK 12
&= gt;
> +=23define EXCEPT=5FLOONGARCH=5FINE 13
><= /div>
> +=23define EXCEPT=5FLOONGARCH=5FIPE 14
>
> +=23define EXCEPT=5FLOONGARCH=5F=46PD 15
>
<= div>> +=23define EXCEPT=5FLOONGARCH=5FSXD 16
>
= > +=23define EXCEPT=5FLOONGARCH=5FASXD 17
>
>= ; +=23define EXCEPT=5FLOONGARCH=5F=46PE 18
>
> = +=23define EXCEPT=5FLOONGARCH=5FTBR 64 // =46or code only, there is no su= ch type in the ISA spec, the TLB refill is defined for an
> = independent exception.
>
> +
>
> +//
>
> +// LoongArch processor Int= errupt types.
>
> +//
>
= > +=23define EXCEPT=5FLOONGARCH=5FINT=5FSIP0 0
>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FSIP1 1
>
<= div>> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP0 2
>
=
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP1 3
>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP2 4
>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP3 5
>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP4 6
>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP5 7
><= /div>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP6 8
>=
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIP7 9
>= ;
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FPMC 10
&= gt;
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FTIMER 11
>
> +=23define EXCEPT=5FLOONGARCH=5FINT=5FIPI 12
=
>
> +
>
> +//
&g= t;
> +// =46or coding convenience, define the maximum valid<= /div>
>
> +// LoongArch interrupt.
>
> +//
>
> +=23define MAX=5FLOONGARCH=5F= INTERRUPT 14

Should this define be moved into the libs/modu= les that uses
this define=3F Prefer to only see definitions fro= m specs in
this file.
Cha= o Li: = Yes, this macro is defined in the UE=46I Spec V2.10 section 18.2.5.<= /div>
If you insist on your opinion, I can remove it in this file= . So what's your opinion now=3F

>
> +<= /div>
>
> +typedef struct =7B
>
> + UINT64 R0;
>
> + UINT64 R1;
= >
> + UINT64 R2;
>
> + UINT64 R= 3;
>
> + UINT64 R4;
>
&g= t; + UINT64 R5;
>
> + UINT64 R6;
>=
> + UINT64 R7;
>
> + UINT64 R8;
>
> + UINT64 R9;
>
> += UINT64 R10;
>
> + UINT64 R11;
>
> + UINT64 R12;
>
> + UINT64 R13;
>
> + UINT64 R14;
>
> = + UINT64 R15;
>
> + UINT64 R16;
><= /div>
> + UINT64 R17;
>
> + UINT64 R18;<= /div>
>
> + UINT64 R19;
>
>= + UINT64 R20;
>
> + UINT64 R21;
>=
> + UINT64 R22;
>
> + UINT64 R23;=
>
> + UINT64 R24;
>
>= ; + UINT64 R25;
>
> + UINT64 R26;
>= ;
> + UINT64 R27;
>
> + UINT64 R28= ;
>
> + UINT64 R29;
>
&g= t; + UINT64 R30;
>
> + UINT64 R31;
&g= t;
> +
>
> + UINT64 CRMD; // CuRre= nt MoDe information
>
> + UINT64 PRMD; // PRe-e= xception MoDe information
>
> + UINT64 EUEN; //= Extended component Unit ENable
>
> + UINT64 MI= SC; // MISCellaneous controller
>
> + UINT64 EC= =46G; // Exception Con=46iGuration
>
> + UINT64= ESTAT; // Exception STATus
>
> + UINT64 ERA; /= / Exception Return Address
>
> + UINT64 BADV; /= / BAD Virtual address
>
> + UINT64 BADI; // BAD= Instruction
>
> +=7D E=46I=5FSYSTEM=5FCONTEXT=5F= LOONGARCH64;
>
> +
>
>= ; ///
>
> /// Universal E=46I=5FSYSTEM=5FCONTEX= T definition.
>
> ///
>
= > typedef union =7B
>
> - E=46I=5FSYSTEM=5FC= ONTEXT=5FEBC *SystemContextEbc;
>
> - E=46I=5FS= YSTEM=5FCONTEXT=5FIA32 *SystemContextIa32;
>
> = - E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64;
>
<= div>> - E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf;
= >
> - E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemContextArm;
>
> - E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64 *System= ContextAArch64;
>
> - E=46I=5FSYSTEM=5FCONTEXT=5F= RISCV64 *SystemContextRiscV64;
>
> + E=46I=5FSY= STEM=5FCONTEXT=5FEBC *SystemContextEbc;
>
> + E= =46I=5FSYSTEM=5FCONTEXT=5FIA32 *SystemContextIa32;
>
> + E=46I=5FSYSTEM=5FCONTEXT=5FX64 *SystemContextX64;
>= ;
> + E=46I=5FSYSTEM=5FCONTEXT=5FIP=46 *SystemContextIpf;
>
> + E=46I=5FSYSTEM=5FCONTEXT=5FARM *SystemConte= xtArm;
>
> + E=46I=5FSYSTEM=5FCONTEXT=5FAARCH64= *SystemContextAArch64;
>
> + E=46I=5FSYSTEM=5F= CONTEXT=5FRISCV64 *SystemContextRiscV64;
>
> + = E=46I=5FSYSTEM=5FCONTEXT=5FLOONGARCH64 *SystemContextLoongArch64;
>
> =7D E=46I=5FSYSTEM=5FCONTEXT;
>
=
>
>
> //
>
> = diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Proto= col/PxeBaseCode.h
> index 11872d602d..6787941a5d 100644
> --- a/MdePkg/Include/Protocol/PxeBaseCode.h
> +++= b/MdePkg/Include/Protocol/PxeBaseCode.h
> =40=40 -4,6 +4,7 = =40=40
>
>
> Copyright (c) 2006 - = 2018, Intel Corporation. All rights reserved.<BR>
>
> Copyright (c) 2020, Hewlett Packard Enterprise Development L= P. All rights reserved.<BR>
>
> +Copyrigh= t (c) 2022, Loongson Technology Corporation Limited. All rights reserved.= <BR>
>
>
>
> SP= DX-License-Identifier: BSD-2-Clause-Patent
>
><= /div>
>
> =40=40 -158,6 +159,8 =40=40 typedef UINT16 = E=46I=5FPXE=5FBASE=5FCODE=5FUDP=5FPORT;
> =23define E=46I=5F= PXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x000B
>
>= =23elif defined (MDE=5FCPU=5FRISCV64)
>
> =23d= efine E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x001B
><= /div>
> +=23elif defined (MDE=5FCPU=5FLOONGARCH64)
><= /div>
> +=23define E=46I=5FPXE=5FCLIENT=5FSYSTEM=5FARCHITECTURE 0x= 0027
>
> =23endif
>
>=
>
> ///
>
> diff --g= it a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi/UefiBaseTyp= e.h
> index 4a34ce8e25..83975a08eb 100644
> ---= a/MdePkg/Include/Uefi/UefiBaseType.h
> +++ b/MdePkg/Include= /Uefi/UefiBaseType.h
> =40=40 -4,6 +4,7 =40=40
>= ; Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<B= R>
>
> Portions copyright (c) 2011 - 2016, A= RM Ltd. All rights reserved.<BR>
>
> Copy= right (c) 2020, Hewlett Packard Enterprise Development LP. All rights res= erved.<BR>
>
> +Copyright (c) 2022, Loong= son Technology Corporation Limited. All rights reserved.<BR>
<= div>>
>
>
> SPDX-License-Identi= fier: BSD-2-Clause-Patent
>
>
>
> =40=40 -246,6 +247,12 =40=40 typedef union =7B
>= ; =23define E=46I=5FIMAGE=5FMACHINE=5FRISCV64 0x5064
>
=
> =23define E=46I=5FIMAGE=5FMACHINE=5FRISCV128 0x5128
&= gt;
>
>
> +///
>
> +/// PE32+ Machine type for LoongArch 32/64 images.
= >
> +///
>
> +=23define E=46I=5F= IMAGE=5FMACHINE=5FLOONGARCH32 0x6232
>
> +=23de= fine E=46I=5FIMAGE=5FMACHINE=5FLOONGARCH64 0x6264
>
> +
>
> =23if =21defined (E=46I=5FIMAGE=5F= MACHINE=5FTYPE=5FVALUE) && =21defined (E=46I=5FIMAGE=5FMACHINE=5F= CROSS=5FTYPE=5FVALUE)
>
> =23if defined (MDE=5F= CPU=5FIA32)
>
>
>
> =40= =40 -278,6 +285,13 =40=40 typedef union =7B
> =23define E=46= I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C
>
<= div>> ((Machine) =3D=3D E=46I=5FIMAGE=5FMACHINE=5FRISCV64)
&= gt;
>
>
> +=23define E=46I=5FIMAGE= =5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTED(Machine) (=46ALSE)
>
> +
>
> + =23elif defined (MDE=5FCP= U=5FLOONGARCH64)
>
> +
>
> +=23define E=46I=5FIMAGE=5FMACHINE=5FTYPE=5FSUPPORTED(Machine) =5C<= /div>
>
> + ((Machine) =3D=3D E=46I=5FIMAGE=5FMACHINE= =5FLOONGARCH64)
>
> +
>
= > =23define E=46I=5FIMAGE=5FMACHINE=5FCROSS=5FTYPE=5FSUPPORTED(Machine= ) (=46ALSE)
>
>
>
> =23= elif defined (MDE=5FCPU=5FEBC)
>
> diff --git a= /MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h
> index 2b38b100f6..3abebbb8d9 100644
> --- a/MdePkg/In= clude/Uefi/UefiSpec.h
> +++ b/MdePkg/Include/Uefi/UefiSpec.h=
> =40=40 -7,6 +7,7 =40=40
>
>
> Copyright (c) 2006 - 2021, Intel Corporation. All rights rese= rved.<BR>
>
> Portions Copyright (c) 2020= , Hewlett Packard Enterprise Development LP. All rights reserved.<BR&g= t;
>
> +Copyright (c) 2022, Loongson Technology= Corporation Limited. All rights reserved.<BR>
>
=
>
>
> SPDX-License-Identifier: BSD-2-Cl= ause-Patent
>
>
>
> =40= =40 -2195,12 +2196,13 =40=40 typedef struct =7B
> //
>
> // E=46I =46ile location to boot from on removable= media devices
>
> //
>
= > -=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA32 L=22=5C=5C= E=46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22
>
> -=23= define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FIA64 L=22=5C=5CE=46I=5C= =5CBOOT=5C=5CBOOTIA64.E=46I=22
>
> -=23define E= =46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX64 L=22=5C=5CE=46I=5C=5CBOOT=5C= =5CBOOTX64.E=46I=22
>
> -=23define E=46I=5FREMO= VABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTAR= M.E=46I=22
>
> -=23define E=46I=5FREMOVABLE=5FM= EDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTAA64.E=46= I=22
>
> -=23define E=46I=5FREMOVABLE=5FMEDIA=5F= =46ILE=5FNAME=5FRISCV64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTRISCV64.E=46I=22=
>
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46= ILE=5FNAME=5FIA32 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTIA32.E=46I=22
<= div>>
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FN= AME=5FIA64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTIA64.E=46I=22
>= ;
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FX= 64 L=22=5C=5CE=46I=5C=5CBOOT=5C=5CBOOTX64.E=46I=22
>
> +=23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FARM L=22=5C= =5CE=46I=5C=5CBOOT=5C=5CBOOTARM.E=46I=22
>
> +=23= define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64 L=22=5C=5CE=46= I=5C=5CBOOT=5C=5CBOOTAA64.E=46I=22
>
> +=23defi= ne E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64 L=22=5C=5CE=46I=5C= =5CBOOT=5C=5CBOOTRISCV64.E=46I=22
>
> +=23defin= e E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FLOONGARCH64 L=22=5C=5CE=46I= =5C=5CBOOT=5C=5CBOOTLOONGARCH64.E=46I=22
>
>
>
> =23if =21defined (E=46I=5FREMOVABLE=5FMEDIA=5F= =46ILE=5FNAME)
>
> =23if defined (MDE=5FCPU=5FI= A32)
>
> =40=40 -2214,6 +2216,8 =40=40 typedef = struct =7B
> =23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5F= NAME E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME=5FAARCH64
>
> =23elif defined (MDE=5FCPU=5FRISCV64)
>
<= div>> =23define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMO= VABLE=5FMEDIA=5F=46ILE=5FNAME=5FRISCV64
>
> + =23= elif defined (MDE=5FCPU=5FLOONGARCH64)
>
> +=23= define E=46I=5FREMOVABLE=5FMEDIA=5F=46ILE=5FNAME E=46I=5FREMOVABLE=5FMEDI= A=5F=46ILE=5FNAME=5FLOONGARCH64
>
> =23else
>
> =23error Unknown Processor Type
>=
> =23endif
>
> --
> = 2.27.0
>
>
>
> -=3D-=3D= -=3D-=3D-=3D-=3D
> Groups.io Links: You receive all messages= sent to this group.
> View/Reply Online (=2393766): https:/= /edk2.groups.io/g/devel/message/93766
> Mute This Topic: htt= ps://groups.io/mt/93674237/1643496
> Group Owner: devel+owne= r=40edk2.groups.io
> Unsubscribe: https://edk2.groups.io/g/d= evel/unsub =5Bmichael.d.kinney=40intel.com=5D
> -=3D-=3D-=3D= -=3D-=3D-=3D
>
--632e6885_445b936f_19a0--