From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from loongson.cn (loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web09.6091.1664243306801578876 for ; Mon, 26 Sep 2022 18:48:29 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: loongson.cn, ip: 114.242.206.163, mailfrom: lichao@loongson.cn) Received: from lichao-PC (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx9OFhVjJj5oYiAA--.62076S2; Tue, 27 Sep 2022 09:48:17 +0800 (CST) Date: Tue, 27 Sep 2022 09:48:17 +0800 From: "Chao Li" To: "=?utf-8?Q?devel=40edk2.groups.io?=" , "=?utf-8?Q?michael.d.kinney=40intel.com?=" Cc: "=?utf-8?Q?=22devel=40edk2.groups.io=22?=" , =?utf-8?Q?=22Gao=2C_Liming=22?= , =?utf-8?Q?=22Liu=2C_Zhiguang=22?= Message-ID: In-Reply-To: References: Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch definitions. X-Mailer: Mailspring MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx9OFhVjJj5oYiAA--.62076S2 X-Coremail-Antispam: 1UD129KBjvAXoW3KF4fuFWrtw4rWF1fJFWfGrg_yoW8Wr4Duo W7tana939rAw4YkrWDWw47Wayjk34vkw45Gr4SgFWkGa1xt3Z8Kw48Jw48Zr1rtry8tws8 GFyqqa95ZFW7Jwn5n29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7v73VFW2AGmfu7bjvjm3 AaLaJ3UjIYCTnIWjp_UUUO27k0a2IF6w4kM7kC6x804xWl14x267AKxVWUJVW8JwAFc2x0 x2IEx4CE42xK8VAvwI8IcIk0rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj4 1l84x0c7CEw4AK67xGY2AK021l84ACjcxK6xIIjxv20xvE14v26F1j6w1UM28EF7xvwVC0 I7IYx2IY6xkF7I0E14v26r4UJVWxJr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7 xvwVC2z280aVCY1x0267AKxVWxJr0_GcWle2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG 67k08I80eVWUJVW8JwAqx4xG62kEwI0EY4vaYxAvb48xMc02F40EFcxC0VAKzVAqx4xG6I 80ewAqx4xG64kEw2xG04xIwI0_Gr0_Xr1lYx0E2Ix0cI8IcVAFwI0_Jr0_Jr4lYx0Ex4A2 jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCjr7xvwV CIw2I0I7xG6c02F41lc2xSY4AK6svPMxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY 6r1j6r4UMI8I3I0E5I8CrVAFwI0_JrI_JrWlx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17 CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF 0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIx AIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIev Ja73UjIFyTuYvjxUyBcEUUUUU X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQACCGMxll4LzQADsU Content-Type: multipart/alternative; boundary="63325661_3d256b71_28c3" --63325661_3d256b71_28c3 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Thanks Liming and Mike! Thanks, Chao -------- On 9=E6=9C=88 27 2022, at 9:01 =E4=B8=8A=E5=8D=88, "Michael D Kinney" wrote: > > Ok > > > Reviewed-by: Michael D Kinney michael.d.kinney@intel.com (mailto:michael.= d.kinney@intel.com) > > Mike > > From: devel@edk2.groups.io On Behalf Of gaoliming = via groups.io > Sent: Monday, September 26, 2022 5:55 PM > To: devel@edk2.groups.io; Kinney, Michael D ;= 'chao li' > Cc: Liu, Zhiguang > Subject: =E5=9B=9E=E5=A4=8D: [edk2-devel] [PATCH v2 22/34] MdePkg/Include= : LoongArch definitions. > > > > > > Mike: > The comment =E2=80=9CFor coding convenience, define the maximum valid Loo= nArch interrupt.=E2=80=9D is also defined in UEFI2.10 spec 18.2.5 EFI_DEBUG= _SUPPORT_PROTOCOL.RegisterExceptionCallback(). > > So, I think it is fine to keep this comment in MdePkg Include header file= . > > Thanks > Liming > =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io (mailto:devel@edk2.grou= ps.io) =E4=BB=A3=E8=A1= =A8 Michael D Kinney > =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2022=E5=B9=B49=E6=9C=8824=E6=97=A5 = 23:08 > =E6=94=B6=E4=BB=B6=E4=BA=BA: chao li ; Kinney, Michael D > =E6=8A=84=E9=80=81: "\"devel@edk2.groups.io\ (mailto:devel@edk2.groups.io= /)"" ; Gao, Liming ; Liu, Zhiguang > =E4=B8=BB=E9=A2=98: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: Loo= ngArch definitions. > > > > > > I am referring to this code comment. > > > +// > > > > +// For coding convenience, define the maximum valid > > > > +// LoongArch interrupt. > > > > +// > > > > +#define MAX_LOONGARCH_INTERRUPT 14 > > Mike > > > From: chao li > Sent: Friday, September 23, 2022 7:46 PM > To: Kinney, Michael D > Cc: "\"devel@edk2.groups.io\ (mailto:devel@edk2.groups.io/)"" ; Gao, Liming ; Liu, Zhiguang > Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch defi= nitions. > > > > > > Mike, > Do you mean patches 0001 and 0002? If yes, I have tried removing both the= two patches, but the Azure CI always produces the ECC errors, I have no id= ea how to fix them, so modify the CI YAM file to fix them, and Liming also = recommends this way. > > > > > Thanks, > Chao > -------- > > > On 9=E6=9C=88 24 2022, at 10:33 =E4=B8=8A=E5=8D=88, "Kinney, Michael D" <= michael.d.kinney@intel.com (mailto:michael.d.kinney@intel.com)> wrote: > > > > > > > If it is in spec, then the comment about =E2=80=9Ccoding convenience=E2= =80=9D is not required. > > > > > > > > > > Mike > > > > > > > > From: chao li > > Sent: Friday, September 23, 2022 7:17 PM > > > > To: Kinney, Michael D > > > > Cc: "devel@edk2.groups.io (mailto:devel@edk2.groups.io)" ; Gao, Liming ; Liu, Zhiguang > > > > Subject: Re: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch de= finitions. > > > > > > > > > > > > > > > > > > Hi Mkie, > > I responded to your comment below. > > > > > > > > > > > > > > > > Thanks, > > Chao > > > > -------- > > > > > > > > On 9=E6=9C=88 23 2022, at 11:46 =E6=99=9A=E4=B8=8A, "Kinney, Michael D"= wrote: > > > > > > > One comment below. > > > > > > > > > > > > > > > > > > > > > Mike > > > > > > > > > > > > > > > > -----Original Message----- > > > > From: devel@edk2.groups.io (mailto:devel@edk2.groups.io) On Behalf Of Chao Li > > > > > > > > > > Sent: Wednesday, September 14, 2022 2:41 AM > > > > > > > > > > To: devel@edk2.groups.io (mailto:devel@edk2.groups.io) > > > > > > > > > > Cc: Kinney, Michael D ; Gao, Liming ; Liu, Zhiguang > > > > > > > > > > Subject: [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch de= finitions. > > > > > > > > > > > > > > > > > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4053 > > > > > > > > > > > > > > > > > > > > Add LoongArch processor related definitions. > > > > > > > > > > > > > > > > > > > > For the Http boot and PXE boot types seeing this URL section "Proce= ssor > > > > > > > > > > Architecture Type" for the LOONGARCH values: > > > > > > > > > > https://www.iana.org/assignments/dhcpv6-parameters/dhcpv6-parameter= s.xhtml > > > > > > > > > > > > > > > > > > > > For definitions of PE/COFF and LOONGARCH relocation types, see the > > > > > > > > > > "Machine Types" and "Basic Relocation Types" sections of this URL f= or > > > > > > > > > > LOONGARCH values: > > > > > > > > > > https://docs.microsoft.com/en-us/windows/win32/debug/pe-format > > > > > > > > > > > > > > > > > > > > For the register definitions of exceptions context, see the UEFI V2= .10 > > > > > > > > > > 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH > > > > > > > > > > definitions: > > > > > > > > > > https://uefi.org/specs/UEFI/2.10/18_Protocols_Debugger_Support.html > > > > > > > > > > > > > > > > > > > > Cc: Michael D Kinney > > > > > > > > > > Cc: Liming Gao > > > > > > > > > > Cc: Zhiguang Liu > > > > > > > > > > > > > > > > > > > > Signed-off-by: Chao Li > > > > > > > > > > --- > > > > > > > > > > MdePkg/Include/IndustryStandard/PeImage.h | 9 ++ > > > > > > > > > > MdePkg/Include/Protocol/DebugSupport.h | 107 ++++++++++++++++++++-- > > > > > > > > > > MdePkg/Include/Protocol/PxeBaseCode.h | 3 + > > > > > > > > > > MdePkg/Include/Uefi/UefiBaseType.h | 14 +++ > > > > > > > > > > MdePkg/Include/Uefi/UefiSpec.h | 16 ++-- > > > > > > > > > > 5 files changed, 136 insertions(+), 13 deletions(-) > > > > > > > > > > > > > > > > > > > > diff --git a/MdePkg/Include/IndustryStandard/PeImage.h b/MdePkg/Inc= lude/IndustryStandard/PeImage.h > > > > > > > > > > index 3109dc20f8..dd4cc25483 100644 > > > > > > > > > > --- a/MdePkg/Include/IndustryStandard/PeImage.h > > > > > > > > > > +++ b/MdePkg/Include/IndustryStandard/PeImage.h > > > > > > > > > > @@ -10,6 +10,7 @@ > > > > > > > > > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<= BR> > > > > > > > > > > > > > > > > > > > > Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.=
> > > > > > > > > > > > > > > > > > > > Portions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Deve= lopment LP. All rights reserved.
> > > > > > > > > > > > > > > > > > > > +Portions Copyright (c) 2022, Loongson Technology Corporation Limit= ed. All rights reserved.
> > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > @@ -38,6 +39,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > #define IMAGE_FILE_MACHINE_RISCV32 0x5032 > > > > > > > > > > > > > > > > > > > > #define IMAGE_FILE_MACHINE_RISCV64 0x5064 > > > > > > > > > > > > > > > > > > > > #define IMAGE_FILE_MACHINE_RISCV128 0x5128 > > > > > > > > > > > > > > > > > > > > +#define IMAGE_FILE_MACHINE_LOONGARCH32 0x6232 > > > > > > > > > > > > > > > > > > > > +#define IMAGE_FILE_MACHINE_LOONGARCH64 0x6264 > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > // > > > > > > > > > > > > > > > > > > > > // EXE file formats > > > > > > > > > > > > > > > > > > > > @@ -503,6 +506,12 @@ typedef struct { > > > > > > > > > > #define EFI_IMAGE_REL_BASED_RISCV_LOW12I 7 > > > > > > > > > > > > > > > > > > > > #define EFI_IMAGE_REL_BASED_RISCV_LOW12S 8 > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +// Relocation types of LoongArch processor. > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8 > > > > > > > > > > > > > > > > > > > > +#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK_LA 8 > > > > > > > > > > > > > > > > > > > > + > > > > > > > > > > > > > > > > > > > > /// > > > > > > > > > > > > > > > > > > > > /// Line number format. > > > > > > > > > > > > > > > > > > > > /// > > > > > > > > > > > > > > > > > > > > diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Includ= e/Protocol/DebugSupport.h > > > > > > > > > > index ec5b92a5c5..2b0ae2d157 100644 > > > > > > > > > > --- a/MdePkg/Include/Protocol/DebugSupport.h > > > > > > > > > > +++ b/MdePkg/Include/Protocol/DebugSupport.h > > > > > > > > > > @@ -654,17 +654,110 @@ typedef struct { > > > > > > > > > > UINT64 X31; > > > > > > > > > > > > > > > > > > > > } EFI_SYSTEM_CONTEXT_RISCV64; > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +// LoongArch processor exception types. > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT 0 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PIL 1 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PIS 2 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PIF 3 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PME 4 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PNR 5 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PNX 6 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_PPI 7 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_ADE 8 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_ALE 9 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_BCE 10 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_SYS 11 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_BRK 12 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INE 13 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_IPE 14 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_FPD 15 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_SXD 16 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_ASXD 17 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_FPE 18 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_TBR 64 // For code only, there is no such= type in the ISA spec, the TLB refill is defined for an > > > > > > > > > > independent exception. > > > > > > > > > > > > > > > > > > > > + > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +// LoongArch processor Interrupt types. > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_SIP0 0 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_SIP1 1 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP0 2 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP1 3 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP2 4 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP3 5 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP4 6 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP5 7 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP6 8 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IP7 9 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_PMC 10 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_TIMER 11 > > > > > > > > > > > > > > > > > > > > +#define EXCEPT_LOONGARCH_INT_IPI 12 > > > > > > > > > > > > > > > > > > > > + > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +// For coding convenience, define the maximum valid > > > > > > > > > > > > > > > > > > > > +// LoongArch interrupt. > > > > > > > > > > > > > > > > > > > > +// > > > > > > > > > > > > > > > > > > > > +#define MAX_LOONGARCH_INTERRUPT 14 > > > > > > > > > > > > > > > > > > > > > Should this define be moved into the libs/modules that uses > > > this define? Prefer to only see definitions from specs in > > > > > > > > > this file. > > > > > > > > > > > > > Chao Li: Yes, this macro is defined in the UEFI Spec V2.10 section 18.2= .5. > > > > > > If you insist on your opinion, I can remove it in this file. So what's = your opinion now? > > > > > > > > > > > > > > > > > > + > > > > > > > > > > > > > > +typedef struct { > > > > > > > > > > > > > > + UINT64 R0; > > > > > > > > > > > > > > + UINT64 R1; > > > > > > > > > > > > > > + UINT64 R2; > > > > > > > > > > > > > > + UINT64 R3; > > > > > > > > > > > > > > + UINT64 R4; > > > > > > > > > > > > > > + UINT64 R5; > > > > > > > > > > > > > > + UINT64 R6; > > > > > > > > > > > > > > + UINT64 R7; > > > > > > > > > > > > > > + UINT64 R8; > > > > > > > > > > > > > > + UINT64 R9; > > > > > > > > > > > > > > + UINT64 R10; > > > > > > > > > > > > > > + UINT64 R11; > > > > > > > > > > > > > > + UINT64 R12; > > > > > > > > > > > > > > + UINT64 R13; > > > > > > > > > > > > > > + UINT64 R14; > > > > > > > > > > > > > > + UINT64 R15; > > > > > > > > > > > > > > + UINT64 R16; > > > > > > > > > > > > > > + UINT64 R17; > > > > > > > > > > > > > > + UINT64 R18; > > > > > > > > > > > > > > + UINT64 R19; > > > > > > > > > > > > > > + UINT64 R20; > > > > > > > > > > > > > > + UINT64 R21; > > > > > > > > > > > > > > + UINT64 R22; > > > > > > > > > > > > > > + UINT64 R23; > > > > > > > > > > > > > > + UINT64 R24; > > > > > > > > > > > > > > + UINT64 R25; > > > > > > > > > > > > > > + UINT64 R26; > > > > > > > > > > > > > > + UINT64 R27; > > > > > > > > > > > > > > + UINT64 R28; > > > > > > > > > > > > > > + UINT64 R29; > > > > > > > > > > > > > > + UINT64 R30; > > > > > > > > > > > > > > + UINT64 R31; > > > > > > > > > > > > > > + > > > > > > > > > > > > > > + UINT64 CRMD; // CuRrent MoDe information > > > > > > > > > > > > > > + UINT64 PRMD; // PRe-exception MoDe information > > > > > > > > > > > > > > + UINT64 EUEN; // Extended component Unit ENable > > > > > > > > > > > > > > + UINT64 MISC; // MISCellaneous controller > > > > > > > > > > > > > > + UINT64 ECFG; // Exception ConFiGuration > > > > > > > > > > > > > > + UINT64 ESTAT; // Exception STATus > > > > > > > > > > > > > > + UINT64 ERA; // Exception Return Address > > > > > > > > > > > > > > + UINT64 BADV; // BAD Virtual address > > > > > > > > > > > > > > + UINT64 BADI; // BAD Instruction > > > > > > > > > > > > > > +} EFI_SYSTEM_CONTEXT_LOONGARCH64; > > > > > > > > > > > > > > + > > > > > > > > > > > > > > /// > > > > > > > > > > > > > > /// Universal EFI_SYSTEM_CONTEXT definition. > > > > > > > > > > > > > > /// > > > > > > > > > > > > > > typedef union { > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc; > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32; > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_X64 *SystemContextX64; > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; > > > > > > > > > > > > > > - EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_X64 *SystemContextX64; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_ARM *SystemContextArm; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRiscV64; > > > > > > > > > > > > > > + EFI_SYSTEM_CONTEXT_LOONGARCH64 *SystemContextLoongArch64; > > > > > > > > > > > > > > } EFI_SYSTEM_CONTEXT; > > > > > > > > > > > > > > > > > > > > > > > > > > > > // > > > > > > > > > > > > > > diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/P= rotocol/PxeBaseCode.h > > > > > > > index 11872d602d..6787941a5d 100644 > > > > > > > --- a/MdePkg/Include/Protocol/PxeBaseCode.h > > > > > > > +++ b/MdePkg/Include/Protocol/PxeBaseCode.h > > > > > > > @@ -4,6 +4,7 @@ > > > > > > > > > > > > > > > > > > > > > Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. > > > > > > > > > > > > > > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
> > > > > > > > > > > > > > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts reserved.
> > > > > > > > > > > > > > > > > > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > > > > > > > > > > > > > > > > > @@ -158,6 +159,8 @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT; > > > > > > > #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x000B > > > > > > > > > > > > > > #elif defined (MDE_CPU_RISCV64) > > > > > > > > > > > > > > #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x001B > > > > > > > > > > > > > > +#elif defined (MDE_CPU_LOONGARCH64) > > > > > > > > > > > > > > +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027 > > > > > > > > > > > > > > #endif > > > > > > > > > > > > > > > > > > > > > > > > > > > > /// > > > > > > > > > > > > > > diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b/MdePkg/Include/Uefi= /UefiBaseType.h > > > > > > > index 4a34ce8e25..83975a08eb 100644 > > > > > > > --- a/MdePkg/Include/Uefi/UefiBaseType.h > > > > > > > +++ b/MdePkg/Include/Uefi/UefiBaseType.h > > > > > > > @@ -4,6 +4,7 @@ > > > > > > > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved. > > > > > > > > > > > > > > Portions copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
> > > > > > > > > > > > > > Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All ri= ghts reserved.
> > > > > > > > > > > > > > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts reserved.
> > > > > > > > > > > > > > > > > > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > > > > > > > > > > > > > > > > > @@ -246,6 +247,12 @@ typedef union { > > > > > > > #define EFI_IMAGE_MACHINE_RISCV64 0x5064 > > > > > > > > > > > > > > #define EFI_IMAGE_MACHINE_RISCV128 0x5128 > > > > > > > > > > > > > > > > > > > > > > > > > > > > +/// > > > > > > > > > > > > > > +/// PE32+ Machine type for LoongArch 32/64 images. > > > > > > > > > > > > > > +/// > > > > > > > > > > > > > > +#define EFI_IMAGE_MACHINE_LOONGARCH32 0x6232 > > > > > > > > > > > > > > +#define EFI_IMAGE_MACHINE_LOONGARCH64 0x6264 > > > > > > > > > > > > > > + > > > > > > > > > > > > > > #if !defined (EFI_IMAGE_MACHINE_TYPE_VALUE) && !defined (EFI_IMAGE_MA= CHINE_CROSS_TYPE_VALUE) > > > > > > > > > > > > > > #if defined (MDE_CPU_IA32) > > > > > > > > > > > > > > > > > > > > > > > > > > > > @@ -278,6 +285,13 @@ typedef union { > > > > > > > #define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ > > > > > > > > > > > > > > ((Machine) =3D=3D EFI_IMAGE_MACHINE_RISCV64) > > > > > > > > > > > > > > > > > > > > > > > > > > > > +#define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) > > > > > > > > > > > > > > + > > > > > > > > > > > > > > + #elif defined (MDE_CPU_LOONGARCH64) > > > > > > > > > > > > > > + > > > > > > > > > > > > > > +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \ > > > > > > > > > > > > > > + ((Machine) =3D=3D EFI_IMAGE_MACHINE_LOONGARCH64) > > > > > > > > > > > > > > + > > > > > > > > > > > > > > #define EFI_IMAGE_MACHINE_CROSS_TYPE_SUPPORTED(Machine) (FALSE) > > > > > > > > > > > > > > > > > > > > > > > > > > > > #elif defined (MDE_CPU_EBC) > > > > > > > > > > > > > > diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/Uef= iSpec.h > > > > > > > index 2b38b100f6..3abebbb8d9 100644 > > > > > > > --- a/MdePkg/Include/Uefi/UefiSpec.h > > > > > > > +++ b/MdePkg/Include/Uefi/UefiSpec.h > > > > > > > @@ -7,6 +7,7 @@ > > > > > > > > > > > > > > > > > > > > > Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved. > > > > > > > > > > > > > > Portions Copyright (c) 2020, Hewlett Packard Enterprise Development L= P. All rights reserved.
> > > > > > > > > > > > > > +Copyright (c) 2022, Loongson Technology Corporation Limited. All rig= hts reserved.
> > > > > > > > > > > > > > > > > > > > > > > > > > > > SPDX-License-Identifier: BSD-2-Clause-Patent > > > > > > > > > > > > > > > > > > > > > > > > > > > > @@ -2195,12 +2196,13 @@ typedef struct { > > > > > > > // > > > > > > > > > > > > > > // EFI File location to boot from on removable media devices > > > > > > > > > > > > > > // > > > > > > > > > > > > > > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.E= FI" > > > > > > > > > > > > > > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.E= FI" > > > > > > > > > > > > > > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI= " > > > > > > > > > > > > > > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI= " > > > > > > > > > > > > > > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA6= 4.EFI" > > > > > > > > > > > > > > -#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRIS= CV64.EFI" > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.E= FI" > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.E= FI" > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI= " > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI= " > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA6= 4.EFI" > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BOOT\\BOOTRIS= CV64.EFI" > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64 L"\\EFI\\BOOT\\BOO= TLOONGARCH64.EFI" > > > > > > > > > > > > > > > > > > > > > > > > > > > > #if !defined (EFI_REMOVABLE_MEDIA_FILE_NAME) > > > > > > > > > > > > > > #if defined (MDE_CPU_IA32) > > > > > > > > > > > > > > @@ -2214,6 +2216,8 @@ typedef struct { > > > > > > > #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_A= ARCH64 > > > > > > > > > > > > > > #elif defined (MDE_CPU_RISCV64) > > > > > > > > > > > > > > #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_R= ISCV64 > > > > > > > > > > > > > > + #elif defined (MDE_CPU_LOONGARCH64) > > > > > > > > > > > > > > +#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_= LOONGARCH64 > > > > > > > > > > > > > > #else > > > > > > > > > > > > > > #error Unknown Processor Type > > > > > > > > > > > > > > #endif > > > > > > > > > > > > > > -- > > > > > > > 2.27.0 > > > > > > > > > > > > > > > > > > > > > > > > > > > > -=3D-=3D-=3D-=3D-=3D-=3D > > > > > > > Groups.io Links: You receive all messages sent to this group. > > > > > > > View/Reply Online (#93766): https://edk2.groups.io/g/devel/message/93= 766 > > > > > > > Mute This Topic: https://groups.io/mt/93674237/1643496 > > > > > > > Group Owner: devel+owner@edk2.groups.io (mailto:devel+owner@edk2.grou= ps.io) > > > > > > > Unsubscribe: https://edk2.groups.io/g/devel/unsub [michael.d.kinney@i= ntel.com] > > > > > > > -=3D-=3D-=3D-=3D-=3D-=3D > > > > > > > > > > > > > > > > > > > > >=20 --63325661_3d256b71_28c3 Content-Type: text/html; charset="utf-8" Content-Transfer-Encoding: quoted-printable Content-Disposition: inline
Thanks Liming and Mike!


Thanks,
Chao
-------= -

On 9= =E6=9C=88 27 2022, at 9:01 =E4=B8=8A=E5=8D=88, "Michael D Kinney" <micha= el.d.kinney@intel.com> wrote:
   &n= bsp;
Ok

=
 

Reviewed-= by: Michael D Kinney michael.d.kinney@intel.com
 

Mike
 

From: devel@edk2.groups.io <devel@edk2= .groups.io> On Behalf Of gaoliming via groups.io
<= div>Sent: Monday, September 26, 2022 5:55 PM
To: devel@edk2.groups.io; Kinney, Michael D <mic= hael.d.kinney@intel.com>; 'chao li' <lichao@loongson.cn>
Cc: Liu, Zhiguang <zhiguang.liu@intel.com>
Subject: =E5=9B=9E=E5=A4=8D: [edk2-devel] [PATCH v2 22/34] MdePk= g/Include: LoongArch definitions.
 

Mike:

 The comment =E2=80=9CFor coding conven= ience, define the maximum valid LoonArch interrupt.=E2=80=9D is also define= d in UEFI2.10 spec 18.2.5 EFI_DEBUG_SUPPORT_PROTOCOL.RegisterExcept= ionCallback().
 
  So, I think it is fine to keep this= comment in MdePkg Include header file.

 

Thanks

Liming

=
= =E5=8F=91=E4=BB=B6=E4=BA=BA: devel@edk2.groups.io <devel@edk2.groups.io> =E4=BB=A3=E8=A1=A8 Mich= ael D Kinney
= =E5=8F=91=E9=80=81=E6=97=B6=E9=97=B4: 2022=E5=B9= =B49=E6=9C=8824=E6=97= =A5 23:08
=E6=94=B6=E4=BB= =B6=E4=BA=BA:<= /font> chao li <lichao@loongson.cn>; Kinney, Michael D <michael.d.kinney@intel.com>
=E6=8A=84=E9=80=81: "\"devel@edk2.groups.io\"" <devel@edk2.group= s.io>; Gao, Liming <<= /font>gaoliming@byosoft.com= .cn>; Liu, Zhiguang <= zhiguang.liu@intel.com>

I am referring to this code comm= ent.

 

> +//


> +// For coding convenience, define the maximum valid=


> +// LoongArch interrupt.

>&n= bsp;

> +//


> +#define MAX_LOONG= ARCH_INTERRUPT 14

 

Mike

 

 
From: chao li <lichao@loongson.cn><= /div>
Sent: Friday, September 23, 2022 7:46 PM
To: Kinney, Michael D <mich= ael.d.kinney@intel.com>
Subject: Re= : [edk2-devel] [PATCH v2 22/34] MdePkg/Include: LoongArch definitions.
 

Mike,
Do you mean p= atches 0001 and 0002? If yes, I have tried removing both the two patches, b= ut the Azure CI always produces the ECC errors, I have no idea how to fix t= hem, so modify the CI YAM file to fix them, and Liming also recommends this= way.
 


Thanks,=
Chao
--------
On 9=E6=9C=88 24 2022, at 10:33 =E4=B8=8A=E5=8D=88, "Kinney, Michael D" <micha= el.d.kinney@intel.com> wrote:
    
If it is in spec, then the comment about =E2=80=9Ccoding conveni= ence=E2=80=9D is not required.
 
 
 

Mike
 

 
 

From: chao li <lichao@loongson.cn>
<= /div>
Sent: Friday, September 23, 2022 7:17 = PM
To: Kinney, Michael D <michael.d.kinney@intel.com>
 
 

<= div>
Hi Mkie,
I responded to your comment below.
 
 = ;

 

Thanks,
=
Chao
---= -----
On 9= =E6=9C=88 23 = 2022, at 11:46 =E6=99=9A= =E4=B8=8A, "Kinney, Michael D" <michael.d.kinney@i= ntel.com> wrote:
One comment below.
 
 

Mike
 
 

<= div class=3D"MsoNormal">> -----Original Message-----
> From: devel@edk2.groups.io&nbs= p;<devel@edk2.groups.io> On Behalf Of Chao Li
> Sent: Wednesday, September 14, 202= 2 2:41 AM
<= div>
> Subject: [edk2-devel] [PATCH v2 22/34] Md= ePkg/Include: LoongArch definitions.
> Add LoongArch processor related definitions.
> For the Http boot and PXE boot types se= eing this URL section "Processor
> Architecture Type" for the LOONGARCH values:
> For definitions of PE/COFF and LOONGA= RCH relocation types, see the
> "Machine Types" and "Basic Relocation Types" sections of this U= RL for
> LOONGARCH v= alues:
> For the register definitions of exceptions context,= see the UEFI V2.10
>= ; 18.2.2, 18.2.4 and 18.2.5 sections of this URL for LOONGARCH
<= /div>
> definitions:
=
> Cc: Michael D Kinney <michael.d.kinney@int= el.com>
> Cc:= Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhigu= ang.liu@intel.com>
> Sign= ed-off-by: Chao Li <lichao@loongson.cn>
> ---
> MdePkg/Include/IndustryStandard/PeImage.h | 9 ++
> MdePkg/Include/Protocol/Deb= ugSupport.h | 107 ++++++++++++++++++++--
> MdePkg/Include/Protocol/PxeBaseCode.h | 3 +
> MdePkg/Include/Uefi/UefiBa= seType.h | 14 +++
> = MdePkg/Include/Uefi/UefiSpec.h | 16 ++--
> 5 files changed, 136 insertions(+), 13 deletions(-)<= /div>
<= /div>
> diff --git a/MdePkg/Include/In= dustryStandard/PeImage.h b/MdePkg/Include/IndustryStandard/PeImage.h
<= /div>
> index 3109dc20f8..dd4cc2= 5483 100644
> --- a/= MdePkg/Include/IndustryStandard/PeImage.h
> +++ b/MdePkg/Include/IndustryStandard/PeImage.h
> @@ -10,6 +10,7 @@
> Copyright (c) 2006 - = 2018, Intel Corporation. All rights reserved.<BR>
> Portions copyright (c) 2008 - 2009, Apple Inc. Al= l rights reserved.<BR>
> P= ortions Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development L= P. All rights reserved.<BR>
&= gt; +Portions Copyright (c) 2022, Loongson Technology Corporation Limited. = All rights reserved.<BR>
>=  
=
> SPDX-License-Identifier= : BSD-2-Clause-Patent
&= gt; 
> @@ -38,6 +39,8 @@ SPDX-License-I= dentifier: BSD-2-Clause-Patent
> #define IMAGE_FILE_MACHINE_RISCV32 0x5032
> #define IMAGE_FILE_MACHINE_RISCV64 0x5064
> #define IMAGE_FILE_MACHINE_RISCV128 0x= 5128
> +#define IMAGE_FILE_MACHI= NE_LOONGARCH32 0x6232
&= gt; 
> +#define= IMAGE_FILE_MACHINE_LOONGARCH64 0x6264
>&nbs= p;
> //
<= /div>
> // EXE file formats
=
> @@ -503,6 +506,12 @@ typedef struct {
> #define EFI_IMAGE_REL_BASED_RISC= V_LOW12I 7
> #define EFI_IMAGE_R= EL_BASED_RISCV_LOW12S 8
> <= /div>
<= /div>
> +//
> +// Relocation types of LoongArch processor.
=
> +//
> +#define EFI_IMAGE_REL_BASED_LOONGARCH32_MARK_LA 8
=
> +#define EFI_IMAGE_REL_BASED_LOONGARCH64_MARK= _LA 8
<= /div>
> +
=
> ///
> ///= Line number format.
&g= t; 
> ///
=
=
> diff --git a/MdePkg/Include/Protoco= l/DebugSupport.h b/MdePkg/Include/Protocol/DebugSupport.h
=
> index ec5b92a5c5..2b0ae2d157 100644=
> --- a/MdePkg/Incl= ude/Protocol/DebugSupport.h
> +++ b/MdePkg/Include/Protocol/DebugSupport.h
> @@ -654,17 +654,110 @@ typedef struct = {
> UINT64 X31;
> } EFI_SYSTEM_CONTEXT_RISCV64;
<= div class=3D"MsoNormal">> 
> +//
&g= t; 
> +// Loong= Arch processor exception types.
>= ; +//
<= /div>
> +#define EXCEPT_LOONGARC= H_INT 0
> +#define EXCEPT_LOONGA= RCH_PIL 1
> +#define EXCEPT_LOON= GARCH_PIS 2
> <= /div>
> +#define EXCEPT_LO= ONGARCH_PIF 3
> = ;
> +#define EXCEPT_= LOONGARCH_PME 4
>&nb= sp;
> +#define EXCEP= T_LOONGARCH_PNR 5
>&= nbsp;
> +#define EXC= EPT_LOONGARCH_PNX 6
>= ; 
> +#define E= XCEPT_LOONGARCH_PPI 7
&= gt; 
> +#define= EXCEPT_LOONGARCH_ADE 8
> +#defi= ne EXCEPT_LOONGARCH_ALE 9
> +#de= fine EXCEPT_LOONGARCH_BCE 10
> += #define EXCEPT_LOONGARCH_SYS 11
>= ; +#define EXCEPT_LOONGARCH_BRK 12
= > +#define EXCEPT_LOONGARCH_INE 13
> +#define EXCEPT_LOONGARCH_IPE 14
> +#define EXCEPT_LOONGARCH_FPD 15
> +#define EXCEPT_LOONGARCH_SXD 16
<= div class=3D"MsoNormal">> 
> +#define EXCEPT_LOONGARCH_ASXD 17
> +#define EXCEPT_LOONGARCH_FPE 18
> +#define EXCEPT_LOONGARCH_TBR 64 // For code only, = there is no such type in the ISA spec, the TLB refill is defined for an
> independent exception= .
> +
> +//
> +// Lo= ongArch processor Interrupt types.
= > +//
> +#define EXCEPT_LOONG= ARCH_INT_SIP0 0
>&nb= sp;
> +#define EXCEP= T_LOONGARCH_INT_SIP1 1
= > 
> +#defin= e EXCEPT_LOONGARCH_INT_IP0 2
> += #define EXCEPT_LOONGARCH_INT_IP1 3
= > +#define EXCEPT_LOONGARCH_INT_IP2 4
> +#define EXCEPT_LOONGARCH_INT_IP3 5
<= div class=3D"MsoNormal">> 
> +#define EXCEPT_LOONGARCH_INT_IP4 6
=
> +#define EXCEPT_LOONGARCH_INT_IP5 7
<= div class=3D"MsoNormal">> +#define EXCEPT_LOONGARCH_INT_IP6 8
=
> +#define EXCEPT_LOONGARCH_INT_IP7 9
> +#define EXCEPT_LOONGARCH_INT_PMC = 10
> +#define EXCEPT_LOONGARCH_I= NT_TIMER 11
> <= /div>
> +#define EXCEPT_LO= ONGARCH_INT_IPI 12
>=  
> +
> +//
> +// For coding convenience, define the maximum valid
<= /div>
> +// LoongArch interrupt.
=
> +//
>= ; +#define MAX_LOONGARCH_INTERRUPT 14
 
 

<= div>
Should this define be moved into the libs/modu= les that uses
this defi= ne? Prefer to only see definitions from specs in
this file.
Chao Li: Yes, this macro is defined in the UEFI Spec V2= .10 section 18.2.5.
If you insist = on your opinion, I can remove it in this file. So what's your opinion now?<= /font>
 
 

> +
> +typedef struct {
> + UINT64 R0;
> + UINT64 R1;
> + U= INT64 R2;
> + UINT64 R3;
> + UINT64 R4;
> + UINT64 R5;
&= gt; + UINT64 R6;
>&n= bsp;
> + UINT64 R7;<= /div>
<= /div>
> + UINT64 R8;
=
> + UINT64 R9;
> + UINT64 R10;
> + UIN= T64 R11;
> + UINT64 R12;
> + UINT64 R13;
<= div>
> + UINT64 R14;
> + UINT64 R15;
&= gt; 
> + UINT64= R16;
<= /div>
> + UINT64 R17;
=
> + UINT64 R18;
> + UINT64 R19;
&= gt; + UINT64 R20;
>&= nbsp;
> + UINT64 R21= ;
> + UINT64 R22;
> + UINT64 R23;
> + UINT64 R24;
> += UINT64 R25;
> =
> + UINT64 R26;
> + UINT64 R27;
> + UINT64 R28;
> + UINT64 R29;
> + UINT= 64 R30;
> + UINT64 R31;
> +
> + UINT64 CRMD; // CuRrent MoDe information
<= div>
> + UINT64 PRMD; // PRe-exception MoDe information
> + UINT64 EUEN; // Extended compone= nt Unit ENable
>&nbs= p;
> + UINT64 MISC; = // MISCellaneous controller
> + = UINT64 ECFG; // Exception ConFiGuration
> + UINT64 ESTAT; // Exception STATus
> + UINT64 ERA; // Exception Return Address
=
> + UINT64 BADV; // BAD Virtual address
> + UINT64 BADI; // BAD Instruction
=
=
> +} EFI_SYSTEM_CONTEXT_LOONGARCH64;<= /div>
<= /div>
> +
<= div class=3D"MsoNormal">> 
> ///
&g= t; 
> /// Unive= rsal EFI_SYSTEM_CONTEXT definition.
> ///
> <= /div>
> typedef union {
> - EFI_SYSTEM_CONTEXT_EBC *System= ContextEbc;
> <= /div>
> - EFI_SYSTEM_CONTE= XT_IA32 *SystemContextIa32;
> - = EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;
> - EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
> - EFI_SYSTEM_CONTEXT_ARM *SystemContextArm;
=
=
> - EFI_SYSTEM_CONTEXT_AARCH64 *Syste= mContextAArch64;
>&n= bsp;
> - EFI_SYSTEM_= CONTEXT_RISCV64 *SystemContextRiscV64;
> + EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
=
> + EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
<= /div>
<= div>
> + EFI_SYSTEM_CONTEXT_X64 *SystemCont= extX64;
> + EFI_SYSTEM_CONTEXT_I= PF *SystemContextIpf;
&= gt; 
> + EFI_SY= STEM_CONTEXT_ARM *SystemContextArm;
> + EFI_SYSTEM_CONTEXT_AARCH64 *SystemContextAArch64;
=
> + EFI_SYSTEM_CONTEXT_RISCV64 *SystemContextRi= scV64;
=
> + EFI_SYSTEM_CONTEXT_LO= ONGARCH64 *SystemContextLoongArch64;
> } EFI_SYSTEM_CONTEXT;
>&= nbsp;
<= /div>
> //
> diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h = b/MdePkg/Include/Protocol/PxeBaseCode.h
> index 11872d602d..6787941a5d 100644
=
> --- a/MdePkg/Include/Protocol/PxeBa= seCode.h
> +++ b/Mde= Pkg/Include/Protocol/PxeBaseCode.h
> @@ -4,6 +4,7 @@
&g= t; 
> Copyright= (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
> Copyright (c) 2020, Hewlett Packard E= nterprise Development LP. All rights reserved.<BR>
<= div>
> +Copyright (c) 2022, Loongson Technology Corpora= tion Limited. All rights reserved.<BR>
&g= t; 
> SPDX-Lice= nse-Identifier: BSD-2-Clause-Patent
> = ;
> @@ -158,6 +159,8= @@ typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
<= div class=3D"MsoNormal">> #define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0= 00B
> #elif defined (MDE_CPU_RIS= CV64)
<= /div>
> #define EFI_PXE_CLIENT_S= YSTEM_ARCHITECTURE 0x001B
> +#el= if defined (MDE_CPU_LOONGARCH64)
&g= t; +#define EFI_PXE_CLIENT_SYSTEM_ARCHITECTURE 0x0027
> #endif
>=  
=
> ///
> diff --git a/MdePkg/Include/Uefi/UefiBaseType.h b= /MdePkg/Include/Uefi/UefiBaseType.h
> index 4a34ce8e25..83975a08eb 100644
> --- a/MdePkg/Include/Uefi/UefiBaseTyp= e.h
> +++ b/MdePkg/I= nclude/Uefi/UefiBaseType.h
> @@ -4,6 +4,7 @@
> Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.&l= t;BR>
> Portions copyright (c= ) 2011 - 2016, ARM Ltd. All rights reserved.<BR>
> Copyright (c) 2020, Hewlett Packard Enterprise Dev= elopment LP. All rights reserved.<BR>
> +Copyright (c) 2022, Loongson Technology Corporation Limited.= All rights reserved.<BR>
>= ; 
> SPDX-License-Identifie= r: BSD-2-Clause-Patent
= > 
> @@ -246,6 +247,12 @@ typedef un= ion {
> #define EFI_= IMAGE_MACHINE_RISCV64 0x5064
> #= define EFI_IMAGE_MACHINE_RISCV128 0x5128
>&n= bsp;
> +///
> +/// PE32+ Machine type for LoongArch = 32/64 images.
> = ;
> +///
=
<= div>
> +#define EFI_IMAGE_MACHINE_LOONGARCH32 0x= 6232
> +#define EFI_IMAGE_MACHIN= E_LOONGARCH64 0x6264
&g= t; 
> +
> #if !defined (EFI_IMAGE_MACHINE_TYPE_= VALUE) && !defined (EFI_IMAGE_MACHINE_CROSS_TYPE_VALUE)
=
<= div>
> #if defined (MDE_CPU_IA32)
> @@ -278,6 +285,13 @@ typedef union {
> #define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine= ) \
> ((Machine) =3D=3D EFI_IMAG= E_MACHINE_RISCV64)
>=  
=
=
> +#define EFI_IMAGE_MACHINE_CROSS_TY= PE_SUPPORTED(Machine) (FALSE)
> = +
> + #elif defined (MDE_CPU_LOO= NGARCH64)
> +
<= div>
> +#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machin= e) \
> + ((Machine) =3D=3D EFI_I= MAGE_MACHINE_LOONGARCH64)
> +
> #define EFI_IMAGE_MACHINE_CROSS_= TYPE_SUPPORTED(Machine) (FALSE)
>= ; 
> #elif defined (MDE_CPU= _EBC)
<= /div>
> diff --git a/MdePkg/Incl= ude/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h
=
> index 2b38b100f6..3abebbb8d9 100644
> --- a/MdePkg/Include/U= efi/UefiSpec.h
> +++= b/MdePkg/Include/Uefi/UefiSpec.h
> @@ -7,6 +7,7 @@
>= ; 
> Copyright = (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
> Portions Copyright (c) 2020, Hewlett P= ackard Enterprise Development LP. All rights reserved.<BR>
=
> +Copyright (c) 2022, Loongson Technology= Corporation Limited. All rights reserved.<BR>
=
> S= PDX-License-Identifier: BSD-2-Clause-Patent
>= ; 
> @@ -2195,1= 2 +2196,13 @@ typedef struct {
> //
>&nb= sp;
> // EFI File lo= cation to boot from on removable media devices
<= div class=3D"MsoNormal">> 
> //
>= ; 
> -#define E= FI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"
=
=
> -#define EFI_REMOVABLE_MEDIA_FILE_N= AME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"
> -#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\= \BOOTX64.EFI"
>&= nbsp;
> -#define EFI= _REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"
> -#define EFI_REMOVABLE_MEDIA_FILE_NAME_= AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"
> -#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\EFI\\BO= OT\\BOOTRISCV64.EFI"
> +#def= ine EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"<= /div>
<= /div>
> +#define EFI_REMOVABLE_MEDIA_F= ILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"
> +#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\= BOOT\\BOOTX64.EFI"
= > 
> +#defin= e EFI_REMOVABLE_MEDIA_FILE_NAME_ARM L"\\EFI\\BOOT\\BOOTARM.EFI"
> +#define EFI_REMOVABLE_MEDIA_FILE_= NAME_AARCH64 L"\\EFI\\BOOT\\BOOTAA64.EFI"
> +#define EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64 L"\\E= FI\\BOOT\\BOOTRISCV64.EFI"
>= +#define EFI_REMOVABLE_MEDIA_FILE_NAME_LOONGARCH64 L"\\EFI\\BOOT\\BOOTL= OONGARCH64.EFI"
>= ; 
> #if !defined (EFI_REMOVABLE_MEDIA_= FILE_NAME)
> #if defined (MDE_CP= U_IA32)
> @@ -2214,6 +2216,8 @@ = typedef struct {
> #= define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64<= /div>
<= /div>
> #elif defined (MDE_CPU_RISCV64= )
> #define EFI_REMOVABLE_MEDIA_= FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_RISCV64
=
> + #elif defined (MDE_CPU_LOONGARCH64)
=
> +#define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMO= VABLE_MEDIA_FILE_NAME_LOONGARCH64
&= gt; #else
> #error Unknown Proce= ssor Type
> #endif
> --
> 2.27.0
> <= /div>
<= /div>
> -=3D-=3D-=3D-=3D-=3D-=3D
=
> Groups.io Links: You re= ceive all messages sent to this group.
> Uns= ubscribe: https://edk2.groups.io/g/devel/unsub&nbs= p;[michael.d.kinney@intel.com]
> -=3D-=3D-=3D-=3D-=3D-=3D
<= /div>

--63325661_3d256b71_28c3--