* [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description
2021-06-13 18:16 [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Marcin Wojtas
@ 2021-06-13 18:16 ` Marcin Wojtas
2021-07-09 5:51 ` Grzegorz Bernacki
2021-06-13 18:16 ` [edk2-platforms PATCH 2/4] Marvell/Cn913xDb: " Marcin Wojtas
` (3 subsequent siblings)
4 siblings, 1 reply; 15+ messages in thread
From: Marcin Wojtas @ 2021-06-13 18:16 UTC (permalink / raw)
To: devel
Cc: leif, ardb+tianocore, jaz, gjb, upstream, Samer.El-Haj-Mahmoud,
jon, Marcin Wojtas
As the MDIO ACPI binding in DSDT is now established,
add description for the SMI and XSMI controllers, along
with the 10G and 1G PHYs.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
index bdc32983d3..d26945d933 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
@@ -228,6 +228,56 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
})
}
+ Device (SMI0)
+ {
+ Name (_HID, "MRVL0100") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a200, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ }
+ }
+
+ Device (XSMI)
+ {
+ Name (_HID, "MRVL0101") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a600, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
+ }
+ })
+ }
+ Device (PHY8)
+ {
+ Name (_ADR, 0x8)
+ Name (_DSD, Package () {
+ ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+ Package () {
+ Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
+ }
+ })
+ }
+ }
+
Device (PP20)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
@@ -261,6 +311,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "phy-handle", \_SB.XSMI.PHY0},
}
})
}
@@ -299,6 +350,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "phy-handle", \_SB.XSMI.PHY8},
}
})
}
@@ -318,6 +370,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 1 },
Package () { "gop-port-id", 2 },
Package () { "phy-mode", "sgmii"},
+ Package () { "phy-handle", \_SB.SMI0.PHY0},
}
})
}
--
2.29.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description
2021-06-13 18:16 ` [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description Marcin Wojtas
@ 2021-07-09 5:51 ` Grzegorz Bernacki
0 siblings, 0 replies; 15+ messages in thread
From: Grzegorz Bernacki @ 2021-07-09 5:51 UTC (permalink / raw)
To: Marcin Wojtas
Cc: devel, leif, ardb+tianocore, Grzegorz Jaszczyk, upstream,
Samer El-Haj-Mahmoud, jon
Tested-by: Grzegorz Bernacki <gjb@semihalf.com>
regards,
greg
niedz., 13 cze 2021 o 20:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
>
> As the MDIO ACPI binding in DSDT is now established,
> add description for the SMI and XSMI controllers, along
> with the 10G and 1G PHYs.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> index bdc32983d3..d26945d933 100644
> --- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> +++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl
> @@ -228,6 +228,56 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> })
> }
>
> + Device (SMI0)
> + {
> + Name (_HID, "MRVL0100") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite,
> + 0xf212a200, // Address Base
> + 0x00000010, // Address Length
> + )
> + })
> + Device (PHY0)
> + {
> + Name (_ADR, 0x0)
> + }
> + }
> +
> + Device (XSMI)
> + {
> + Name (_HID, "MRVL0101") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite,
> + 0xf212a600, // Address Base
> + 0x00000010, // Address Length
> + )
> + })
> + Device (PHY0)
> + {
> + Name (_ADR, 0x0)
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
> + }
> + })
> + }
> + Device (PHY8)
> + {
> + Name (_ADR, 0x8)
> + Name (_DSD, Package () {
> + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> + Package () {
> + Package () { "compatible", "ethernet-phy-ieee802.3-c45" },
> + }
> + })
> + }
> + }
> +
> Device (PP20)
> {
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> @@ -261,6 +311,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Package () { "port-id", 0 },
> Package () { "gop-port-id", 0 },
> Package () { "phy-mode", "10gbase-kr"},
> + Package () { "phy-handle", \_SB.XSMI.PHY0},
> }
> })
> }
> @@ -299,6 +350,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Package () { "port-id", 0 },
> Package () { "gop-port-id", 0 },
> Package () { "phy-mode", "10gbase-kr"},
> + Package () { "phy-handle", \_SB.XSMI.PHY8},
> }
> })
> }
> @@ -318,6 +370,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
> Package () { "port-id", 1 },
> Package () { "gop-port-id", 2 },
> Package () { "phy-mode", "sgmii"},
> + Package () { "phy-handle", \_SB.SMI0.PHY0},
> }
> })
> }
> --
> 2.29.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [edk2-platforms PATCH 2/4] Marvell/Cn913xDb: Add ACPI MDIO description
2021-06-13 18:16 [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Marcin Wojtas
2021-06-13 18:16 ` [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description Marcin Wojtas
@ 2021-06-13 18:16 ` Marcin Wojtas
2021-07-09 5:36 ` Grzegorz Bernacki
2021-06-13 18:16 ` [edk2-platforms PATCH 3/4] Marvell/Armada70x0Db: " Marcin Wojtas
` (2 subsequent siblings)
4 siblings, 1 reply; 15+ messages in thread
From: Marcin Wojtas @ 2021-06-13 18:16 UTC (permalink / raw)
To: devel
Cc: leif, ardb+tianocore, jaz, gjb, upstream, Samer.El-Haj-Mahmoud,
jon, Marcin Wojtas
As the MDIO ACPI binding in DSDT is now established,
add description for the SMI controller, along with the 1G PHYs.
Add also a missing 'managed' property to the 10G ports.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 1 +
Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 24 ++++++++++++++++++++
2 files changed, 25 insertions(+)
diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
index 691a709c18..8377b13763 100644
--- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
+++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
@@ -91,6 +91,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "managed", "in-band-status"},
}
})
}
diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
index 30de868907..d76a2a902b 100644
--- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
+++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
@@ -185,6 +185,27 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
})
}
+ Device (SMI0)
+ {
+ Name (_HID, "MRVL0100") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a200, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ }
+ Device (PHY1)
+ {
+ Name (_ADR, 0x1)
+ }
+ }
+
Device (PP20)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
@@ -218,6 +239,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "managed", "in-band-status"},
}
})
}
@@ -237,6 +259,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
Package () { "port-id", 1 },
Package () { "gop-port-id", 2 },
Package () { "phy-mode", "rgmii-id"},
+ Package () { "phy-handle", \_SB.SMI0.PHY0},
}
})
}
@@ -256,6 +279,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
Package () { "port-id", 2 },
Package () { "gop-port-id", 3 },
Package () { "phy-mode", "rgmii-id"},
+ Package () { "phy-handle", \_SB.SMI0.PHY1},
}
})
}
--
2.29.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [edk2-platforms PATCH 2/4] Marvell/Cn913xDb: Add ACPI MDIO description
2021-06-13 18:16 ` [edk2-platforms PATCH 2/4] Marvell/Cn913xDb: " Marcin Wojtas
@ 2021-07-09 5:36 ` Grzegorz Bernacki
0 siblings, 0 replies; 15+ messages in thread
From: Grzegorz Bernacki @ 2021-07-09 5:36 UTC (permalink / raw)
To: Marcin Wojtas
Cc: devel, leif, ardb+tianocore, Grzegorz Jaszczyk, upstream,
Samer El-Haj-Mahmoud, jon
Tested-by: Grzegorz Bernacki <gjb@semihalf.com>
regards,
greg
niedz., 13 cze 2021 o 20:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
>
> As the MDIO ACPI binding in DSDT is now established,
> add description for the SMI controller, along with the 1G PHYs.
> Add also a missing 'managed' property to the 10G ports.
>
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 1 +
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 24 ++++++++++++++++++++
> 2 files changed, 25 insertions(+)
>
> diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> index 691a709c18..8377b13763 100644
> --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> @@ -91,6 +91,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2, "MVEBU ", "CN9131", 3)
> Package () { "port-id", 0 },
> Package () { "gop-port-id", 0 },
> Package () { "phy-mode", "10gbase-kr"},
> + Package () { "managed", "in-band-status"},
> }
> })
> }
> diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> index 30de868907..d76a2a902b 100644
> --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl
> @@ -185,6 +185,27 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> })
> }
>
> + Device (SMI0)
> + {
> + Name (_HID, "MRVL0100") // _HID: Hardware ID
> + Name (_UID, 0x00) // _UID: Unique ID
> + Name (_CRS, ResourceTemplate ()
> + {
> + Memory32Fixed (ReadWrite,
> + 0xf212a200, // Address Base
> + 0x00000010, // Address Length
> + )
> + })
> + Device (PHY0)
> + {
> + Name (_ADR, 0x0)
> + }
> + Device (PHY1)
> + {
> + Name (_ADR, 0x1)
> + }
> + }
> +
> Device (PP20)
> {
> Name (_HID, "MRVL0110") // _HID: Hardware ID
> @@ -218,6 +239,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Package () { "port-id", 0 },
> Package () { "gop-port-id", 0 },
> Package () { "phy-mode", "10gbase-kr"},
> + Package () { "managed", "in-band-status"},
> }
> })
> }
> @@ -237,6 +259,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Package () { "port-id", 1 },
> Package () { "gop-port-id", 2 },
> Package () { "phy-mode", "rgmii-id"},
> + Package () { "phy-handle", \_SB.SMI0.PHY0},
> }
> })
> }
> @@ -256,6 +279,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "CN9130", 3)
> Package () { "port-id", 2 },
> Package () { "gop-port-id", 3 },
> Package () { "phy-mode", "rgmii-id"},
> + Package () { "phy-handle", \_SB.SMI0.PHY1},
> }
> })
> }
> --
> 2.29.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* [edk2-platforms PATCH 3/4] Marvell/Armada70x0Db: Add ACPI MDIO description
2021-06-13 18:16 [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Marcin Wojtas
2021-06-13 18:16 ` [edk2-platforms PATCH 1/4] SolidRun/Armada80x0McBin: Add ACPI MDIO description Marcin Wojtas
2021-06-13 18:16 ` [edk2-platforms PATCH 2/4] Marvell/Cn913xDb: " Marcin Wojtas
@ 2021-06-13 18:16 ` Marcin Wojtas
2021-06-13 18:16 ` [edk2-platforms PATCH 4/4] Marvell/Armada80x0Db: " Marcin Wojtas
2021-06-14 21:55 ` [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Leif Lindholm
4 siblings, 0 replies; 15+ messages in thread
From: Marcin Wojtas @ 2021-06-13 18:16 UTC (permalink / raw)
To: devel
Cc: leif, ardb+tianocore, jaz, gjb, upstream, Samer.El-Haj-Mahmoud,
jon, Marcin Wojtas
As the MDIO ACPI binding in DSDT is now established,
add description for the SMI controller, along with the 1G PHYs.
Add also a missing 'managed' property to the 10G port.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 24 ++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
index d4902652ec..345c1e4dd6 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl
@@ -182,6 +182,27 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
})
}
+ Device (SMI0)
+ {
+ Name (_HID, "MRVL0100") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a200, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ }
+ Device (PHY1)
+ {
+ Name (_ADR, 0x1)
+ }
+ }
+
Device (PP20)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
@@ -215,6 +236,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "managed", "in-band-status"},
}
})
}
@@ -234,6 +256,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
Package () { "port-id", 1 },
Package () { "gop-port-id", 2 },
Package () { "phy-mode", "sgmii"},
+ Package () { "phy-handle", \_SB.SMI0.PHY0},
}
})
}
@@ -253,6 +276,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA7K", 3)
Package () { "port-id", 2 },
Package () { "gop-port-id", 3 },
Package () { "phy-mode", "rgmii-id"},
+ Package () { "phy-handle", \_SB.SMI0.PHY1},
}
})
}
--
2.29.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* [edk2-platforms PATCH 4/4] Marvell/Armada80x0Db: Add ACPI MDIO description
2021-06-13 18:16 [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Marcin Wojtas
` (2 preceding siblings ...)
2021-06-13 18:16 ` [edk2-platforms PATCH 3/4] Marvell/Armada70x0Db: " Marcin Wojtas
@ 2021-06-13 18:16 ` Marcin Wojtas
2021-06-14 21:55 ` [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Leif Lindholm
4 siblings, 0 replies; 15+ messages in thread
From: Marcin Wojtas @ 2021-06-13 18:16 UTC (permalink / raw)
To: devel
Cc: leif, ardb+tianocore, jaz, gjb, upstream, Samer.El-Haj-Mahmoud,
jon, Marcin Wojtas
As the MDIO ACPI binding in DSDT is now established,
add description for the SMI controllers, along with the 1G PHYs.
Add also a missing 'managed' property to the 10G ports.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 38 ++++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
index 62ba62c7d2..91401c74c8 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl
@@ -229,6 +229,23 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
})
}
+ Device (SMI0)
+ {
+ Name (_HID, "MRVL0100") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf212a200, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY1)
+ {
+ Name (_ADR, 0x1)
+ }
+ }
+
Device (PP20)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
@@ -262,6 +279,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "managed", "in-band-status"},
}
})
}
@@ -281,11 +299,29 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 2 },
Package () { "gop-port-id", 3 },
Package () { "phy-mode", "rgmii-id"},
+ Package () { "phy-handle", \_SB.SMI0.PHY1},
}
})
}
}
+ Device (SMI1)
+ {
+ Name (_HID, "MRVL0100") // _HID: Hardware ID
+ Name (_UID, 0x01) // _UID: Unique ID
+ Name (_CRS, ResourceTemplate ()
+ {
+ Memory32Fixed (ReadWrite,
+ 0xf412a200, // Address Base
+ 0x00000010, // Address Length
+ )
+ })
+ Device (PHY0)
+ {
+ Name (_ADR, 0x0)
+ }
+ }
+
Device (PP21)
{
Name (_HID, "MRVL0110") // _HID: Hardware ID
@@ -319,6 +355,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 0 },
Package () { "gop-port-id", 0 },
Package () { "phy-mode", "10gbase-kr"},
+ Package () { "managed", "in-band-status"},
}
})
}
@@ -338,6 +375,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "MVEBU ", "ARMADA8K", 3)
Package () { "port-id", 1 },
Package () { "gop-port-id", 2 },
Package () { "phy-mode", "rgmii-id"},
+ Package () { "phy-handle", \_SB.SMI1.PHY0},
}
})
}
--
2.29.0
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-06-13 18:16 [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Marcin Wojtas
` (3 preceding siblings ...)
2021-06-13 18:16 ` [edk2-platforms PATCH 4/4] Marvell/Armada80x0Db: " Marcin Wojtas
@ 2021-06-14 21:55 ` Leif Lindholm
2021-06-15 4:10 ` Jon Nettleton
2021-06-29 14:17 ` Marcin Wojtas
4 siblings, 2 replies; 15+ messages in thread
From: Leif Lindholm @ 2021-06-14 21:55 UTC (permalink / raw)
To: Marcin Wojtas
Cc: devel, ardb+tianocore, jaz, gjb, upstream, Samer.El-Haj-Mahmoud,
jon
Hi Marcin,
On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> Hi,
>
> The MDIO ACPI binding has been established and merged to the
> Linux tree,
Congratulations! :)
Is FreeBSD expected to follow suit?
> hence it is now possible to update the ACPI
> description of the platforms that base on the Marvell SoCs.
>
> For convenience, the code is exposed in the public github branch:
> https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> There is also MacchiatoBin firmware binary avaialable for testing:
> https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
>
> I'm looking forward to the comments or remarks.
The patches themselves look straightforward enough.
I *would* prefer some tested-by, for these sources rather than the
binary, before merging though.
Best Regards,
Leif
> Best regards,
> Marcin
>
> Marcin Wojtas (4):
> SolidRun/Armada80x0McBin: Add ACPI MDIO description
> Marvell/Cn913xDb: Add ACPI MDIO description
> Marvell/Armada70x0Db: Add ACPI MDIO description
> Marvell/Armada80x0Db: Add ACPI MDIO description
>
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 24 +++++++++
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 38 ++++++++++++++
> Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 1 +
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 24 +++++++++
> 5 files changed, 140 insertions(+)
>
> --
> 2.29.0
>
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-06-14 21:55 ` [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Leif Lindholm
@ 2021-06-15 4:10 ` Jon Nettleton
2021-06-29 14:17 ` Marcin Wojtas
1 sibling, 0 replies; 15+ messages in thread
From: Jon Nettleton @ 2021-06-15 4:10 UTC (permalink / raw)
To: Leif Lindholm
Cc: Marcin Wojtas, devel, Ard Biesheuvel (TianoCore),
Grzegorz Jaszczyk, gjb, upstream, Samer El-Haj-Mahmoud
On Mon, Jun 14, 2021 at 11:55 PM Leif Lindholm <leif@nuviainc.com> wrote:
>
> Hi Marcin,
>
> On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > Hi,
> >
> > The MDIO ACPI binding has been established and merged to the
> > Linux tree,
>
> Congratulations! :)
>
> Is FreeBSD expected to follow suit?
>
> > hence it is now possible to update the ACPI
> > description of the platforms that base on the Marvell SoCs.
> >
> > For convenience, the code is exposed in the public github branch:
> > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > There is also MacchiatoBin firmware binary avaialable for testing:
> > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> >
> > I'm looking forward to the comments or remarks.
>
> The patches themselves look straightforward enough.
> I *would* prefer some tested-by, for these sources rather than the
> binary, before merging though.
I will get the ACPI changes from Marcin and put a Tested-By on
from SolidRun's side.
Jon
>
> Best Regards,
>
> Leif
>
> > Best regards,
> > Marcin
> >
> > Marcin Wojtas (4):
> > SolidRun/Armada80x0McBin: Add ACPI MDIO description
> > Marvell/Cn913xDb: Add ACPI MDIO description
> > Marvell/Armada70x0Db: Add ACPI MDIO description
> > Marvell/Armada80x0Db: Add ACPI MDIO description
> >
> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada70x0Db/Dsdt.asl | 24 +++++++++
> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0Db/Dsdt.asl | 38 ++++++++++++++
> > Silicon/Marvell/Armada7k8k/AcpiTables/Armada80x0McBin/Dsdt.asl | 53 ++++++++++++++++++++
> > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 1 +
> > Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn913xDbA/Dsdt.asl | 24 +++++++++
> > 5 files changed, 140 insertions(+)
> >
> > --
> > 2.29.0
> >
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-06-14 21:55 ` [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs Leif Lindholm
2021-06-15 4:10 ` Jon Nettleton
@ 2021-06-29 14:17 ` Marcin Wojtas
2021-07-12 10:51 ` Marcin Wojtas
1 sibling, 1 reply; 15+ messages in thread
From: Marcin Wojtas @ 2021-06-29 14:17 UTC (permalink / raw)
To: Leif Lindholm
Cc: edk2-devel-groups-io, Ard Biesheuvel, Grzegorz Jaszczyk,
Grzegorz Bernacki, upstream, Samer El-Haj-Mahmoud, Jon Nettleton
Hi Leif,
pon., 14 cze 2021 o 23:55 Leif Lindholm <leif@nuviainc.com> napisał(a):
>
> Hi Marcin,
>
> On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > Hi,
> >
> > The MDIO ACPI binding has been established and merged to the
> > Linux tree,
>
> Congratulations! :)
>
> Is FreeBSD expected to follow suit?
There's no driver yet, but once it's finally created I will make sure
it supports ACPI properly.
>
> > hence it is now possible to update the ACPI
> > description of the platforms that base on the Marvell SoCs.
> >
> > For convenience, the code is exposed in the public github branch:
> > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > There is also MacchiatoBin firmware binary avaialable for testing:
> > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> >
> > I'm looking forward to the comments or remarks.
>
> The patches themselves look straightforward enough.
> I *would* prefer some tested-by, for these sources rather than the
> binary, before merging though.
>
I have some our patches queued, that are blocked by this patchset. In
case no time is found for external testers - if this may help to get
it pushed through, please see below logs from the next-20210628 tag
and unchanged firmware. All network ports of MacchiatoBin and
CN913x-DB work properly, with full 1G/10G PHY support via X/MDIO
interfaces:
MacchiatoBin
# uname -a
Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
09:14:07 CEST 2021 aarch64 GNU/Linux
# dmesg | grep MRVL0101
[ 1.829659] mv88x3340 MRVL0101:00-mii:00: Firmware version 0.3.3.0
[ 1.839622] mv88x3340 MRVL0101:00-mii:08: Firmware version 0.3.3.0
[ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
[mv88x3340] (irq=POLL)
[ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
[mv88x3340] (irq=POLL)
# dmesg | grep MRVL0100
[ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
[Marvell 88E1510] (irq=POLL)
# dmesg | grep mvpp2
[...]
[ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
[mv88x3340] (irq=POLL)
[ 2.756701] mvpp2 MRVL0110:00 eth1: configuring for phy/10gbase-r link mode
[ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
[mv88x3340] (irq=POLL)
[ 2.775834] mvpp2 MRVL0110:01 eth2: configuring for phy/10gbase-r link mode
[ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
[Marvell 88E1510] (irq=POLL)
[ 2.928285] mvpp2 MRVL0110:01 eth3: configuring for phy/sgmii link mode
[ 2.936351] mvpp2 MRVL0110:01 eth4: configuring for
inband/2500base-x link mode
[ 5.987259] mvpp2 MRVL0110:01 eth3: Link is Up - 1Gbps/Full - flow
control off
#
CN913x-DB
# uname -a
Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
09:14:07 CEST 2021 aarch64 GNU/Linux
# dmesg | grep MRVL0100
[ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
[Marvell 88E1510] (irq=POLL)
[ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
[Marvell 88E1510] (irq=POLL)
# dmesg | grep mvpp2
[...]
[ 2.544917] mvpp2 MRVL0110:00 eth1: configuring for
inband/10gbase-r link mode
[ 2.552480] mvpp2 MRVL0110:00 eth1: Link is Up - 10Gbps/Full - flow
control rx
[ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
[Marvell 88E1510] (irq=POLL)
[ 2.630060] mvpp2 MRVL0110:00 eth2: configuring for phy/rgmii-id link mode
[ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
[Marvell 88E1510] (irq=POLL)
[ 2.750056] mvpp2 MRVL0110:00 eth3: configuring for phy/rgmii-id link mode
[ 2.810169] mvpp2 MRVL0110:01 eth4: configuring for
inband/10gbase-r link mode
[ 2.817471] mvpp2 MRVL0110:01 eth4: Link is Up - 10Gbps/Full - flow
control rx
[ 5.693231] mvpp2 MRVL0110:00 eth2: Link is Up - 1Gbps/Full - flow
control off
[ 10.840942] mvpp2 MRVL0110:00 eth1: Link is Down
[ 10.864124] mvpp2 MRVL0110:01 eth4: Link is Down
#
Best regards,
Marcin
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-06-29 14:17 ` Marcin Wojtas
@ 2021-07-12 10:51 ` Marcin Wojtas
2021-07-12 11:17 ` Jon Nettleton
0 siblings, 1 reply; 15+ messages in thread
From: Marcin Wojtas @ 2021-07-12 10:51 UTC (permalink / raw)
To: Leif Lindholm, Ard Biesheuvel
Cc: edk2-devel-groups-io, Grzegorz Jaszczyk, Grzegorz Bernacki,
upstream, Samer El-Haj-Mahmoud, Jon Nettleton
Hi,
wt., 29 cze 2021 o 16:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
>
> Hi Leif,
>
> pon., 14 cze 2021 o 23:55 Leif Lindholm <leif@nuviainc.com> napisał(a):
> >
> > Hi Marcin,
> >
> > On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > > Hi,
> > >
> > > The MDIO ACPI binding has been established and merged to the
> > > Linux tree,
> >
> > Congratulations! :)
> >
> > Is FreeBSD expected to follow suit?
>
> There's no driver yet, but once it's finally created I will make sure
> it supports ACPI properly.
>
> >
> > > hence it is now possible to update the ACPI
> > > description of the platforms that base on the Marvell SoCs.
> > >
> > > For convenience, the code is exposed in the public github branch:
> > > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > > There is also MacchiatoBin firmware binary avaialable for testing:
> > > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> > >
> > > I'm looking forward to the comments or remarks.
> >
> > The patches themselves look straightforward enough.
> > I *would* prefer some tested-by, for these sources rather than the
> > binary, before merging though.
> >
>
> I have some our patches queued, that are blocked by this patchset. In
> case no time is found for external testers - if this may help to get
> it pushed through, please see below logs from the next-20210628 tag
> and unchanged firmware. All network ports of MacchiatoBin and
> CN913x-DB work properly, with full 1G/10G PHY support via X/MDIO
> interfaces:
>
> MacchiatoBin
> # uname -a
> Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> 09:14:07 CEST 2021 aarch64 GNU/Linux
> # dmesg | grep MRVL0101
> [ 1.829659] mv88x3340 MRVL0101:00-mii:00: Firmware version 0.3.3.0
> [ 1.839622] mv88x3340 MRVL0101:00-mii:08: Firmware version 0.3.3.0
> [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> [mv88x3340] (irq=POLL)
> [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> [mv88x3340] (irq=POLL)
> # dmesg | grep MRVL0100
> [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> [Marvell 88E1510] (irq=POLL)
> # dmesg | grep mvpp2
> [...]
> [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> [mv88x3340] (irq=POLL)
> [ 2.756701] mvpp2 MRVL0110:00 eth1: configuring for phy/10gbase-r link mode
> [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> [mv88x3340] (irq=POLL)
> [ 2.775834] mvpp2 MRVL0110:01 eth2: configuring for phy/10gbase-r link mode
> [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> [Marvell 88E1510] (irq=POLL)
> [ 2.928285] mvpp2 MRVL0110:01 eth3: configuring for phy/sgmii link mode
> [ 2.936351] mvpp2 MRVL0110:01 eth4: configuring for
> inband/2500base-x link mode
> [ 5.987259] mvpp2 MRVL0110:01 eth3: Link is Up - 1Gbps/Full - flow
> control off
> #
>
> CN913x-DB
> # uname -a
> Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> 09:14:07 CEST 2021 aarch64 GNU/Linux
> # dmesg | grep MRVL0100
> [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> [Marvell 88E1510] (irq=POLL)
> [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> [Marvell 88E1510] (irq=POLL)
> # dmesg | grep mvpp2
> [...]
> [ 2.544917] mvpp2 MRVL0110:00 eth1: configuring for
> inband/10gbase-r link mode
> [ 2.552480] mvpp2 MRVL0110:00 eth1: Link is Up - 10Gbps/Full - flow
> control rx
> [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> [Marvell 88E1510] (irq=POLL)
> [ 2.630060] mvpp2 MRVL0110:00 eth2: configuring for phy/rgmii-id link mode
> [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> [Marvell 88E1510] (irq=POLL)
> [ 2.750056] mvpp2 MRVL0110:00 eth3: configuring for phy/rgmii-id link mode
> [ 2.810169] mvpp2 MRVL0110:01 eth4: configuring for
> inband/10gbase-r link mode
> [ 2.817471] mvpp2 MRVL0110:01 eth4: Link is Up - 10Gbps/Full - flow
> control rx
> [ 5.693231] mvpp2 MRVL0110:00 eth2: Link is Up - 1Gbps/Full - flow
> control off
> [ 10.840942] mvpp2 MRVL0110:00 eth1: Link is Down
> [ 10.864124] mvpp2 MRVL0110:01 eth4: Link is Down
> #
>
Both platforms were have been additionally tested by Greg, do you have
any comments/objections to merging this patchset?
Thanks,
Marcin
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-07-12 10:51 ` Marcin Wojtas
@ 2021-07-12 11:17 ` Jon Nettleton
2021-07-16 17:32 ` Ard Biesheuvel
0 siblings, 1 reply; 15+ messages in thread
From: Jon Nettleton @ 2021-07-12 11:17 UTC (permalink / raw)
To: Marcin Wojtas
Cc: Leif Lindholm, Ard Biesheuvel, edk2-devel-groups-io,
Grzegorz Jaszczyk, Grzegorz Bernacki, upstream,
Samer El-Haj-Mahmoud
On Mon, Jul 12, 2021 at 12:52 PM Marcin Wojtas <mw@semihalf.com> wrote:
>
> Hi,
>
> wt., 29 cze 2021 o 16:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
> >
> > Hi Leif,
> >
> > pon., 14 cze 2021 o 23:55 Leif Lindholm <leif@nuviainc.com> napisał(a):
> > >
> > > Hi Marcin,
> > >
> > > On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > > > Hi,
> > > >
> > > > The MDIO ACPI binding has been established and merged to the
> > > > Linux tree,
> > >
> > > Congratulations! :)
> > >
> > > Is FreeBSD expected to follow suit?
> >
> > There's no driver yet, but once it's finally created I will make sure
> > it supports ACPI properly.
> >
> > >
> > > > hence it is now possible to update the ACPI
> > > > description of the platforms that base on the Marvell SoCs.
> > > >
> > > > For convenience, the code is exposed in the public github branch:
> > > > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > > > There is also MacchiatoBin firmware binary avaialable for testing:
> > > > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> > > >
> > > > I'm looking forward to the comments or remarks.
> > >
> > > The patches themselves look straightforward enough.
> > > I *would* prefer some tested-by, for these sources rather than the
> > > binary, before merging though.
> > >
> >
> > I have some our patches queued, that are blocked by this patchset. In
> > case no time is found for external testers - if this may help to get
> > it pushed through, please see below logs from the next-20210628 tag
> > and unchanged firmware. All network ports of MacchiatoBin and
> > CN913x-DB work properly, with full 1G/10G PHY support via X/MDIO
> > interfaces:
> >
> > MacchiatoBin
> > # uname -a
> > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > # dmesg | grep MRVL0101
> > [ 1.829659] mv88x3340 MRVL0101:00-mii:00: Firmware version 0.3.3.0
> > [ 1.839622] mv88x3340 MRVL0101:00-mii:08: Firmware version 0.3.3.0
> > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > [mv88x3340] (irq=POLL)
> > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > [mv88x3340] (irq=POLL)
> > # dmesg | grep MRVL0100
> > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > [Marvell 88E1510] (irq=POLL)
> > # dmesg | grep mvpp2
> > [...]
> > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > [mv88x3340] (irq=POLL)
> > [ 2.756701] mvpp2 MRVL0110:00 eth1: configuring for phy/10gbase-r link mode
> > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > [mv88x3340] (irq=POLL)
> > [ 2.775834] mvpp2 MRVL0110:01 eth2: configuring for phy/10gbase-r link mode
> > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > [Marvell 88E1510] (irq=POLL)
> > [ 2.928285] mvpp2 MRVL0110:01 eth3: configuring for phy/sgmii link mode
> > [ 2.936351] mvpp2 MRVL0110:01 eth4: configuring for
> > inband/2500base-x link mode
> > [ 5.987259] mvpp2 MRVL0110:01 eth3: Link is Up - 1Gbps/Full - flow
> > control off
> > #
> >
> > CN913x-DB
> > # uname -a
> > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > # dmesg | grep MRVL0100
> > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > [Marvell 88E1510] (irq=POLL)
> > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > [Marvell 88E1510] (irq=POLL)
> > # dmesg | grep mvpp2
> > [...]
> > [ 2.544917] mvpp2 MRVL0110:00 eth1: configuring for
> > inband/10gbase-r link mode
> > [ 2.552480] mvpp2 MRVL0110:00 eth1: Link is Up - 10Gbps/Full - flow
> > control rx
> > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > [Marvell 88E1510] (irq=POLL)
> > [ 2.630060] mvpp2 MRVL0110:00 eth2: configuring for phy/rgmii-id link mode
> > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > [Marvell 88E1510] (irq=POLL)
> > [ 2.750056] mvpp2 MRVL0110:00 eth3: configuring for phy/rgmii-id link mode
> > [ 2.810169] mvpp2 MRVL0110:01 eth4: configuring for
> > inband/10gbase-r link mode
> > [ 2.817471] mvpp2 MRVL0110:01 eth4: Link is Up - 10Gbps/Full - flow
> > control rx
> > [ 5.693231] mvpp2 MRVL0110:00 eth2: Link is Up - 1Gbps/Full - flow
> > control off
> > [ 10.840942] mvpp2 MRVL0110:00 eth1: Link is Down
> > [ 10.864124] mvpp2 MRVL0110:01 eth4: Link is Down
> > #
> >
>
> Both platforms were have been additionally tested by Greg, do you have
> any comments/objections to merging this patchset?
>
> Thanks,
> Marcin
You can add my Tested-by as well. Finally got time over the weekend
to verify on all my Marvell platforms this effects.
-Jon
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-07-12 11:17 ` Jon Nettleton
@ 2021-07-16 17:32 ` Ard Biesheuvel
2021-07-19 7:27 ` Ard Biesheuvel
0 siblings, 1 reply; 15+ messages in thread
From: Ard Biesheuvel @ 2021-07-16 17:32 UTC (permalink / raw)
To: Jon Nettleton
Cc: Marcin Wojtas, Leif Lindholm, Ard Biesheuvel,
edk2-devel-groups-io, Grzegorz Jaszczyk, Grzegorz Bernacki,
upstream, Samer El-Haj-Mahmoud
On Mon, 12 Jul 2021 at 13:17, Jon Nettleton <jon@solid-run.com> wrote:
>
> On Mon, Jul 12, 2021 at 12:52 PM Marcin Wojtas <mw@semihalf.com> wrote:
> >
> > Hi,
> >
> > wt., 29 cze 2021 o 16:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
> > >
> > > Hi Leif,
> > >
> > > pon., 14 cze 2021 o 23:55 Leif Lindholm <leif@nuviainc.com> napisał(a):
> > > >
> > > > Hi Marcin,
> > > >
> > > > On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > > > > Hi,
> > > > >
> > > > > The MDIO ACPI binding has been established and merged to the
> > > > > Linux tree,
> > > >
> > > > Congratulations! :)
> > > >
> > > > Is FreeBSD expected to follow suit?
> > >
> > > There's no driver yet, but once it's finally created I will make sure
> > > it supports ACPI properly.
> > >
> > > >
> > > > > hence it is now possible to update the ACPI
> > > > > description of the platforms that base on the Marvell SoCs.
> > > > >
> > > > > For convenience, the code is exposed in the public github branch:
> > > > > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > > > > There is also MacchiatoBin firmware binary avaialable for testing:
> > > > > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> > > > >
> > > > > I'm looking forward to the comments or remarks.
> > > >
> > > > The patches themselves look straightforward enough.
> > > > I *would* prefer some tested-by, for these sources rather than the
> > > > binary, before merging though.
> > > >
> > >
> > > I have some our patches queued, that are blocked by this patchset. In
> > > case no time is found for external testers - if this may help to get
> > > it pushed through, please see below logs from the next-20210628 tag
> > > and unchanged firmware. All network ports of MacchiatoBin and
> > > CN913x-DB work properly, with full 1G/10G PHY support via X/MDIO
> > > interfaces:
> > >
> > > MacchiatoBin
> > > # uname -a
> > > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > > # dmesg | grep MRVL0101
> > > [ 1.829659] mv88x3340 MRVL0101:00-mii:00: Firmware version 0.3.3.0
> > > [ 1.839622] mv88x3340 MRVL0101:00-mii:08: Firmware version 0.3.3.0
> > > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > > [mv88x3340] (irq=POLL)
> > > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > > [mv88x3340] (irq=POLL)
> > > # dmesg | grep MRVL0100
> > > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > > [Marvell 88E1510] (irq=POLL)
> > > # dmesg | grep mvpp2
> > > [...]
> > > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > > [mv88x3340] (irq=POLL)
> > > [ 2.756701] mvpp2 MRVL0110:00 eth1: configuring for phy/10gbase-r link mode
> > > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > > [mv88x3340] (irq=POLL)
> > > [ 2.775834] mvpp2 MRVL0110:01 eth2: configuring for phy/10gbase-r link mode
> > > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > > [Marvell 88E1510] (irq=POLL)
> > > [ 2.928285] mvpp2 MRVL0110:01 eth3: configuring for phy/sgmii link mode
> > > [ 2.936351] mvpp2 MRVL0110:01 eth4: configuring for
> > > inband/2500base-x link mode
> > > [ 5.987259] mvpp2 MRVL0110:01 eth3: Link is Up - 1Gbps/Full - flow
> > > control off
> > > #
> > >
> > > CN913x-DB
> > > # uname -a
> > > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > > # dmesg | grep MRVL0100
> > > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > > [Marvell 88E1510] (irq=POLL)
> > > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > > [Marvell 88E1510] (irq=POLL)
> > > # dmesg | grep mvpp2
> > > [...]
> > > [ 2.544917] mvpp2 MRVL0110:00 eth1: configuring for
> > > inband/10gbase-r link mode
> > > [ 2.552480] mvpp2 MRVL0110:00 eth1: Link is Up - 10Gbps/Full - flow
> > > control rx
> > > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > > [Marvell 88E1510] (irq=POLL)
> > > [ 2.630060] mvpp2 MRVL0110:00 eth2: configuring for phy/rgmii-id link mode
> > > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > > [Marvell 88E1510] (irq=POLL)
> > > [ 2.750056] mvpp2 MRVL0110:00 eth3: configuring for phy/rgmii-id link mode
> > > [ 2.810169] mvpp2 MRVL0110:01 eth4: configuring for
> > > inband/10gbase-r link mode
> > > [ 2.817471] mvpp2 MRVL0110:01 eth4: Link is Up - 10Gbps/Full - flow
> > > control rx
> > > [ 5.693231] mvpp2 MRVL0110:00 eth2: Link is Up - 1Gbps/Full - flow
> > > control off
> > > [ 10.840942] mvpp2 MRVL0110:00 eth1: Link is Down
> > > [ 10.864124] mvpp2 MRVL0110:01 eth4: Link is Down
> > > #
> > >
> >
> > Both platforms were have been additionally tested by Greg, do you have
> > any comments/objections to merging this patchset?
> >
> > Thanks,
> > Marcin
>
> You can add my Tested-by as well. Finally got time over the weekend
> to verify on all my Marvell platforms this effects.
>
Thanks all. I will get to this shortly - apologies for the delay.
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-07-16 17:32 ` Ard Biesheuvel
@ 2021-07-19 7:27 ` Ard Biesheuvel
2021-07-19 9:34 ` Marcin Wojtas
0 siblings, 1 reply; 15+ messages in thread
From: Ard Biesheuvel @ 2021-07-19 7:27 UTC (permalink / raw)
To: Jon Nettleton
Cc: Marcin Wojtas, Leif Lindholm, Ard Biesheuvel,
edk2-devel-groups-io, Grzegorz Jaszczyk, Grzegorz Bernacki,
upstream, Samer El-Haj-Mahmoud
On Fri, 16 Jul 2021 at 19:32, Ard Biesheuvel <ardb@kernel.org> wrote:
>
> On Mon, 12 Jul 2021 at 13:17, Jon Nettleton <jon@solid-run.com> wrote:
> >
> > On Mon, Jul 12, 2021 at 12:52 PM Marcin Wojtas <mw@semihalf.com> wrote:
> > >
> > > Hi,
> > >
> > > wt., 29 cze 2021 o 16:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
> > > >
> > > > Hi Leif,
> > > >
> > > > pon., 14 cze 2021 o 23:55 Leif Lindholm <leif@nuviainc.com> napisał(a):
> > > > >
> > > > > Hi Marcin,
> > > > >
> > > > > On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > > > > > Hi,
> > > > > >
> > > > > > The MDIO ACPI binding has been established and merged to the
> > > > > > Linux tree,
> > > > >
> > > > > Congratulations! :)
> > > > >
> > > > > Is FreeBSD expected to follow suit?
> > > >
> > > > There's no driver yet, but once it's finally created I will make sure
> > > > it supports ACPI properly.
> > > >
> > > > >
> > > > > > hence it is now possible to update the ACPI
> > > > > > description of the platforms that base on the Marvell SoCs.
> > > > > >
> > > > > > For convenience, the code is exposed in the public github branch:
> > > > > > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > > > > > There is also MacchiatoBin firmware binary avaialable for testing:
> > > > > > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> > > > > >
> > > > > > I'm looking forward to the comments or remarks.
> > > > >
> > > > > The patches themselves look straightforward enough.
> > > > > I *would* prefer some tested-by, for these sources rather than the
> > > > > binary, before merging though.
> > > > >
> > > >
> > > > I have some our patches queued, that are blocked by this patchset. In
> > > > case no time is found for external testers - if this may help to get
> > > > it pushed through, please see below logs from the next-20210628 tag
> > > > and unchanged firmware. All network ports of MacchiatoBin and
> > > > CN913x-DB work properly, with full 1G/10G PHY support via X/MDIO
> > > > interfaces:
> > > >
> > > > MacchiatoBin
> > > > # uname -a
> > > > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > > > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > > > # dmesg | grep MRVL0101
> > > > [ 1.829659] mv88x3340 MRVL0101:00-mii:00: Firmware version 0.3.3.0
> > > > [ 1.839622] mv88x3340 MRVL0101:00-mii:08: Firmware version 0.3.3.0
> > > > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > > > [mv88x3340] (irq=POLL)
> > > > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > > > [mv88x3340] (irq=POLL)
> > > > # dmesg | grep MRVL0100
> > > > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > > > [Marvell 88E1510] (irq=POLL)
> > > > # dmesg | grep mvpp2
> > > > [...]
> > > > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > > > [mv88x3340] (irq=POLL)
> > > > [ 2.756701] mvpp2 MRVL0110:00 eth1: configuring for phy/10gbase-r link mode
> > > > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > > > [mv88x3340] (irq=POLL)
> > > > [ 2.775834] mvpp2 MRVL0110:01 eth2: configuring for phy/10gbase-r link mode
> > > > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > > > [Marvell 88E1510] (irq=POLL)
> > > > [ 2.928285] mvpp2 MRVL0110:01 eth3: configuring for phy/sgmii link mode
> > > > [ 2.936351] mvpp2 MRVL0110:01 eth4: configuring for
> > > > inband/2500base-x link mode
> > > > [ 5.987259] mvpp2 MRVL0110:01 eth3: Link is Up - 1Gbps/Full - flow
> > > > control off
> > > > #
> > > >
> > > > CN913x-DB
> > > > # uname -a
> > > > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > > > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > > > # dmesg | grep MRVL0100
> > > > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > > > [Marvell 88E1510] (irq=POLL)
> > > > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > > > [Marvell 88E1510] (irq=POLL)
> > > > # dmesg | grep mvpp2
> > > > [...]
> > > > [ 2.544917] mvpp2 MRVL0110:00 eth1: configuring for
> > > > inband/10gbase-r link mode
> > > > [ 2.552480] mvpp2 MRVL0110:00 eth1: Link is Up - 10Gbps/Full - flow
> > > > control rx
> > > > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > > > [Marvell 88E1510] (irq=POLL)
> > > > [ 2.630060] mvpp2 MRVL0110:00 eth2: configuring for phy/rgmii-id link mode
> > > > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > > > [Marvell 88E1510] (irq=POLL)
> > > > [ 2.750056] mvpp2 MRVL0110:00 eth3: configuring for phy/rgmii-id link mode
> > > > [ 2.810169] mvpp2 MRVL0110:01 eth4: configuring for
> > > > inband/10gbase-r link mode
> > > > [ 2.817471] mvpp2 MRVL0110:01 eth4: Link is Up - 10Gbps/Full - flow
> > > > control rx
> > > > [ 5.693231] mvpp2 MRVL0110:00 eth2: Link is Up - 1Gbps/Full - flow
> > > > control off
> > > > [ 10.840942] mvpp2 MRVL0110:00 eth1: Link is Down
> > > > [ 10.864124] mvpp2 MRVL0110:01 eth4: Link is Down
> > > > #
> > > >
> > >
> > > Both platforms were have been additionally tested by Greg, do you have
> > > any comments/objections to merging this patchset?
> > >
> > > Thanks,
> > > Marcin
> >
> > You can add my Tested-by as well. Finally got time over the weekend
> > to verify on all my Marvell platforms this effects.
> >
>
> Thanks all. I will get to this shortly - apologies for the delay.
Pushed as bfabeef4c9a6..955187a12a8b
Thanks all.
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [edk2-platforms PATCH 0/4] ACPI MDIO support for Marvell SoCs
2021-07-19 7:27 ` Ard Biesheuvel
@ 2021-07-19 9:34 ` Marcin Wojtas
0 siblings, 0 replies; 15+ messages in thread
From: Marcin Wojtas @ 2021-07-19 9:34 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: Jon Nettleton, Leif Lindholm, Ard Biesheuvel,
edk2-devel-groups-io, Grzegorz Jaszczyk, Grzegorz Bernacki,
upstream, Samer El-Haj-Mahmoud
Hi Ard,
pon., 19 lip 2021 o 09:28 Ard Biesheuvel <ardb@kernel.org> napisał(a):
>
> On Fri, 16 Jul 2021 at 19:32, Ard Biesheuvel <ardb@kernel.org> wrote:
> >
> > On Mon, 12 Jul 2021 at 13:17, Jon Nettleton <jon@solid-run.com> wrote:
> > >
> > > On Mon, Jul 12, 2021 at 12:52 PM Marcin Wojtas <mw@semihalf.com> wrote:
> > > >
> > > > Hi,
> > > >
> > > > wt., 29 cze 2021 o 16:17 Marcin Wojtas <mw@semihalf.com> napisał(a):
> > > > >
> > > > > Hi Leif,
> > > > >
> > > > > pon., 14 cze 2021 o 23:55 Leif Lindholm <leif@nuviainc.com> napisał(a):
> > > > > >
> > > > > > Hi Marcin,
> > > > > >
> > > > > > On Sun, Jun 13, 2021 at 20:16:27 +0200, Marcin Wojtas wrote:
> > > > > > > Hi,
> > > > > > >
> > > > > > > The MDIO ACPI binding has been established and merged to the
> > > > > > > Linux tree,
> > > > > >
> > > > > > Congratulations! :)
> > > > > >
> > > > > > Is FreeBSD expected to follow suit?
> > > > >
> > > > > There's no driver yet, but once it's finally created I will make sure
> > > > > it supports ACPI properly.
> > > > >
> > > > > >
> > > > > > > hence it is now possible to update the ACPI
> > > > > > > description of the platforms that base on the Marvell SoCs.
> > > > > > >
> > > > > > > For convenience, the code is exposed in the public github branch:
> > > > > > > https://github.com/semihalf-wojtas-marcin/edk2-platforms/commits/acpi-mdio-r20210613
> > > > > > > There is also MacchiatoBin firmware binary avaialable for testing:
> > > > > > > https://drive.google.com/file/d/1eigP_aeM4wYQpEaLAlQzs3IN_w1-kQr0
> > > > > > >
> > > > > > > I'm looking forward to the comments or remarks.
> > > > > >
> > > > > > The patches themselves look straightforward enough.
> > > > > > I *would* prefer some tested-by, for these sources rather than the
> > > > > > binary, before merging though.
> > > > > >
> > > > >
> > > > > I have some our patches queued, that are blocked by this patchset. In
> > > > > case no time is found for external testers - if this may help to get
> > > > > it pushed through, please see below logs from the next-20210628 tag
> > > > > and unchanged firmware. All network ports of MacchiatoBin and
> > > > > CN913x-DB work properly, with full 1G/10G PHY support via X/MDIO
> > > > > interfaces:
> > > > >
> > > > > MacchiatoBin
> > > > > # uname -a
> > > > > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > > > > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > > > > # dmesg | grep MRVL0101
> > > > > [ 1.829659] mv88x3340 MRVL0101:00-mii:00: Firmware version 0.3.3.0
> > > > > [ 1.839622] mv88x3340 MRVL0101:00-mii:08: Firmware version 0.3.3.0
> > > > > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > > > > [mv88x3340] (irq=POLL)
> > > > > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > > > > [mv88x3340] (irq=POLL)
> > > > > # dmesg | grep MRVL0100
> > > > > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > > > > [Marvell 88E1510] (irq=POLL)
> > > > > # dmesg | grep mvpp2
> > > > > [...]
> > > > > [ 2.748351] mvpp2 MRVL0110:00 eth1: PHY [MRVL0101:00-mii:00] driver
> > > > > [mv88x3340] (irq=POLL)
> > > > > [ 2.756701] mvpp2 MRVL0110:00 eth1: configuring for phy/10gbase-r link mode
> > > > > [ 2.767479] mvpp2 MRVL0110:01 eth2: PHY [MRVL0101:00-mii:08] driver
> > > > > [mv88x3340] (irq=POLL)
> > > > > [ 2.775834] mvpp2 MRVL0110:01 eth2: configuring for phy/10gbase-r link mode
> > > > > [ 2.919424] mvpp2 MRVL0110:01 eth3: PHY [MRVL0100:00-mii:00] driver
> > > > > [Marvell 88E1510] (irq=POLL)
> > > > > [ 2.928285] mvpp2 MRVL0110:01 eth3: configuring for phy/sgmii link mode
> > > > > [ 2.936351] mvpp2 MRVL0110:01 eth4: configuring for
> > > > > inband/2500base-x link mode
> > > > > [ 5.987259] mvpp2 MRVL0110:01 eth3: Link is Up - 1Gbps/Full - flow
> > > > > control off
> > > > > #
> > > > >
> > > > > CN913x-DB
> > > > > # uname -a
> > > > > Linux buildroot 5.13.0-rc7-next-20210628 #6 SMP PREEMPT Tue Jun 29
> > > > > 09:14:07 CEST 2021 aarch64 GNU/Linux
> > > > > # dmesg | grep MRVL0100
> > > > > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > > > > [Marvell 88E1510] (irq=POLL)
> > > > > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > > > > [Marvell 88E1510] (irq=POLL)
> > > > > # dmesg | grep mvpp2
> > > > > [...]
> > > > > [ 2.544917] mvpp2 MRVL0110:00 eth1: configuring for
> > > > > inband/10gbase-r link mode
> > > > > [ 2.552480] mvpp2 MRVL0110:00 eth1: Link is Up - 10Gbps/Full - flow
> > > > > control rx
> > > > > [ 2.621201] mvpp2 MRVL0110:00 eth2: PHY [MRVL0100:00-mii:00] driver
> > > > > [Marvell 88E1510] (irq=POLL)
> > > > > [ 2.630060] mvpp2 MRVL0110:00 eth2: configuring for phy/rgmii-id link mode
> > > > > [ 2.741199] mvpp2 MRVL0110:00 eth3: PHY [MRVL0100:00-mii:01] driver
> > > > > [Marvell 88E1510] (irq=POLL)
> > > > > [ 2.750056] mvpp2 MRVL0110:00 eth3: configuring for phy/rgmii-id link mode
> > > > > [ 2.810169] mvpp2 MRVL0110:01 eth4: configuring for
> > > > > inband/10gbase-r link mode
> > > > > [ 2.817471] mvpp2 MRVL0110:01 eth4: Link is Up - 10Gbps/Full - flow
> > > > > control rx
> > > > > [ 5.693231] mvpp2 MRVL0110:00 eth2: Link is Up - 1Gbps/Full - flow
> > > > > control off
> > > > > [ 10.840942] mvpp2 MRVL0110:00 eth1: Link is Down
> > > > > [ 10.864124] mvpp2 MRVL0110:01 eth4: Link is Down
> > > > > #
> > > > >
> > > >
> > > > Both platforms were have been additionally tested by Greg, do you have
> > > > any comments/objections to merging this patchset?
> > > >
> > > > Thanks,
> > > > Marcin
> > >
> > > You can add my Tested-by as well. Finally got time over the weekend
> > > to verify on all my Marvell platforms this effects.
> > >
> >
> > Thanks all. I will get to this shortly - apologies for the delay.
>
> Pushed as bfabeef4c9a6..955187a12a8b
>
> Thanks all.
Thanks a lot! I'd appreciate if you were able to take a look at our
new patchset I just submitted on top of the merged changes.
Best regards,
Marcin
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