From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f180.google.com (mail-pl1-f180.google.com [209.85.214.180]) by mx.groups.io with SMTP id smtpd.web12.505.1621275603377854626 for ; Mon, 17 May 2021 11:20:03 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@google.com header.s=20161025 header.b=EIu0gTfQ; spf=pass (domain: google.com, ip: 209.85.214.180, mailfrom: erdemaktas@google.com) Received: by mail-pl1-f180.google.com with SMTP id v12so3629759plo.10 for ; Mon, 17 May 2021 11:20:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=5Nt3s7UDDbSDgo8q6BfDEspv6RtliX+cPR4vIDEO9zM=; b=EIu0gTfQHgsZaNzw6MH5jLuIjKmAFdUXv6+ieu3G2urgk+AL2Sgmxza2+3aWxXCvkO ewNgEqURTx0uwQMEeNBfKNpbwnz/6OGifazjpsD756SkyKQcaEJBfYW8mS3yX9oqDoe3 hATsY4Zr+PnPwLlzqmsOyxurYVswHliCdx9/+R4nYaQ3PEOBL9Rm/0aJkrQirGWKcmcp 1ATo/estq8O4DSY0dxlZfPVi7Nzj5diTURSV2NlXnMcjDtOgsrxBfAjaQ8er714GU9J2 4ZVF9ARIOuqKboFy8Hzdk50k89K5jI4I2E+ovtVxJbAXy1SPK6p28UG/lrpuQW2DI2R1 75XQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=5Nt3s7UDDbSDgo8q6BfDEspv6RtliX+cPR4vIDEO9zM=; b=mRx1qtlKgG2aPFUTJ21ZWvkyo1TGssRUl8BaSx3NjsWE+WPEKcm6MiP4etWGRXfiLy 5q50T4GU3WZNg3U9bWkJYxB6e1xsRPtq5Q7yDj3NBB0tBC2V1a8oSPqoROq3HnNhyRkI YEQIK9xBVridwo0ZZ90+kE+T3ytZHfFmjjE6UWdYRqNHfSXjlmFNREyEwbp5R7iZHg2J lu4VqRX66GN58INHC1XZXJNJIqVvk0o7rOaXKcUv0W2ys3FfCPVwkI+HnC7lfG96z0ZH 3GEKy+2r1sgwYBCPrDcr0bBFac8QkJ08TSw6PJXZYom4g9BaryzQ11CWp+53ij9RYVWS O2ZQ== X-Gm-Message-State: AOAM533IU4HFtG0gxLvofjRtTTsqWhEdVFJ3xZXC5LitCXoYYNRjlZ9w sQnGicHt+43HMS8dtmmaDkvpTonaiUz6INgaaFkAMQ== X-Google-Smtp-Source: ABdhPJwHjUbqSG5RsQNdUsVFVUt7Pg++6UTZdkxSsG/Tk2u81O2LcHlWj4sxWeTFq6SIzLLP3ZXHlsL7hXTt0W+o1PA= X-Received: by 2002:a17:90a:8c81:: with SMTP id b1mr420842pjo.73.1621275602796; Mon, 17 May 2021 11:20:02 -0700 (PDT) MIME-Version: 1.0 References: <20210512234615.1726-1-brijesh.singh@amd.com> <20210512234615.1726-4-brijesh.singh@amd.com> In-Reply-To: <20210512234615.1726-4-brijesh.singh@amd.com> From: "Erdem Aktas" Date: Mon, 17 May 2021 11:19:51 -0700 Message-ID: Subject: Re: [PATCH v2 03/13] MdePkg/Register/Amd: define GHCB macros for hypervisor feature detection To: Brijesh Singh Cc: devel@edk2.groups.io, James Bottomley , Min Xu , Jiewen Yao , Tom Lendacky , Jordan Justen , Ard Biesheuvel , Laszlo Ersek , Michael D Kinney , Liming Gao , Zhiguang Liu Content-Type: text/plain; charset="UTF-8" I verified that the values align with the GHCB spec publication: #56421 Revision: 2.00 Reviewed-by: Erdem Aktas -Erdem On Wed, May 12, 2021 at 4:46 PM Brijesh Singh wrote: > > BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3275 > > Version 2 of GHCB introduces advertisement of features that are supported > by the hypervisor. See the GHCB spec section 2.2 for an additional details. > > Cc: James Bottomley > Cc: Min Xu > Cc: Jiewen Yao > Cc: Tom Lendacky > Cc: Jordan Justen > Cc: Ard Biesheuvel > Cc: Laszlo Ersek > Cc: Erdem Aktas > Cc: Michael D Kinney > Cc: Liming Gao > Cc: Zhiguang Liu > Reviewed-by: Laszlo Ersek > Reviewed-by: Liming Gao > Signed-off-by: Brijesh Singh > --- > MdePkg/Include/Register/Amd/Fam17Msr.h | 7 +++++++ > MdePkg/Include/Register/Amd/Ghcb.h | 8 ++++++++ > 2 files changed, 15 insertions(+) > > diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Register/Amd/Fam17Msr.h > index 7368ce7af02a..cdb8f588ccf8 100644 > --- a/MdePkg/Include/Register/Amd/Fam17Msr.h > +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h > @@ -48,6 +48,11 @@ typedef union { > UINT32 Reserved2:32; > } GhcbTerminate; > > + struct { > + UINT64 Function:12; > + UINT64 Features:52; > + } GhcbHypervisorFeatures; > + > VOID *Ghcb; > > UINT64 GhcbPhysicalAddress; > @@ -57,6 +62,8 @@ typedef union { > #define GHCB_INFO_SEV_INFO_GET 2 > #define GHCB_INFO_CPUID_REQUEST 4 > #define GHCB_INFO_CPUID_RESPONSE 5 > +#define GHCB_HYPERVISOR_FEATURES_REQUEST 128 > +#define GHCB_HYPERVISOR_FEATURES_RESPONSE 129 > #define GHCB_INFO_TERMINATE_REQUEST 256 > > #define GHCB_TERMINATE_GHCB 0 > diff --git a/MdePkg/Include/Register/Amd/Ghcb.h b/MdePkg/Include/Register/Amd/Ghcb.h > index 712dc8e769c0..ec232ebd3807 100644 > --- a/MdePkg/Include/Register/Amd/Ghcb.h > +++ b/MdePkg/Include/Register/Amd/Ghcb.h > @@ -54,6 +54,7 @@ > #define SVM_EXIT_NMI_COMPLETE 0x80000003ULL > #define SVM_EXIT_AP_RESET_HOLD 0x80000004ULL > #define SVM_EXIT_AP_JUMP_TABLE 0x80000005ULL > +#define SVM_EXIT_HYPERVISOR_FEATURES 0x8000FFFDULL > #define SVM_EXIT_UNSUPPORTED 0x8000FFFFULL > > // > @@ -154,4 +155,11 @@ typedef union { > #define GHCB_EVENT_INJECTION_TYPE_EXCEPTION 3 > #define GHCB_EVENT_INJECTION_TYPE_SOFT_INT 4 > > +// > +// Hypervisor features > +// > +#define GHCB_HV_FEATURES_SNP BIT0 > +#define GHCB_HV_FEATURES_SNP_AP_CREATE (GHCB_HV_FEATURES_SNP | BIT1) > +#define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION (GHCB_HV_FEATURES_SNP_AP_CREATE | BIT2) > +#define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION_TIMER (GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION | BIT3) > #endif > -- > 2.17.1 >