From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f179.google.com (mail-oi1-f179.google.com [209.85.167.179]) by mx.groups.io with SMTP id smtpd.web11.9761.1604918840796619715 for ; Mon, 09 Nov 2020 02:47:21 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@9elements.com header.s=google header.b=TXpGCUu5; spf=pass (domain: 9elements.com, ip: 209.85.167.179, mailfrom: marcello.bauer@9elements.com) Received: by mail-oi1-f179.google.com with SMTP id j7so9723794oie.12 for ; Mon, 09 Nov 2020 02:47:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=KOC/5BTH7HB3v1ClFDSMC0YwxABDpBaj/DV5MJxLj+c=; b=TXpGCUu5n1DPxv3ny3MnuBsFpV1+ndDLScKy7B+MuYYCqQ00d1grw9kZYCbv+btHIE wQoxPBWDr6JF7o05Hu/k3ps3EKl/8GmciwRg0Xz5PJMb9AYhkfZgQ7FW2uPyj8GFicAg eMgnkhsVTfaVFx2+TO1mu9tTG8TSoiPaAuN/9LF5ylh8fjpuOmbbS3gjOEelh9PoCBZB dKKsBvDovVdGKvX3EqhjTA4XqanqwbU/ytK7gAV4gq/snuxfPRRe8mUsfiRhx62F7JCw 3xiBawUy1CiB69U6fooe1qj793yEHNrcxzhdhOB7EpamJz2md/Kt+OLsKCTqp3GeG3Kv qP1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=KOC/5BTH7HB3v1ClFDSMC0YwxABDpBaj/DV5MJxLj+c=; b=eavWip5V5c5E/MNd19Q24k/gZI6dZxMWgGNHlcg2AK8z8G6SWsba6wGxNtCuixxHe8 UMZ+ZtDQ4v9cs/IYDTeJiMsfVDDBshEFWKFHaM3KLY9o82gpyOyUxFrHFgCZAxXkviyr 5CvACsH0KjczedSiBavTuS01e2w9cRcaPZZakfmTlkgv6Rr35hzI4BNMXEKASGneiy0V 1mMTRWMG96Ofi+u+q61bqQFYql1hRraPi6SPu958khsDHQW0IISobhfPiMrVrwmv6p0O zV8+gWumIsm6hgN+1cr6L1PtXpI/yxC6/s1pdfBbcPjcSPTu7Xhq/1ngE+hgffw7I69z 7zyg== X-Gm-Message-State: AOAM532+ACijvTaOR4i1o8/oK1pLNXz28RVaezprsoLFyH1enVS7cyo0 19zjeD0P48WaQ5ba9vtmeqmLGkTJO6UUZloCBvAH8g== X-Google-Smtp-Source: ABdhPJyPe42cBiDrF9agk0g8DIxA+N1Ge4joKmNHZfb3uvaaJU1z6Az+M4UBGmJI+ZCa0hs/MSboi19rnW6W2hoH1ws= X-Received: by 2002:aca:30d2:: with SMTP id w201mr8189753oiw.8.1604918840059; Mon, 09 Nov 2020 02:47:20 -0800 (PST) MIME-Version: 1.0 References: <20201013133338.27507-1-marcello.bauer@9elements.com> <16407F3C2F4AEB24.28553@groups.io> In-Reply-To: From: "Marcello Sylvester Bauer" Date: Mon, 9 Nov 2020 11:47:09 +0100 Message-ID: Subject: Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on Ia32 To: "Dong, Guo" Cc: "devel@edk2.groups.io" , "Ma, Maurice" , "patrick.rudolph@9elements.com" , "You, Benjamin" Content-Type: multipart/alternative; boundary="0000000000005afbf505b3aa4937" --0000000000005afbf505b3aa4937 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Guo, Sounds good to remove the IA32 target and stick to a single DSC file. However, Is there an advantage to remove the PEI phase? It breaks many of our upcoming patches, which currently rely on the PEI phase (e.g. SecureBoot support). In addition to the failed PatchCheck, it does not build on Linux gcc: https://github.com/9elements/edk2/runs/1373473040 thanks, Marcello On Sat, Oct 24, 2020 at 12:36 AM Dong, Guo wrote: > > > Hi Marcello, > > > > It looks there is issue for the CI tool to complete all the checks. So I > just closed this PR. > > > > And I just created another PR https://github.com/tianocore/edk2/pull/104= 6 > to remove PEI phase from UEFI payload. > > If the new patch is approved, we don=E2=80=99t need this patch to update= DSC file. > > In the new patch, UEFI payload would use a single DSC file to support X6= 4, > IA32X64 and possibly IA32 build. > > Please have a look at that PR and let me know if you have any comments. > > > > Thanks, > > Guo > > > > *From:* devel@edk2.groups.io * On Behalf Of *Guo > Dong > *Sent:* Thursday, October 22, 2020 7:49 PM > *To:* Marcello Sylvester Bauer ; Ma, > Maurice > *Cc:* devel@edk2.groups.io; patrick.rudolph@9elements.com; You, Benjamin= < > benjamin.you@intel.com> > *Subject:* Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set default > PciBaseSize on Ia32 > > > > > > Hi Marcello, > > > > Sorry for late response. I created a pull request > https://github.com/tianocore/edk2/pull/1044 to merge this patch 2 hours > ago. > > Hopefully it could be merged soon after all the checks. > > > > Thanks, > > Guo > > > > *From:* Marcello Sylvester Bauer > *Sent:* Thursday, October 22, 2020 1:25 AM > *To:* Ma, Maurice > *Cc:* devel@edk2.groups.io; patrick.rudolph@9elements.com; Dong, Guo < > guo.dong@intel.com>; You, Benjamin > *Subject:* Re: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on > Ia32 > > > > Hi, > > As already mentioned, this patch fixes the current master build for the > UefiPayloadPkgIa32 platform. > Is it possible to merge this change soon? > > > > Sorry for the circumstances. > > > thanks, > Marcello > > On Tue, Oct 13, 2020 at 9:02 PM Ma, Maurice wrote= : > > Reviewed-by: > Maurice Ma > > > -----Original Message----- > > From: Marcello Sylvester Bauer > > Sent: Tuesday, October 13, 2020 6:34 > > To: devel@edk2.groups.io > > Cc: Marcello Sylvester Bauer ; > > patrick.rudolph@9elements.com; Ma, Maurice ; Don= g, > > Guo ; You, Benjamin > > Subject: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on Ia3= 2 > > > > This commit fix UefiPayloadPkgIa32 build in master. > > > > In commit 8028b2907e20b21cd7d69639a36ac82a77c81dc1 I did forget to set > > the default value for PcdPciExpressBaseSize on Ia32 Targets. This patc= h > does > > insert it afterwards. It would be great if it could be merged asap. > > > > PS: I added the Ia32 target to our CI to avoid this issue in future. > Sorry for the > > misfortune. > > > > v2: > > * Remove no longer required build-time PcdPciExpressBaseAddress > > > > Branch: https://github.com/9elements/edk2/tree/fix/UefiPayloadPkgIa32_= V2 > > PR: https://github.com/tianocore/edk2/pull/1008 > > > > Marcello Sylvester Bauer (1): > > UefiPayloadPkg: Set default PciBaseSize on Ia32 > > > > UefiPayloadPkg/UefiPayloadPkgIa32.dsc | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > -- > > 2.28.0 > > > > > -- > > *[Marcello Sylvester Bauer]* > > > > 9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 44787 Bochum, Germany > > Email: [DEINE EMAIL ADDRESSE] > > > Phone: *+49 234 68 94 188 <+492346894188>* > > Mobile: *+49 1722847618 <+491722847618>* > > > > Sitz der Gesellschaft: Bochum > > Handelsregister: Amtsgericht Bochum, HRB 17519 > > Gesch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar > > > Datenschutzhinweise nach Art. 13 DSGVO > >=20 > --=20 *[Marcello Sylvester Bauer]* 9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 44787 Bochum, Germany Email: [DEINE EMAIL ADDRESSE] Phone: *+49 234 68 94 188 <+492346894188>* Mobile: *+49 1722847618 <+491722847618>* Sitz der Gesellschaft: Bochum Handelsregister: Amtsgericht Bochum, HRB 17519 Gesch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar Datenschutzhinweise nach Art. 13 DSGVO --0000000000005afbf505b3aa4937 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi=C2=A0Guo,

Sounds good to remove the = IA32 target and stick to a single DSC file. However, Is there an advantage = to remove=C2=A0the PEI phase? It breaks many of our upcoming patches, which= currently rely on the PEI phase (e.g. SecureBoot support).

In addit= ion to the failed PatchCheck, it does not build on Linux gcc: https://= github.com/9elements/edk2/runs/1373473040

thanks,
Marcello

On Sat, Oct 24, 2020 at 12:36 AM Dong, Guo <guo.dong@intel.com> wrote:

=C2=A0

Hi Marcello,

=C2=A0

It looks there is issue for the CI tool to co= mplete all the checks. So I just closed this PR.

=C2=A0

And I just created another PR = https://github.com/tianocore/edk2/pull/1046 to remove PEI phase from UE= FI payload.

If the new patch is approved, we don=E2=80=99= t need this patch to update DSC file.

In the new patch, UEFI payload would use a si= ngle DSC file to support X64, IA32X64 and possibly IA32 build.

Please have a look at that PR and let me know= if you have any comments.

=C2=A0

Thanks,

Guo

=C2=A0

From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Guo Dong
Sent: Thursday, October 22, 2020 7:49 PM
To: Marcello Sylvester Bauer <marcello.bauer@9elements.com>; Ma, M= aurice <mauric= e.ma@intel.com>
Cc: devel= @edk2.groups.io; patrick.rudolph@9elements.com; You, Benjamin <benjamin.you@intel.co= m>
Subject: Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set defaul= t PciBaseSize on Ia32

=C2=A0

=C2=A0

Hi Marcello,

=C2=A0

Sorry for late response. I created a pull req= uest = https://github.com/tianocore/edk2/pull/1044 to merge this patch 2 hours= ago.

Hopefully it could be merged soon after all t= he checks.

=C2=A0

Thanks,

Guo

=C2=A0

From: Marcello Sylvester Bauer <marcello.bauer@= 9elements.com>
Sent: Thursday, October 22, 2020 1:25 AM
To: Ma, Maurice <maurice.ma@intel.com>
Cc: devel= @edk2.groups.io; patrick.rudolph@9elements.com; Dong, Guo <guo.dong@intel.com>; You, Benjamin &l= t;benjamin.you@= intel.com>
Subject: Re: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize= on Ia32

=C2=A0

Hi,

As already mentioned, this patch fixes the current master build for the Ue= fiPayloadPkgIa32 platform.
Is it possible to merge this change soon?

=C2=A0

Sorry for the circumstances.


thanks,
Marcello

On Tue, Oct 13, 2020 at 9:02 PM Ma, Maurice <maurice.ma@intel.com= > wrote:

Reviewed-by:
Maurice Ma <m= aurice.ma@intel.com>

> -----Original Message-----
> From: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
> Sent: Tuesday, October 13, 2020 6:34
> To: devel@e= dk2.groups.io
> Cc: Marcello Sylvester Bauer <marcello.bauer@9elements.com>;
> pa= trick.rudolph@9elements.com; Ma, Maurice <maurice.ma@intel.com>; Dong,
> Guo <guo.d= ong@intel.com>; You, Benjamin <benjamin.you@intel.com>
> Subject: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on Ia= 32
>
> This commit fix UefiPayloadPkgIa32 build in master.
>
> In commit 8028b2907e20b21cd7d69639a36ac82a77c81dc1 I did forget to se= t
> the default value for PcdPciExpressBaseSize on Ia32 Targets. This pat= ch does
> insert it afterwards. It would be great if it could be merged asap. >
> PS: I added the Ia32 target to our CI to avoid this issue in future. = Sorry for the
> misfortune.
>
> v2:
>=C2=A0 =C2=A0* Remove no longer required build-time PcdPciExpressBaseA= ddress
>
> Branch: https://github.com/9elements/edk2/tree/fix/UefiPayloadPkgIa32_V2
> PR:=C2=A0 =C2=A0 =C2=A0https://github.com/tianocore/edk2/pull/1008=
>
> Marcello Sylvester Bauer (1):
>=C2=A0 =C2=A0UefiPayloadPkg: Set default PciBaseSize on Ia32
>
>=C2=A0 UefiPayloadPkg/UefiPayloadPkgIa32.dsc | 3 +--
>=C2=A0 1 file changed, 1 insertion(+), 2 deletions(-)
>
> --
> 2.28.0


=C2=A0

--

[Marcello Sylvester Bauer]=C2= =A0

=C2=A0

9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 4= 4787 Bochum, Germany

Email:=C2=A0=C2=A0[DEINE EMAIL ADDRESSE]

Phone:=C2=A0=C2=A0+49 234 68 94 188

Mobile:=C2=A0=C2=A0+49 1722847618

=C2=A0

Sitz der = Gesellschaft: Bochum

Handelsre= gister: Amtsgericht Bochum, HRB 17519

Gesch=C3= =A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar=



--
[Marcello Sylvester Bauer]= =C2=A0



9elements Agency GmbH, Kortumstra=C3=9Fe 19-= 21, 44787 Bochum, Germany
Email:=C2=A0=C2=A0[DEINE EM= AIL ADDRESSE]
Phone:=C2=A0<= /font>=C2=A0+49= 234 68 94 188
Mobile:=C2=A0=C2= =A0+49 1722847618=

=
Sitz der Gesellschaft: Bochum
Handelsregister: Amtsgericht= Bochum, HRB 17519
Gesc= h=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar
=
--0000000000005afbf505b3aa4937--