From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f173.google.com (mail-oi1-f173.google.com [209.85.167.173]) by mx.groups.io with SMTP id smtpd.web11.27458.1605014640370808071 for ; Tue, 10 Nov 2020 05:24:00 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@9elements.com header.s=google header.b=REs0MbT6; spf=pass (domain: 9elements.com, ip: 209.85.167.173, mailfrom: marcello.bauer@9elements.com) Received: by mail-oi1-f173.google.com with SMTP id t16so14253486oie.11 for ; Tue, 10 Nov 2020 05:24:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=9elements.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dP1vVtz40SdoRgEoMOUxmkNQ9g+T1YloRdDvSGcN3JY=; b=REs0MbT6gWVpRl5nyvwht3gyH42JGBDZM7Bk0ubqNlvvlHHUQCTq+kGAiGovvWesLe sjCeQjON8z2sy41L5wvknU9Deo19VO8562bUNdCCT8kqop9iRcuTNNUlnHGgUSjpLf3j 1s6tyiPQL8qs8d51TcyR7kcPU2NwOiVv+QFb5CFuBXLXaRfNKWIcmvMfC7xTdHN1XBt3 EKIKpgitkcuAlhEz/bthEFrzLAH7ONYxJc9cQhwj7UgzVy8DsPtABdcyIJ5xIxSpl5zb J44yzDlxsKt8Mhpy8y2sx7pj91qv5cPZRHZdab1UOiy9p48wQCERrV86teIYaKSmQNI/ g+Zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dP1vVtz40SdoRgEoMOUxmkNQ9g+T1YloRdDvSGcN3JY=; b=lApT4y6kUMuDxGFrrzrKaTAbh0yj0ZzxcoiJetsFy2z0Qw3dAfs07OVGzLK23Evn1O 46OG0uYYBUJqX0PsClxUUSy1wy00AiL9B98v86gY9E3pvikoLXGAOMFGrbbLVQ6iNoXs 2NdAiSi38P8SBQdwUaAP1ZBz8BR4MfHH6kOAFcYXuiIhIhfxe7LU+W77qqkvXY29Kz47 +qG1IQTSYCOTMkYqwoXGv07wocSScGZnA5VteHqvYqfMm9pmTAUXtm4KEIAH2bpuDzRH Y2RfD65K2xv0fmEX2wcbmMKetxyo4O4F9w20strpTggMefPpf/dLFGPtyjz8UwtM6DHQ qojQ== X-Gm-Message-State: AOAM5316zHYJmlSN6ADbNN/j0RyQtm6aq4/UhgoDfi3SoDeuhFl+mx62 nTnxC4e5QynjdGsgi5N61ZY08Dm9KpSQNjRgY4Ooyg== X-Google-Smtp-Source: ABdhPJxO6LsWHZ9WGiRzuSTBrLFPkEc+6pb+czcuU/hJnkDYzCRvsCDIYexIzuJHtdr9CQYz7Ddb9OTj0wVOT/3kaE0= X-Received: by 2002:aca:5f43:: with SMTP id t64mr2660014oib.154.1605014639626; Tue, 10 Nov 2020 05:23:59 -0800 (PST) MIME-Version: 1.0 References: <20201013133338.27507-1-marcello.bauer@9elements.com> <16407F3C2F4AEB24.28553@groups.io> In-Reply-To: From: "Marcello Sylvester Bauer" Date: Tue, 10 Nov 2020 14:23:48 +0100 Message-ID: Subject: Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on Ia32 To: "Dong, Guo" Cc: "devel@edk2.groups.io" , "Ma, Maurice" , "patrick.rudolph@9elements.com" , "You, Benjamin" Content-Type: multipart/alternative; boundary="0000000000007463c705b3c09747" --0000000000007463c705b3c09747 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Guo, > Removing the PEI phase could simplify the UEFI payload, the PEI FV will be replaced by a single UefiPayloadEntry module which only does minimal work and passes control to DXE core. So we don=E2=80=99t need have a PEI c= ore and other PEI modules in UEFI payload. It would reduce payload size and improv= e the boot performance. Okay, this makes very much sense. Is there an approximate estimate of when it will be finished? It would be great if we could still merge this patch anyway somehow. > I don=E2=80=99t know how your upcoming patches and your secureboot works= in UEFI payload PEI. I could take a look and give comments if you have the change list. It is still WIP but could be adapted: https://github.com/9elements/edk2/tree/feature/secureboot Thanks, Marcello On Tue, Nov 10, 2020 at 5:14 AM Dong, Guo wrote: > > > Hi Marcello, > > > > Removing the PEI phase could simplify the UEFI payload, the PEI FV will = be > replaced by a single UefiPayloadEntry module which only does minimal wor= k > and passes control to DXE core. So we don=E2=80=99t need have a PEI core= and other > PEI modules in UEFI payload. It would reduce payload size and improve th= e > boot performance. > > > > I don=E2=80=99t know how your upcoming patches and your secureboot works= in UEFI > payload PEI. I could take a look and give comments if you have the chang= e > list. > > > > Thank you to point out the failure. I will update the patch and create a > PR. > > > > Thanks, > > Guo > > > > *From:* Marcello Sylvester Bauer > *Sent:* Monday, November 9, 2020 3:47 AM > *To:* Dong, Guo > *Cc:* devel@edk2.groups.io; Ma, Maurice ; > patrick.rudolph@9elements.com; You, Benjamin > *Subject:* Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set default > PciBaseSize on Ia32 > > > > Hi Guo, > > > > Sounds good to remove the IA32 target and stick to a single DSC file. > However, Is there an advantage to remove the PEI phase? It breaks many o= f > our upcoming patches, which currently rely on the PEI phase (e.g. > SecureBoot support). > > In addition to the failed PatchCheck, it does not build on Linux gcc: > https://github.com/9elements/edk2/runs/1373473040 > > thanks, > Marcello > > > > On Sat, Oct 24, 2020 at 12:36 AM Dong, Guo wrote: > > > > Hi Marcello, > > > > It looks there is issue for the CI tool to complete all the checks. So I > just closed this PR. > > > > And I just created another PR https://github.com/tianocore/edk2/pull/104= 6 > to remove PEI phase from UEFI payload. > > If the new patch is approved, we don=E2=80=99t need this patch to update= DSC file. > > In the new patch, UEFI payload would use a single DSC file to support X6= 4, > IA32X64 and possibly IA32 build. > > Please have a look at that PR and let me know if you have any comments. > > > > Thanks, > > Guo > > > > *From:* devel@edk2.groups.io *On Behalf Of *Guo > Dong > *Sent:* Thursday, October 22, 2020 7:49 PM > *To:* Marcello Sylvester Bauer ; Ma, > Maurice > *Cc:* devel@edk2.groups.io; patrick.rudolph@9elements.com; You, Benjamin= < > benjamin.you@intel.com> > *Subject:* Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set default > PciBaseSize on Ia32 > > > > > > Hi Marcello, > > > > Sorry for late response. I created a pull request > https://github.com/tianocore/edk2/pull/1044 to merge this patch 2 hours > ago. > > Hopefully it could be merged soon after all the checks. > > > > Thanks, > > Guo > > > > *From:* Marcello Sylvester Bauer > *Sent:* Thursday, October 22, 2020 1:25 AM > *To:* Ma, Maurice > *Cc:* devel@edk2.groups.io; patrick.rudolph@9elements.com; Dong, Guo < > guo.dong@intel.com>; You, Benjamin > *Subject:* Re: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on > Ia32 > > > > Hi, > > As already mentioned, this patch fixes the current master build for the > UefiPayloadPkgIa32 platform. > Is it possible to merge this change soon? > > > > Sorry for the circumstances. > > > thanks, > Marcello > > On Tue, Oct 13, 2020 at 9:02 PM Ma, Maurice wrote= : > > Reviewed-by: > Maurice Ma > > > -----Original Message----- > > From: Marcello Sylvester Bauer > > Sent: Tuesday, October 13, 2020 6:34 > > To: devel@edk2.groups.io > > Cc: Marcello Sylvester Bauer ; > > patrick.rudolph@9elements.com; Ma, Maurice ; Don= g, > > Guo ; You, Benjamin > > Subject: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on Ia3= 2 > > > > This commit fix UefiPayloadPkgIa32 build in master. > > > > In commit 8028b2907e20b21cd7d69639a36ac82a77c81dc1 I did forget to set > > the default value for PcdPciExpressBaseSize on Ia32 Targets. This patc= h > does > > insert it afterwards. It would be great if it could be merged asap. > > > > PS: I added the Ia32 target to our CI to avoid this issue in future. > Sorry for the > > misfortune. > > > > v2: > > * Remove no longer required build-time PcdPciExpressBaseAddress > > > > Branch: https://github.com/9elements/edk2/tree/fix/UefiPayloadPkgIa32_= V2 > > PR: https://github.com/tianocore/edk2/pull/1008 > > > > Marcello Sylvester Bauer (1): > > UefiPayloadPkg: Set default PciBaseSize on Ia32 > > > > UefiPayloadPkg/UefiPayloadPkgIa32.dsc | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > > > -- > > 2.28.0 > > > > > -- > > *[Marcello Sylvester Bauer]* > > > > 9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 44787 Bochum, Germany > > Email: [DEINE EMAIL ADDRESSE] > > > Phone: *+49 234 68 94 188 <+492346894188>* > > Mobile: *+49 1722847618 <+491722847618>* > > > > Sitz der Gesellschaft: Bochum > > Handelsregister: Amtsgericht Bochum, HRB 17519 > > Gesch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar > > > Datenschutzhinweise nach Art. 13 DSGVO > >=20 > > > > > -- > > *[Marcello Sylvester Bauer]* > > > > 9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 44787 Bochum, Germany > > Email: [DEINE EMAIL ADDRESSE] > > > Phone: *+49 234 68 94 188 <+492346894188>* > > Mobile: *+49 1722847618 <+491722847618>* > > > > Sitz der Gesellschaft: Bochum > > Handelsregister: Amtsgericht Bochum, HRB 17519 > > Gesch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar > > > Datenschutzhinweise nach Art. 13 DSGVO > --=20 *[Marcello Sylvester Bauer]* 9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 44787 Bochum, Germany Email: [DEINE EMAIL ADDRESSE] Phone: *+49 234 68 94 188 <+492346894188>* Mobile: *+49 1722847618 <+491722847618>* Sitz der Gesellschaft: Bochum Handelsregister: Amtsgericht Bochum, HRB 17519 Gesch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar Datenschutzhinweise nach Art. 13 DSGVO --0000000000007463c705b3c09747 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Guo,

> Removing the PEI phase cou= ld simplify the UEFI payload, the PEI FV will be replaced by a single UefiP= ayloadEntry module which only does minimal work and passes control to DXE c= ore. So we don=E2=80=99t need have a PEI core and other PEI modules in UEFI= payload. It would reduce payload size and improve the boot performance.

Okay, this makes very much sense. Is there an approx= imate estimate of when it will be finished? It would be great if we could s= till merge this patch anyway somehow.=C2=A0

> I= don=E2=80=99t know how your upcoming patches and your secureboot works in = UEFI payload PEI. I could take a look and give comments if you have the cha= nge list.

It is still WIP but could be adapted: https://github.com/9eleme= nts/edk2/tree/feature/secureboot

Thanks,
Marcello


=


On Tue, Nov 10, 2020 at 5:14 AM Dong, Guo <guo.dong@intel.com> wrot= e:

=C2=A0

Hi Marcello,

=C2=A0

Removing the PEI phase could simplify the UEF= I payload, the PEI FV will be replaced by a single UefiPayloadEntry module = which only does minimal work and passes control to DXE core. So we don=E2= =80=99t need have a PEI core and other PEI modules in UEFI payload. It would reduce pa= yload size and improve the boot performance.

=C2=A0

I don=E2=80=99t know how your upcoming patche= s and your secureboot works in UEFI payload PEI. I could take a look and gi= ve comments if you have the change list.

=C2=A0

Thank you to point out the failure. I will up= date the patch and create a PR.

=C2=A0

Thanks,

Guo

=C2=A0

From: Marcello Sylvester Bauer <marcello.bauer@= 9elements.com>
Sent: Monday, November 9, 2020 3:47 AM
To: Dong, Guo <guo.dong@intel.com>
Cc: devel= @edk2.groups.io; Ma, Maurice <maurice.ma@intel.com>; patrick.rudolph@9elements.com= ; You, Benjamin <benjamin.you@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set defaul= t PciBaseSize on Ia32

=C2=A0

Hi=C2=A0Guo,

=C2=A0

Sounds good to remove = the IA32 target and stick to a single DSC file. However, Is there an advant= age to remove=C2=A0the PEI phase? It breaks many of our upcoming patches, w= hich currently rely on the PEI phase (e.g. SecureBoot support).

In addition to the failed PatchCheck, it does not build on Linux gcc: https://github.com/9elements/edk2/runs/1373473040

thanks,
Marcello

=C2=A0

On Sat, Oct 24, 2020 at 12:36 AM Dong, Guo <guo.dong@intel.com&= gt; wrote:

=C2=A0

Hi Marcello,

=C2=A0

It looks there is issue for the CI tool to complete= all the checks. So I just closed this PR.

=C2=A0

And I just created another PR = https://github.com/tianocore/edk2/pull/1046 to remove PEI phase from UE= FI payload.

If the new patch is approved, we don=E2=80=99t need= this patch to update DSC file.

In the new patch, UEFI payload would use a single D= SC file to support X64, IA32X64 and possibly IA32 build.

Please have a look at that PR and let me know if yo= u have any comments.

=C2=A0

Thanks,

Guo

=C2=A0

From: devel@edk2.group= s.io <deve= l@edk2.groups.io> On Behalf Of Guo Dong
Sent: Thursday, October 22, 2020 7:49 PM
To: Marcello Sylvester Bauer <marcello.bauer@9elements.com>; Ma, M= aurice <mauric= e.ma@intel.com>
Cc: devel= @edk2.groups.io; patrick= .rudolph@9elements.com; You, Benjamin <benjamin.you@intel.com>
Subject: Re: [edk2-devel] [PATCH v2 0/1] UefiPayloadPkg: Set defaul= t PciBaseSize on Ia32

=C2=A0

=C2=A0

Hi Marcello,

=C2=A0

Sorry for late response. I created a pull request = https://github.com/tianocore/edk2/pull/1044 to merge this patch 2 hours= ago.

Hopefully it could be merged soon after all the che= cks.

=C2=A0

Thanks,

Guo

=C2=A0

From: Marcello Sylvester Bauer <marcello.bauer@= 9elements.com>
Sent: Thursday, October 22, 2020 1:25 AM
To: Ma, Maurice <maurice.ma@intel.com>
Cc: devel= @edk2.groups.io; patrick= .rudolph@9elements.com; Dong, Guo <guo.dong@intel.com>; You, Benjamin <benjamin.you@intel.co= m>
Subject: Re: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize= on Ia32

=C2=A0

Hi,

As already mentioned, this patch fixes the current master build for the Ue= fiPayloadPkgIa32 platform.
Is it possible to merge this change soon?

=C2=A0

Sorry for the circumstances.


thanks,
Marcello

On Tue, Oct 13, 2020 at 9:02 PM Ma, Maurice <maurice.ma@intel.com= > wrote:

Reviewed-by:
Maurice Ma <m= aurice.ma@intel.com>

> -----Original Message-----
> From: Marcello Sylvester Bauer <marcello.bauer@9elements.com>
> Sent: Tuesday, October 13, 2020 6:34
> To: devel@e= dk2.groups.io
> Cc: Marcello Sylvester Bauer <marcello.bauer@9elements.com>;
> pa= trick.rudolph@9elements.com; Ma, Maurice <maurice.ma@intel.com>; Dong,
> Guo <guo.d= ong@intel.com>; You, Benjamin <benjamin.you@intel.com>
> Subject: [PATCH v2 0/1] UefiPayloadPkg: Set default PciBaseSize on Ia= 32
>
> This commit fix UefiPayloadPkgIa32 build in master.
>
> In commit 8028b2907e20b21cd7d69639a36ac82a77c81dc1 I did forget to se= t
> the default value for PcdPciExpressBaseSize on Ia32 Targets. This pat= ch does
> insert it afterwards. It would be great if it could be merged asap. >
> PS: I added the Ia32 target to our CI to avoid this issue in future. = Sorry for the
> misfortune.
>
> v2:
>=C2=A0 =C2=A0* Remove no longer required build-time PcdPciExpressBaseA= ddress
>
> Branch: https://github.com/9elements/edk2/tree/fix/UefiPayloadPkgIa32_V2
> PR:=C2=A0 =C2=A0 =C2=A0https://github.com/tianocore/edk2/pull/1008=
>
> Marcello Sylvester Bauer (1):
>=C2=A0 =C2=A0UefiPayloadPkg: Set default PciBaseSize on Ia32
>
>=C2=A0 UefiPayloadPkg/UefiPayloadPkgIa32.dsc | 3 +--
>=C2=A0 1 file changed, 1 insertion(+), 2 deletions(-)
>
> --
> 2.28.0


=C2=A0

--

[Marcello Sylvester Bauer]=C2= =A0

=C2=A0

9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 4= 4787 Bochum, Germany

Email:=C2=A0=C2=A0[DEINE EMAIL ADDRESSE]

Phone:=C2=A0=C2=A0+49 234 68 94 188

Mobile:=C2=A0=C2=A0+49 1722847618

=C2=A0

Sitz der Gesellschaft: Bochum

Handelsregister: Amtsgericht Bochum, HRB 17519<= u>

Gesch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar


=C2=A0

--

[Marcello Sylvester Bauer]=C2= =A0

=C2=A0

=

9elements Agency GmbH, Kortumstra=C3=9Fe 19-21, 4= 4787 Bochum, Germany

Email:=C2=A0=C2=A0[DEINE EMAIL ADDRESSE]

Phone:=C2=A0=C2=A0+49 234 68 94 188

Mobile:=C2=A0=C2=A0+49 1722847618

=C2=A0

Sitz der = Gesellschaft: Bochum

Handelsre= gister: Amtsgericht Bochum, HRB 17519

Gesch=C3= =A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar=



--
[Marcello Sylvester Bauer]= =C2=A0



9elements Agency GmbH, Kortumstra=C3= =9Fe 19-21, 44787 Bochum, Germany
Email:=C2=A0=C2=A0= [DEINE EMAIL ADDRESSE]
Phon= e:=C2=A0=C2=A0+49 234 68 94 188
Mobile:=C2=A0=C2=A0+49 1722847= 618

Sitz der Gesellschaft: Bochum
Handelsregister: Amtsgeri= cht Bochum, HRB 17519
G= esch=C3=A4ftsf=C3=BChrung: Sebastian Deutsch, Eray Basar
--0000000000007463c705b3c09747--