Do you mind sharing a GH branch with the patch set?
A
> -----Original Message-----
> From: Tuan Phan <tphan@ventanamicro.com>
> Sent: Tuesday, February 6, 2024 7:29 PM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D <michael.d.kinney@intel.com>;
> gaoliming@byosoft.com.cn; Liu, Zhiguang <zhiguang.liu@intel.com>;
> kraxel@redhat.com; lersek@redhat.com; Kumar, Rahul R
> <rahul.r.kumar@intel.com>; Ni, Ray <ray.ni@intel.com>;
> sunilvl@ventanamicro.com; Yao, Jiewen <jiewen.yao@intel.com>; Warkentin,
> Andrei <andrei.warkentin@intel.com>; ardb+tianocore@kernel.org; Tuan Phan
> <tphan@ventanamicro.com>
> Subject: [PATCH v2 0/3] RISC-V: Support Svpbmt extension
>
> This patchset adds support for RISC-V Svpbmt extension.
>
> The GCD EFI_MEMORY_UC and EFI_MEMORY_WC attributes will be mapped to
> IO and NC mode defined in PBMT field.
>
> v2:
> - Generated patch for each package.
>
> Tuan Phan (3):
> MdePkg.dec: RISC-V: Define override bit for Svpbmt extension
> UefiCpuPkg: RISC-V: MMU: Support Svpbmt extension
> OvmfPkg/RiscVVirt: Override Svpbmt extension
>
> MdePkg/MdePkg.dec | 2 ++
> OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 2 +-
> .../Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 25 ++++++++++++++++++-
> .../BaseRiscVMmuLib/BaseRiscVMmuLib.inf | 1 +
> 4 files changed, 28 insertions(+), 2 deletions(-)
>
> --
> 2.25.1
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