From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) by mx.groups.io with SMTP id smtpd.web10.80488.1669999110958458553 for ; Fri, 02 Dec 2022 08:38:31 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@starlabs-systems.20210112.gappssmtp.com header.s=20210112 header.b=PB/GXUbZ; spf=pass (domain: starlabs.systems, ip: 209.85.214.174, mailfrom: sean@starlabs.systems) Received: by mail-pl1-f174.google.com with SMTP id c7so880404pls.4 for ; Fri, 02 Dec 2022 08:38:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=starlabs-systems.20210112.gappssmtp.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=yydcc85yzSdRziBWehZPawdv0/2bXLmqFr2awkZpprs=; b=PB/GXUbZRu4kso6PqEbVInn+DDVyiUuuwCRJBOk1LrW61EP2m9j1Xgkw8vqpkpJMzW hsOun/31GOOsfmB7u1V+dwaCE5HlK/Jc6jlOkEjsj6zj8Sm0CLBAOCmTNlAaVkkzNOcF sV2+clTWj8z8o7CPAu+Lvn0MORiatqch2clDrNkScmCmr4oxAFqlNxLUQ1Ld1/gtrr8D jlwkzqfd5ywP9YYYtpYWeucR9UbYM3dtT730NAt7GdlbMbj822YtvQwf3GY8zYb5Qc4P 7bq8h4HiMcvlu6wqXA7qq5EhFz7MP/yoQ06iMmCXgfQ0uMUyDCBTYPAs5kF1XRyT/NF3 aPMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=yydcc85yzSdRziBWehZPawdv0/2bXLmqFr2awkZpprs=; b=VDTddD/Z5THukgRmK8SfXzppCmxBU0NY9WP/cRlmgpmSFUV0EOHhC6p5J2+8GkeQOQ 9HG/C+EWrmPW27ShqnIu8lpwFbOpG4MFh0eEuzLlJ6UZ4Pb97IZuKRkv00FAcnRQOeg5 RaTXFARPI5X+Z1OXcFzkC3Li272+TeChDwfV1ziQyEG6M+bVax60uEao683+yzcoyeqj dmIwKGjBUGaIbg7bHASxx4hKXJ5YctadPIPGVCUQeuEdwkoYMKYYznwk6xfUjv5Qmwh2 BtlSyynfS4RwwSl+9D8gcvnn67OQQijFT1lH5DowAKaqYrXauopwUyXrlvwu+LndrTog kiNQ== X-Gm-Message-State: ANoB5pk01VDjaUfBBYUFzSlaj3AmHjA7qbCaEo+gxefqrIHhzqlJb8Kp 8F04l/k4iw5CFuR0we2DR5Y54WgLQRZdoqEa15ifnM9UGdYc X-Google-Smtp-Source: AA0mqf6PcGJ0r9igTqAgD12UzZzxFBPLTc4kgkcApHABVITs1eHEZEwuNoetj724tfJ2LbX3oOEvY/J1z8x94/wnhQ0= X-Received: by 2002:a17:902:cf4b:b0:186:7a1d:b6ee with SMTP id e11-20020a170902cf4b00b001867a1db6eemr59182080plg.67.1669999109454; Fri, 02 Dec 2022 08:38:29 -0800 (PST) MIME-Version: 1.0 References: <0bd92ce8c58e964edacdb85a5d7c4f600aecbaa4.1669926273.git.sean@starlabs.systems> In-Reply-To: From: "Sean Rhodes" Date: Fri, 2 Dec 2022 16:38:18 +0000 Message-ID: Subject: Re: [edk2-devel] [PATCH 1/4] MdeModulePkg/XhciDxe/XhciReg: Handle incorrect PSIV indices To: devel@edk2.groups.io, hao.a.wu@intel.com Cc: Matt DeVillier , "Ni, Ray" Content-Type: multipart/alternative; boundary="000000000000b1d00405eedaf7c3" --000000000000b1d00405eedaf7c3 Content-Type: text/plain; charset="UTF-8" Hi Hao They are now resolved Thanks Sean On Fri, 2 Dec 2022 at 06:25, Wu, Hao A wrote: > Hello, > > I saw there are several CI check failures for this 4 patches: > https://github.com/tianocore/edk2/pull/3702 > > Could you help to resolve them? Thanks. > > Best Regards, > Hao Wu > > > -----Original Message----- > > From: devel@edk2.groups.io On Behalf Of Sean > > Rhodes > > Sent: Friday, December 2, 2022 4:25 AM > > To: devel@edk2.groups.io > > Cc: Matt DeVillier ; Wu, Hao A > > ; Ni, Ray ; Rhodes, Sean > > > > Subject: [edk2-devel] [PATCH 1/4] MdeModulePkg/XhciDxe/XhciReg: Handle > > incorrect PSIV indices > > > > From: Matt DeVillier > > > > On some platforms, including Sky Lake and Kaby Lake, the PSIV (Protocol > Speed > > ID Value) indicesare shared between Protocol Speed ID DWORD' in the > > extended capabilities registers for both USB2 (Full Speed) and USB3 > (Super > > Speed). > > > > An example can be found below: > > > > XhcCheckUsbPortSpeedUsedPsic: checking for USB2 ext caps > > XhciPsivGetPsid: found 3 PSID entries > > XhciPsivGetPsid: looking for port speed 1 > > XhciPsivGetPsid: PSIV 1 PSIE 2 PLT 0 PSIM 12 > > XhciPsivGetPsid: PSIV 2 PSIE 1 PLT 0 PSIM 1500 > > XhciPsivGetPsid: PSIV 3 PSIE 2 PLT 0 PSIM 480 > > XhcCheckUsbPortSpeedUsedPsic: checking for USB3 ext caps > > XhciPsivGetPsid: found 3 PSID entries > > XhciPsivGetPsid: looking for port speed 1 > > XhciPsivGetPsid: PSIV 1 PSIE 3 PLT 0 PSIM 5 > > XhciPsivGetPsid: PSIV 2 PSIE 3 PLT 0 PSIM 10 > > XhciPsivGetPsid: PSIV 34 PSIE 2 PLT 0 PSIM 1248 > > > > The result is edk2 detecting USB2 devices as USB3 devices, which > consequently > > causes enumeration to fail. > > > > To avoid incorrect detection, check the extended capability registers > for USB2 > > before USB3. If edk2 finds a match for a USB 2 device, don't check for > USB 3. > > > > Cc: Hao A Wu > > Cc: Ray Ni > > Reviewed-by: Sean Rhodes > > Signed-off-by: Matt DeVillier > > Change-Id: I5bcf32105ce85fda95b4ba98a5e420e8f522374c > > --- > > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 36 +++++++++++++++----------- > > MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h | 1 + > > 2 files changed, 22 insertions(+), 15 deletions(-) > > > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > > index 2b4a4b2444..c992323443 100644 > > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c > > @@ -698,25 +698,11 @@ XhcCheckUsbPortSpeedUsedPsic ( > > SpField.Dword = 0; UsbSpeedIdMap = 0; - //- // Check xHCI > Supported > > Protocol Capability, find the PSIV field to match- // PortSpeed > definition when > > the Major Revision is 03h.- //- if (Xhc->Usb3SupOffset != 0xFFFFFFFF) > {- > > SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpeed);- > if > > (SpField.Dword != 0) {- //- // Found the corresponding PORTSC > value in > > PSIV field of USB3 offset.- //- UsbSpeedIdMap = > > USB_PORT_STAT_SUPER_SPEED;- }- }- // // Check xHCI Supported > Protocol > > Capability, find the PSIV field to match // PortSpeed definition when > the Major > > Revision is 02h. //- if ((UsbSpeedIdMap == 0) && (Xhc->Usb2SupOffset > != > > 0xFFFFFFFF)) {+ if (Xhc->Usb2SupOffset != 0xFFFFFFFF) { > SpField.Dword = > > XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, PortSpeed); if > (SpField.Dword != 0) > > { //@@ -733,6 +719,12 @@ XhcCheckUsbPortSpeedUsedPsic ( > > // PSIM shows as default High-speed protocol, apply to > High-speed > > mapping // UsbSpeedIdMap = > > USB_PORT_STAT_HIGH_SPEED;+ } else if (SpField.Data.Psim == > > XHC_SUPPORTED_PROTOCOL_USB2_FULL_SPEED_PSIM) {+ //+ // > > PSIM shows as default Full-speed protocol, return 0+ // to > ensure no port > > status set+ //+ return 0; } } else if > (SpField.Data.Psie == 1) > > { //@@ -750,6 +742,20 @@ XhcCheckUsbPortSpeedUsedPsic ( > > } } + //+ // Check xHCI Supported Protocol Capability, find the > PSIV field to > > match+ // PortSpeed definition when the Major Revision is 03h.+ //+ if > > ((UsbSpeedIdMap == 0) && (Xhc->Usb3SupOffset != 0xFFFFFFFF)) {+ > > SpField.Dword = XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpeed);+ > if > > (SpField.Dword != 0) {+ //+ // Found the corresponding PORTSC > value in > > PSIV field of USB3 offset.+ //+ UsbSpeedIdMap = > > USB_PORT_STAT_SUPER_SPEED;+ }+ }+ return UsbSpeedIdMap; } diff > --git > > a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > > b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > > index 5fe2ba4f0e..74ac6297ba 100644 > > --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h > > @@ -85,6 +85,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent > > #define XHC_SUPPORTED_PROTOCOL_DW2_OFFSET 0x08 #define > > XHC_SUPPORTED_PROTOCOL_PSI_OFFSET 0x10 #define > > XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM 480+#define > > XHC_SUPPORTED_PROTOCOL_USB2_FULL_SPEED_PSIM 12 #define > > XHC_SUPPORTED_PROTOCOL_USB2_LOW_SPEED_PSIM 1500 #pragma > > pack (1)-- > > 2.37.2 > > > > > > > > -=-=-=-=-=-= > > Groups.io Links: You receive all messages sent to this group. > > View/Reply Online (#96843): https://edk2.groups.io/g/devel/message/96843 > > Mute This Topic: https://groups.io/mt/95391831/1768737 > > Group Owner: devel+owner@edk2.groups.io > > Unsubscribe: https://edk2.groups.io/g/devel/unsub [hao.a.wu@intel.com] > -=-=- > > =-=-=-= > > > > > > > > > --000000000000b1d00405eedaf7c3 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Hao

They are now resolved

Thanks

Sean

On Fri, 2 Dec 2022 at 06:25, Wu, Hao A &= lt;hao.a.wu@intel.com> wrote:<= br>
Hello,

I saw there are several CI check failures for this 4 patches:
https://github.com/tianocore/edk2/pull/3702

Could you help to resolve them? Thanks.

Best Regards,
Hao Wu

> -----Original Message-----
> From: devel@= edk2.groups.io <devel@edk2.groups.io> On Behalf Of Sean
> Rhodes
> Sent: Friday, December 2, 2022 4:25 AM
> To: devel@ed= k2.groups.io
> Cc: Matt DeVillier <matt.devillier@gmail.com>; Wu, Hao A
> <hao.a.wu@i= ntel.com>; Ni, Ray <ray.ni@intel.com>; Rhodes, Sean
> <sean@starlabs.systems>
> Subject: [edk2-devel] [PATCH 1/4] MdeModulePkg/XhciDxe/XhciReg: Handle=
> incorrect PSIV indices
>
> From: Matt DeVillier <matt.devillier@gmail.com>
>
> On some platforms, including Sky Lake and Kaby Lake, the PSIV (Protoco= l Speed
> ID Value) indicesare shared between Protocol Speed ID DWORD' in th= e
> extended capabilities registers for both USB2 (Full Speed) and USB3 (S= uper
> Speed).
>
> An example can be found below:
>
>=C2=A0 =C2=A0 =C2=A0XhcCheckUsbPortSpeedUsedPsic: checking for USB2 ext= caps
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: found 3 PSID entries
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: looking for port speed 1
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: PSIV 1 PSIE 2 PLT 0 PSIM 12
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: PSIV 2 PSIE 1 PLT 0 PSIM 1500
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: PSIV 3 PSIE 2 PLT 0 PSIM 480
>=C2=A0 =C2=A0 =C2=A0XhcCheckUsbPortSpeedUsedPsic: checking for USB3 ext= caps
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: found 3 PSID entries
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: looking for port speed 1
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: PSIV 1 PSIE 3 PLT 0 PSIM 5
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: PSIV 2 PSIE 3 PLT 0 PSIM 10
>=C2=A0 =C2=A0 =C2=A0XhciPsivGetPsid: PSIV 34 PSIE 2 PLT 0 PSIM 1248
>
> The result is edk2 detecting USB2 devices as USB3 devices, which conse= quently
> causes enumeration to fail.
>
> To avoid incorrect detection, check the extended capability registers = for USB2
> before USB3. If edk2 finds a match for a USB 2 device, don't check= for USB 3.
>
> Cc: Hao A Wu <hao.a.wu@intel.com>
> Cc: Ray Ni <r= ay.ni@intel.com>
> Reviewed-by: Sean Rhodes <sean@starlabs.systems>
> Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
> Change-Id: I5bcf32105ce85fda95b4ba98a5e420e8f522374c
> ---
>=C2=A0 MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c | 36 +++++++++++++++-----= ------
> MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h |=C2=A0 1 +
>=C2=A0 2 files changed, 22 insertions(+), 15 deletions(-)
>
> diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> index 2b4a4b2444..c992323443 100644
> --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
> @@ -698,25 +698,11 @@ XhcCheckUsbPortSpeedUsedPsic (
>=C2=A0 =C2=A0 SpField.Dword =3D 0;=C2=A0 =C2=A0UsbSpeedIdMap =3D 0; -= =C2=A0 //-=C2=A0 // Check xHCI Supported
> Protocol Capability, find the PSIV field to match-=C2=A0 // PortSpeed = definition when
> the Major Revision is 03h.-=C2=A0 //-=C2=A0 if (Xhc->Usb3SupOffset = !=3D 0xFFFFFFFF) {-
> SpField.Dword =3D XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpe= ed);-=C2=A0 =C2=A0 if
> (SpField.Dword !=3D 0) {-=C2=A0 =C2=A0 =C2=A0 //-=C2=A0 =C2=A0 =C2=A0 = // Found the corresponding PORTSC value in
> PSIV field of USB3 offset.-=C2=A0 =C2=A0 =C2=A0 //-=C2=A0 =C2=A0 =C2= =A0 UsbSpeedIdMap =3D
> USB_PORT_STAT_SUPER_SPEED;-=C2=A0 =C2=A0 }-=C2=A0 }-=C2=A0 =C2=A0//=C2= =A0 =C2=A0// Check xHCI Supported Protocol
> Capability, find the PSIV field to match=C2=A0 =C2=A0// PortSpeed defi= nition when the Major
> Revision is 02h.=C2=A0 =C2=A0//-=C2=A0 if ((UsbSpeedIdMap =3D=3D 0) &a= mp;& (Xhc->Usb2SupOffset !=3D
> 0xFFFFFFFF)) {+=C2=A0 if (Xhc->Usb2SupOffset !=3D 0xFFFFFFFF) {=C2= =A0 =C2=A0 =C2=A0SpField.Dword =3D
> XhciPsivGetPsid (Xhc, Xhc->Usb2SupOffset, PortSpeed);=C2=A0 =C2=A0 = =C2=A0if (SpField.Dword !=3D 0)
> {=C2=A0 =C2=A0 =C2=A0 =C2=A0//@@ -733,6 +719,12 @@ XhcCheckUsbPortSpee= dUsedPsic (
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 // PSIM shows as default High= -speed protocol, apply to High-speed
> mapping=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0//=C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0UsbSpeedIdMap =3D
> USB_PORT_STAT_HIGH_SPEED;+=C2=A0 =C2=A0 =C2=A0 =C2=A0 } else if (SpFie= ld.Data.Psim =3D=3D
> XHC_SUPPORTED_PROTOCOL_USB2_FULL_SPEED_PSIM) {+=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 //+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 //
> PSIM shows as default Full-speed protocol, return 0+=C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 // to ensure no port
> status set+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 //+=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 return 0;=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0}=C2=A0 =C2=A0 =C2= =A0 =C2=A0} else if (SpField.Data.Psie =3D=3D 1)
> {=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0//@@ -750,6 +742,20 @@ XhcCheckUsbP= ortSpeedUsedPsic (
>=C2=A0 =C2=A0 =C2=A0 }=C2=A0 =C2=A0} +=C2=A0 //+=C2=A0 // Check xHCI Su= pported Protocol Capability, find the PSIV field to
> match+=C2=A0 // PortSpeed definition when the Major Revision is 03h.+= =C2=A0 //+=C2=A0 if
> ((UsbSpeedIdMap =3D=3D 0) && (Xhc->Usb3SupOffset !=3D 0xFFF= FFFFF)) {+
> SpField.Dword =3D XhciPsivGetPsid (Xhc, Xhc->Usb3SupOffset, PortSpe= ed);+=C2=A0 =C2=A0 if
> (SpField.Dword !=3D 0) {+=C2=A0 =C2=A0 =C2=A0 //+=C2=A0 =C2=A0 =C2=A0 = // Found the corresponding PORTSC value in
> PSIV field of USB3 offset.+=C2=A0 =C2=A0 =C2=A0 //+=C2=A0 =C2=A0 =C2= =A0 UsbSpeedIdMap =3D
> USB_PORT_STAT_SUPER_SPEED;+=C2=A0 =C2=A0 }+=C2=A0 }+=C2=A0 =C2=A0retur= n UsbSpeedIdMap; } diff --git
> a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
> b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
> index 5fe2ba4f0e..74ac6297ba 100644
> --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
> +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.h
> @@ -85,6 +85,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
>=C2=A0 #define XHC_SUPPORTED_PROTOCOL_DW2_OFFSET=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A00x08 #define
> XHC_SUPPORTED_PROTOCOL_PSI_OFFSET=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A00x10 #define
> XHC_SUPPORTED_PROTOCOL_USB2_HIGH_SPEED_PSIM=C2=A0 =C2=A0 =C2=A0480+#de= fine
> XHC_SUPPORTED_PROTOCOL_USB2_FULL_SPEED_PSIM=C2=A0 =C2=A0 =C2=A012 #def= ine
> XHC_SUPPORTED_PROTOCOL_USB2_LOW_SPEED_PSIM=C2=A0 =C2=A0 =C2=A0 1500=C2= =A0 #pragma
> pack (1)--
> 2.37.2
>
>
>
> -=3D-=3D-=3D-=3D-=3D-=3D
> Groups.io Links: You receive all messages sent to this group.
> View/Reply Online (#96843): https://edk2.groups.io/= g/devel/message/96843
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