Reviewed-by Sean Rhodes On Wed, 30 Mar 2022 at 19:29, Sean Rhodes wrote: > From: Lean Sheng Tan > > Don't assume a 64bit register always holds an address greater than 4GB. > Check the value in the register and decide which Aperature it should be > assigned to. > > Fixes assertion > "ASSERT [PciHostBridgeDxe] Bridge->MemAbove4G.Base >= > 0x0000000100000000ULL". > > Tested with coreboot as bootloader on platforms that have PCI resource > above 4GiB and on platforms that don't have resource above 4GiB. > > Cc: Guo Dong > Cc: Ray Ni > Cc: Maurice Ma > Cc: Benjamin You > Cc: Sean Rhodes > Signed-off-by: Patrick Rudolph > --- > .../Library/PciHostBridgeLib/PciHostBridgeSupport.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git > a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > index 8a890b6b53..e1faa24ae7 100644 > --- a/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > +++ b/UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBridgeSupport.c > @@ -354,14 +354,19 @@ ScanForRootBridges ( > Base = ((UINT32)Pci.Bridge.PrefetchableMemoryBase & 0xfff0) << > 16; > Limit = (((UINT32)Pci.Bridge.PrefetchableMemoryLimit & 0xfff0) > << 16) | 0xfffff; > - MemAperture = &Mem; > + > if (Value == BIT0) { > - Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, > 32); > - Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, > 32); > - MemAperture = &MemAbove4G; > + Base |= LShiftU64 (Pci.Bridge.PrefetchableBaseUpper32, 32); > + Limit |= LShiftU64 (Pci.Bridge.PrefetchableLimitUpper32, 32); > } > > if ((Base > 0) && (Base < Limit)) { > + if (Base < BASE_4GB) { > + MemAperture = &Mem; > + } else { > + MemAperture = &MemAbove4G; > + } > + > if (MemAperture->Base > Base) { > MemAperture->Base = Base; > } > -- > 2.32.0 > >