From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 22B7094115D for ; Wed, 3 Apr 2024 07:53:25 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=aFKdQEzAlt3r1RHwpvyRg1yv9XhwXrYhPcQ5q/taldg=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20240206; t=1712130804; v=1; b=uhkhlwIddh1xQt+SeW3I/eRmskrA0Obh5q5TwoSwPiRakyc8JmnIZV8yncVLG3wvB5LB/oyB PxzM903dUYesipZK9H6wDny4NmL+O1EN1t8Yy11chHffSF5dEVE/aVXtjtTcPARCDhpi0VBWzPf AHvLLeTPdbXf8SVnT6tmmk0oBea0L6yJIYKLPcTr89ioW+VEuNkqP1bht3MOnjqUpzs1oKbmZ5g nRj5PANLJJWDrEUP/Fj1hX4f6/BrY0GfX3BOuogedQ0mL9n00NvcZSxLOTquXE5eFoL2vYCG6H4 xaB0bZmNHV5aIsLei+cQkrpmdohE6CWKzWjquExf4AY6w== X-Received: by 127.0.0.2 with SMTP id iihwYY7687511xESbPwuzM8T; Wed, 03 Apr 2024 00:53:24 -0700 X-Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) by mx.groups.io with SMTP id smtpd.web10.6011.1712130802690742999 for ; Wed, 03 Apr 2024 00:53:23 -0700 X-Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-5157af37806so6654013e87.0 for ; Wed, 03 Apr 2024 00:53:22 -0700 (PDT) X-Gm-Message-State: M0I3Gy5WFGk0CUmrqIMKmYVNx7686176AA= X-Google-Smtp-Source: AGHT+IFOjrnxKJ2UdQFlIzwGBOP9lGQfoUB8Ig59ZFPPNv/JsWdaLpRQHsNNnFtxgsywwejU87dwVTDNbOQchZOhxek= X-Received: by 2002:a05:6512:20c5:b0:513:cc88:e1b with SMTP id u5-20020a05651220c500b00513cc880e1bmr8856419lfr.61.1712130800095; Wed, 03 Apr 2024 00:53:20 -0700 (PDT) MIME-Version: 1.0 References: <9143994e6a5f37650930abfc4141c6061e5bef98.1696448945.git.matt.devillier@gmail.com> <00631c0eb096de9089a9fe123e905b435d83da2e.1696448945.git.matt.devillier@gmail.com> In-Reply-To: <00631c0eb096de9089a9fe123e905b435d83da2e.1696448945.git.matt.devillier@gmail.com> From: "Sean Rhodes" Date: Wed, 3 Apr 2024 08:53:09 +0100 Message-ID: Subject: Re: [edk2-devel] [PATCH 3/3] PlatformHookLib: Set PcdSerialClockRate using HOB data To: devel@edk2.groups.io, matt.devillier@gmail.com, "Dong, Guo" Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Wed, 03 Apr 2024 00:53:23 -0700 Resent-From: sean@starlabs.systems Reply-To: devel@edk2.groups.io,sean@starlabs.systems List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: multipart/alternative; boundary="000000000000263f9e06152c84de" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240206 header.b=uhkhlwId; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=starlabs.systems (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --000000000000263f9e06152c84de Content-Type: text/plain; charset="UTF-8" PR created - https://github.com/tianocore/edk2/pull/5513 LGTM but I can't check it against UPL. @Dong, Guo Would you be able to take a look please'? On Wed, 4 Oct 2023 at 21:02, MrChromebox wrote: > Fixes serial output on platforms using coreboot and a non-default > clock rate such as AMD Picasso and newer Zen-based platforms. > > Signed-off-by: Matt DeVillier > Change-Id: I91290397852176754e9a34ec6e5829044f41d15a > --- > UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c | 5 +++++ > UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf | 1 + > 2 files changed, 6 insertions(+) > > diff --git a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c > b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c > index 60a17b8fc2..e3d47ac2fa 100644 > --- a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c > +++ b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c > @@ -90,6 +90,11 @@ PlatformHookSerialPortInitialize ( > return Status; > } > > + Status = PcdSet32S (PcdSerialClockRate, SerialPortInfo->ClockRate); > + if (RETURN_ERROR (Status)) { > + return Status; > + } > + > return RETURN_SUCCESS; > } > > diff --git a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf > b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf > index 7ac6bfa1b1..e2908cfbca 100644 > --- a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf > +++ b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf > @@ -38,3 +38,4 @@ > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## PRODUCES > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## PRODUCES > gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## PRODUCES > + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## PRODUCES > -- > 2.34.1 > > > > ------------ > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#109337): https://edk2.groups.io/g/devel/message/109337 > Mute This Topic: https://groups.io/mt/101763377/6718866 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [sean@starlabs.systems] > ------------ > > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#117355): https://edk2.groups.io/g/devel/message/117355 Mute This Topic: https://groups.io/mt/101763377/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=- --000000000000263f9e06152c84de Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
PR created -=C2=A0https://github.com/tianocore/edk2/pull/5513

LGTM but I can't check it against UPL.

@Dong, Guo=C2=A0Would you be able to take a look=C2=A0pl= ease'?

On Wed, 4 Oct 2023 at 21:02, MrChromebox <matt.devillier@gmail.com> wrote:
Fixes serial outp= ut on platforms using coreboot and a non-default
clock rate such as AMD Picasso and newer Zen-based platforms.

Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Change-Id: I91290397852176754e9a34ec6e5829044f41d15a
---
=C2=A0UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c=C2=A0 =C2=A0= | 5 +++++
=C2=A0UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf | 1 +
=C2=A02 files changed, 6 insertions(+)

diff --git a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c b/Uef= iPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
index 60a17b8fc2..e3d47ac2fa 100644
--- a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
+++ b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.c
@@ -90,6 +90,11 @@ PlatformHookSerialPortInitialize (
=C2=A0 =C2=A0 =C2=A0 =C2=A0return Status;
=C2=A0 =C2=A0 =C2=A0}

+=C2=A0 =C2=A0 Status =3D PcdSet32S (PcdSerialClockRate, SerialPortInfo->= ;ClockRate);
+=C2=A0 =C2=A0 if (RETURN_ERROR (Status)) {
+=C2=A0 =C2=A0 =C2=A0 return Status;
+=C2=A0 =C2=A0 }
+
=C2=A0 =C2=A0 =C2=A0return RETURN_SUCCESS;
=C2=A0 =C2=A0}

diff --git a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf b/U= efiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
index 7ac6bfa1b1..e2908cfbca 100644
--- a/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
+++ b/UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.inf
@@ -38,3 +38,4 @@
=C2=A0 =C2=A0gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase=C2=A0 =C2= =A0 ## PRODUCES
=C2=A0 =C2=A0gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate=C2=A0 =C2=A0 = =C2=A0 =C2=A0 ## PRODUCES
=C2=A0 =C2=A0gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride=C2=A0 #= # PRODUCES
+=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate=C2=A0 =C2=A0 =C2= =A0 =C2=A0## PRODUCES
--
2.34.1



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