The bug discovered was with coreboot, and the PCD values are derived from
the block size of its SMMStore (NvStorage) region. The discussion on the
patch can be found here: https://review.coreboot.org/c/coreboot/+/62990

Hacking the PCDs could work,, but why would we want to keep an incorrect
check?

Thanks!


On Mon, 16 May 2022 at 08:36, Wu, Hao A <hao.a.wu@intel.com> wrote:

> Sorry for not being clear on what I mean.
>
> Is it possible to change the platform PCD values and keep these block size
> alignment requirements.
>
>
>
> Best Regards,
>
> Hao Wu
>
>
>
> *From:* devel@edk2.groups.io <devel@edk2.groups.io> * On Behalf Of *Sean
> Rhodes
> *Sent:* Monday, May 16, 2022 3:00 PM
> *To:* Wu; Wu, Hao A <hao.a.wu@intel.com>; devel@edk2.groups.io
> *Subject:* Re: [edk2-devel] [PATCH] MdeModulePkg/FaultTolerantWriteDxe:
> Don't check for address alignment
>
>
>
> Hi Hao
>
> Yes, it does conflict - I will update the patch to fix these comments :)
>
> Thank you
>
> 
>