From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qt0-x230.google.com (mail-qt0-x230.google.com [IPv6:2607:f8b0:400d:c0d::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1F8A82095A6D9 for ; Sun, 2 Jul 2017 19:31:28 -0700 (PDT) Received: by mail-qt0-x230.google.com with SMTP id 32so133661991qtv.1 for ; Sun, 02 Jul 2017 19:33:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=vlRViCnz5n2DDrqVs5xJ+EZ1Rf9OHUGAmVtynHiLebI=; b=YxODaExplt8j1CzZIV8EObnnK+PVB1VwxxeOphOQSQtJEGJXVj/VERVc7mWun04/Np mqDfBglWSvaWQwp+ZINbPpxhHzTs/WMHRWiBkR7JzWz44NRORQjI23rHbNiBi+hgfFgK qUGuVNJH1Qi6evVdNgNyMv/OPiuv942LkRUBM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=vlRViCnz5n2DDrqVs5xJ+EZ1Rf9OHUGAmVtynHiLebI=; b=TbShBn8xNcmSvxRzoIaTTGD26R6MOHFbOEx5VuCJqOc2BYpnr6lixRffQ4GUuheNy/ GY7Iy4DzD1HhDCg0hdXMz5LQvs/JGK8DE8X+T6Hhey6TM0IomtBzAUMfXrf/qCJS0VuH 0zY+nz8e5FbbKYP2vqpyaA5rfGSVxFMpdMsEq71DoPfJZNjIoZ+iDzFoOPCUjY8iF/di DiOno4Jn+SZkk2ZI7lN71M2F+m9OhPhIfrM4niYFBnbmlgly2f1JcPDQu0ukv+zsezEt KEtXwWf2WxyhAf1K96IXe8k4o8jfQlqWk3gFfoPGiC8ZRSfBvh0sFWvhrKg4lhz0kWRc lDvQ== X-Gm-Message-State: AKS2vOw7Zn2wHqNu43vnIHN/2UgOKybnBOigtx25nJ+3WiSzyECD+a7k hqVUyu2IQW1gzG+3qDLqUquZKl46Qgai6iTamQ== X-Received: by 10.200.46.253 with SMTP id i58mr41690973qta.89.1499049184001; Sun, 02 Jul 2017 19:33:04 -0700 (PDT) MIME-Version: 1.0 Received: by 10.55.110.66 with HTTP; Sun, 2 Jul 2017 19:33:03 -0700 (PDT) In-Reply-To: <20170630110139.GA26676@bivouac.eciton.net> References: <20170630110139.GA26676@bivouac.eciton.net> From: Jun Nie Date: Mon, 3 Jul 2017 10:33:03 +0800 Message-ID: To: Leif Lindholm Cc: Ard Biesheuvel , edk2-devel@lists.01.org, linaro-uefi@lists.linaro.org, Alexei.Fedorov@arm.com, Evan Lloyd Subject: Re: How to add support to different reg offset definition to share the same driver code? X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Jul 2017 02:31:28 -0000 Content-Type: text/plain; charset="UTF-8" 2017-06-30 19:01 GMT+08:00 Leif Lindholm : > Hi Jun, > > I think there is more than one benefit in mimicing the Linux driver, > so I would lean towards the Pcd option. But as Ard points out to me, > it needs to use a FixedPcd (using FixedPcdGet()) - this can only ever > have a buildtime resolution. > > Regards, > > Leif (technically on holiday, so no patch review until Monday) Just learn from Liming that a MACRO is OK to control the register offset definition in header file as we can change build option in platform.dsc file. This should be most clear method to minimize impact to other platform. Jun > > On Fri, Jun 30, 2017 at 11:35:26AM +0800, Jun Nie wrote: >> Hi, >> >> I am trying to add support to different reg offset and bit offset in >> PL011 UART. It seems impossible to add macro in platform.dsc to enable >> undef/redef in the header file with "#ifdef ZX_PL011_FLAG". Is there >> any proper way to control the reg/bit offset definition? Or we have to >> adopt the Linux driver method with a structure to hold different >> offset value and wrap register access function as below? If so, >> another Pcd is needed to specify the offset structure index for the >> platforms. >> >> >> static u16 pl011_st_offsets[REG_ARRAY_SIZE] = { >> [REG_DR] = UART01x_DR, >> [REG_ST_DMAWM] = ST_UART011_DMAWM, >> [REG_ST_TIMEOUT] = ST_UART011_TIMEOUT, >> ... >> } >> >> static unsigned int pl011_read(const struct uart_amba_port *uap, >> unsigned int reg) >> { >> void __iomem *addr = uap->port.membase + uap->reg_offset[reg]; >> >> return (uap->port.iotype == UPIO_MEM32) ? >> readl_relaxed(addr) : readw_relaxed(addr); >> } >> >> Jun