* [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
2021-02-03 9:07 [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
@ 2021-02-03 9:07 ` Vijayenthiran Subramaniam
2021-02-12 17:28 ` Sami Mujawar
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 2/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RdN1EdgeX2 Vijayenthiran Subramaniam
` (2 subsequent siblings)
3 siblings, 1 reply; 11+ messages in thread
From: Vijayenthiran Subramaniam @ 2021-02-03 9:07 UTC (permalink / raw)
To: devel, Jonathan.Cameron, leif, ardb+tianocore, sami.mujawar
Cc: thomas.abraham
Add helper macros to create Memory Proximity Domain, System Locality
Latency and Bandwidth Information, Memory Side Cache Information
structures in the HMAT table.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
---
| 110 ++++++++++++++++++++
1 file changed, 110 insertions(+)
--git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index 8d715de173c9..181d9d771d1e 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -119,4 +119,114 @@
ACPIProcessorUID, Flags, ClockDomain \
}
+//
+// HMAT related structures
+//
+// Memory Proximity Domain Attributes Structure
+// Refer Section 5.2.27.3 in ACPI Specification, Version 6.3
+#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT( \
+ Flags, ProximityDomainForAttachedIntiator, ProximityDomainForMemory) \
+ { \
+ 0, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES), \
+ { \
+ Flags, \
+ 0 \
+ }, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ ProximityDomainForAttachedIntiator, \
+ ProximityDomainForMemory, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ } \
+ }
+
+// System Locality Latency and Bandwidth Information Structure
+// Refer Section 5.2.27.4 in ACPI Specification, Version 6.3
+#define EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT( \
+ Flags, DataType, NumInitiatorProximityDomains, \
+ NumTargetProximityDomains, EntryBaseUnit) \
+ { \
+ 1, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO) + \
+ (4 * NumInitiatorProximityDomains) + (4 * NumTargetProximityDomains) + \
+ (2 * NumInitiatorProximityDomains * NumTargetProximityDomains), \
+ { \
+ Flags, 0 \
+ }, \
+ DataType, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ NumInitiatorProximityDomains, \
+ NumTargetProximityDomains, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ EntryBaseUnit \
+ }
+
+// Memory Side Cache Information Structure
+// Refer Section 5.2.27.5 in ACPI Specification, Version 6.3
+#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( \
+ MemoryProximityDomain, MemorySideCacheSize, CacheAttributes, \
+ NumberOfSmbiosHandles) \
+ { \
+ 2, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + \
+ (NumberOfSmbiosHandles * 2), \
+ MemoryProximityDomain, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ MemorySideCacheSize, \
+ CacheAttributes, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ NumberOfSmbiosHandles \
+ }
+
#endif /* __SGI_ACPI_HEADER__ */
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table Vijayenthiran Subramaniam
@ 2021-02-12 17:28 ` Sami Mujawar
2021-02-17 9:13 ` [edk2-devel] " Vijayenthiran Subramaniam
0 siblings, 1 reply; 11+ messages in thread
From: Sami Mujawar @ 2021-02-12 17:28 UTC (permalink / raw)
To: Vijayenthiran Subramaniam, devel@edk2.groups.io,
Jonathan.Cameron@Huawei.com, leif@nuviainc.com,
ardb+tianocore@kernel.org
Cc: Thomas Abraham, nd
Hi Vijay,
Please find my response inline marked [SAMI].
Regards,
Sami Mujawar
-----Original Message-----
From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Sent: 03 February 2021 09:07 AM
To: devel@edk2.groups.io; Jonathan.Cameron@Huawei.com; leif@nuviainc.com; ardb+tianocore@kernel.org; Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Thomas Abraham <thomas.abraham@arm.com>
Subject: [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
Add helper macros to create Memory Proximity Domain, System Locality
Latency and Bandwidth Information, Memory Side Cache Information
structures in the HMAT table.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
---
| 110 ++++++++++++++++++++
1 file changed, 110 insertions(+)
--git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
index 8d715de173c9..181d9d771d1e 100644
--- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
+++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
@@ -119,4 +119,114 @@
ACPIProcessorUID, Flags, ClockDomain \
}
+//
+// HMAT related structures
+//
+// Memory Proximity Domain Attributes Structure
+// Refer Section 5.2.27.3 in ACPI Specification, Version 6.3
+#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT( \
+ Flags, ProximityDomainForAttachedIntiator, ProximityDomainForMemory) \
+ { \
+ 0, \
[SAMI] EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES ?
[/SAMI]
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES), \
+ { \
+ Flags, \
+ 0 \
+ }, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ ProximityDomainForAttachedIntiator, \
+ ProximityDomainForMemory, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ } \
+ }
+
+// System Locality Latency and Bandwidth Information Structure
+// Refer Section 5.2.27.4 in ACPI Specification, Version 6.3
+#define EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT( \
+ Flags, DataType, NumInitiatorProximityDomains, \
+ NumTargetProximityDomains, EntryBaseUnit) \
+ { \
+ 1, \
[SAMI] EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO ?
[/SAMI]
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO) + \
+ (4 * NumInitiatorProximityDomains) + (4 * NumTargetProximityDomains) + \
+ (2 * NumInitiatorProximityDomains * NumTargetProximityDomains), \
+ { \
+ Flags, 0 \
[SAMI] 0 on new line for consistency ?
[/SAMI]
+ }, \
+ DataType, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ NumInitiatorProximityDomains, \
+ NumTargetProximityDomains, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ EntryBaseUnit \
+ }
+
+// Memory Side Cache Information Structure
+// Refer Section 5.2.27.5 in ACPI Specification, Version 6.3
+#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( \
+ MemoryProximityDomain, MemorySideCacheSize, CacheAttributes, \
+ NumberOfSmbiosHandles) \
+ { \
+ 2, \
[SAMI] EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO ?
[/SAMI]
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + \
+ (NumberOfSmbiosHandles * 2), \
+ MemoryProximityDomain, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ MemorySideCacheSize, \
+ CacheAttributes, \
+ { \
+ EFI_ACPI_RESERVED_BYTE, \
+ EFI_ACPI_RESERVED_BYTE \
+ }, \
+ NumberOfSmbiosHandles \
+ }
+
#endif /* __SGI_ACPI_HEADER__ */
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [edk2-devel] [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
2021-02-12 17:28 ` Sami Mujawar
@ 2021-02-17 9:13 ` Vijayenthiran Subramaniam
2021-02-17 9:27 ` Sami Mujawar
0 siblings, 1 reply; 11+ messages in thread
From: Vijayenthiran Subramaniam @ 2021-02-17 9:13 UTC (permalink / raw)
To: devel, Sami Mujawar
Cc: Vijayenthiran Subramaniam, Jonathan.Cameron@Huawei.com,
leif@nuviainc.com, ardb+tianocore@kernel.org, Thomas Abraham
Hi Sami,
On Fri, Feb 12, 2021 at 5:28 PM Sami Mujawar <sami.mujawar@arm.com> wrote:
>
> Hi Vijay,
>
> Please find my response inline marked [SAMI].
>
> Regards,
>
> Sami Mujawar
>
> -----Original Message-----
> From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
> Sent: 03 February 2021 09:07 AM
> To: devel@edk2.groups.io; Jonathan.Cameron@Huawei.com; leif@nuviainc.com; ardb+tianocore@kernel.org; Sami Mujawar <Sami.Mujawar@arm.com>
> Cc: Thomas Abraham <thomas.abraham@arm.com>
> Subject: [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
>
> Add helper macros to create Memory Proximity Domain, System Locality
> Latency and Bandwidth Information, Memory Side Cache Information
> structures in the HMAT table.
>
> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
> ---
> Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 110 ++++++++++++++++++++
> 1 file changed, 110 insertions(+)
>
> diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> index 8d715de173c9..181d9d771d1e 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> @@ -119,4 +119,114 @@
> ACPIProcessorUID, Flags, ClockDomain \
> }
>
> +//
> +// HMAT related structures
> +//
> +// Memory Proximity Domain Attributes Structure
> +// Refer Section 5.2.27.3 in ACPI Specification, Version 6.3
> +#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT( \
> + Flags, ProximityDomainForAttachedIntiator, ProximityDomainForMemory) \
> + { \
> + 0, \
> [SAMI] EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES ?
> [/SAMI]
EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES is
already a typedef and
EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT
follows the same
naming as used in the Acpi63.h file:
https://github.com/tianocore/edk2/blob/4f4d862c1c7232a18347616d94c343c929657fdb/MdePkg/Include/IndustryStandard/Acpi63.h#L2057
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES), \
> + { \
> + Flags, \
> + 0 \
> + }, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + ProximityDomainForAttachedIntiator, \
> + ProximityDomainForMemory, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + } \
> + }
> +
> +// System Locality Latency and Bandwidth Information Structure
> +// Refer Section 5.2.27.4 in ACPI Specification, Version 6.3
> +#define EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT( \
> + Flags, DataType, NumInitiatorProximityDomains, \
> + NumTargetProximityDomains, EntryBaseUnit) \
> + { \
> + 1, \
> [SAMI] EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO ?
> [/SAMI]
Same as above.
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO) + \
> + (4 * NumInitiatorProximityDomains) + (4 * NumTargetProximityDomains) + \
> + (2 * NumInitiatorProximityDomains * NumTargetProximityDomains), \
> + { \
> + Flags, 0 \
> [SAMI] 0 on new line for consistency ?
> [/SAMI]
Ack, will fix in the next version.
> + }, \
> + DataType, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + NumInitiatorProximityDomains, \
> + NumTargetProximityDomains, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + EntryBaseUnit \
> + }
> +
> +// Memory Side Cache Information Structure
> +// Refer Section 5.2.27.5 in ACPI Specification, Version 6.3
> +#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( \
> + MemoryProximityDomain, MemorySideCacheSize, CacheAttributes, \
> + NumberOfSmbiosHandles) \
> + { \
> + 2, \
> [SAMI] EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO ?
> [/SAMI]
Same as above.
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + \
> + (NumberOfSmbiosHandles * 2), \
> + MemoryProximityDomain, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + MemorySideCacheSize, \
> + CacheAttributes, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + NumberOfSmbiosHandles \
> + }
> +
> #endif /* __SGI_ACPI_HEADER__ */
> --
> 2.17.1
>
>
BR,
Vijayenthiran
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [edk2-devel] [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
2021-02-17 9:13 ` [edk2-devel] " Vijayenthiran Subramaniam
@ 2021-02-17 9:27 ` Sami Mujawar
0 siblings, 0 replies; 11+ messages in thread
From: Sami Mujawar @ 2021-02-17 9:27 UTC (permalink / raw)
To: Vijayenthiran Subramaniam, devel@edk2.groups.io
Cc: Vijayenthiran Subramaniam, Jonathan.Cameron@Huawei.com,
leif@nuviainc.com, ardb+tianocore@kernel.org, Thomas Abraham, nd
[-- Attachment #1: Type: text/plain, Size: 11778 bytes --]
Hi Vijay,
Please find my response inline marked [SAMI]
Regards,
Sami Mujawar
________________________________
From: Vijayenthiran Subramanian <vijayenthiran.subramaniam@arm.com>
Sent: Wednesday, 17 February 2021, 9:15 am
To: devel@edk2.groups.io; Sami Mujawar
Cc: Vijayenthiran Subramaniam; Jonathan.Cameron@Huawei.com; leif@nuviainc.com; ardb+tianocore@kernel.org; Thomas Abraham
Subject: Re: [edk2-devel] [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
Hi Sami,
On Fri, Feb 12, 2021 at 5:28 PM Sami Mujawar <sami.mujawar@arm.com> wrote:
>
> Hi Vijay,
>
> Please find my response inline marked [SAMI].
>
> Regards,
>
> Sami Mujawar
>
> -----Original Message-----
> From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
> Sent: 03 February 2021 09:07 AM
> To: devel@edk2.groups.io; Jonathan.Cameron@Huawei.com; leif@nuviainc.com; ardb+tianocore@kernel.org; Sami Mujawar <Sami.Mujawar@arm.com>
> Cc: Thomas Abraham <thomas.abraham@arm.com>
> Subject: [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table
>
> Add helper macros to create Memory Proximity Domain, System Locality
> Latency and Bandwidth Information, Memory Side Cache Information
> structures in the HMAT table.
>
> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
> ---
> Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h | 110 ++++++++++++++++++++
> 1 file changed, 110 insertions(+)
>
> diff --git a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> index 8d715de173c9..181d9d771d1e 100644
> --- a/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> +++ b/Platform/ARM/SgiPkg/Include/SgiAcpiHeader.h
> @@ -119,4 +119,114 @@
> ACPIProcessorUID, Flags, ClockDomain \
> }
>
> +//
> +// HMAT related structures
> +//
> +// Memory Proximity Domain Attributes Structure
> +// Refer Section 5.2.27.3 in ACPI Specification, Version 6.3
> +#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT( \
> + Flags, ProximityDomainForAttachedIntiator, ProximityDomainForMemory) \
> + { \
> + 0, \
> [SAMI] EFI_ACPI_6_3_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES ?
> [/SAMI]
EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES is
already a typedef and
EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT
follows the same
naming as used in the Acpi63.h file:
https://github.com/tianocore/edk2/blob/4f4d862c1c7232a18347616d94c343c929657fdb/MdePkg/Include/IndustryStandard/Acpi63.h#L2057
[SAMI] Please use the defined values from https://github.com/tianocore/edk2/blob/4f4d862c1c7232a18347616d94c343c929657fdb/MdePkg/Include/IndustryStandard/Acpi63.h#L20<https://github.com/tianocore/edk2/blob/4f4d862c1c7232a18347616d94c343c929657fdb/MdePkg/Include/IndustryStandard/Acpi63.h#L2057>24
instead of magic numbers. Same for other places in this patch.
[SAMI]
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES), \
> + { \
> + Flags, \
> + 0 \
> + }, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + ProximityDomainForAttachedIntiator, \
> + ProximityDomainForMemory, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + } \
> + }
> +
> +// System Locality Latency and Bandwidth Information Structure
> +// Refer Section 5.2.27.4 in ACPI Specification, Version 6.3
> +#define EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT( \
> + Flags, DataType, NumInitiatorProximityDomains, \
> + NumTargetProximityDomains, EntryBaseUnit) \
> + { \
> + 1, \
> [SAMI] EFI_ACPI_6_3_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO ?
> [/SAMI]
Same as above.
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO) + \
> + (4 * NumInitiatorProximityDomains) + (4 * NumTargetProximityDomains) + \
> + (2 * NumInitiatorProximityDomains * NumTargetProximityDomains), \
> + { \
> + Flags, 0 \
> [SAMI] 0 on new line for consistency ?
> [/SAMI]
Ack, will fix in the next version.
> + }, \
> + DataType, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + NumInitiatorProximityDomains, \
> + NumTargetProximityDomains, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + EntryBaseUnit \
> + }
> +
> +// Memory Side Cache Information Structure
> +// Refer Section 5.2.27.5 in ACPI Specification, Version 6.3
> +#define EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT( \
> + MemoryProximityDomain, MemorySideCacheSize, CacheAttributes, \
> + NumberOfSmbiosHandles) \
> + { \
> + 2, \
> [SAMI] EFI_ACPI_6_3_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO ?
> [/SAMI]
Same as above.
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + sizeof (EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO) + \
> + (NumberOfSmbiosHandles * 2), \
> + MemoryProximityDomain, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + MemorySideCacheSize, \
> + CacheAttributes, \
> + { \
> + EFI_ACPI_RESERVED_BYTE, \
> + EFI_ACPI_RESERVED_BYTE \
> + }, \
> + NumberOfSmbiosHandles \
> + }
> +
> #endif /* __SGI_ACPI_HEADER__ */
> --
> 2.17.1
>
>
BR,
Vijayenthiran
[-- Attachment #2: Type: text/html, Size: 42394 bytes --]
^ permalink raw reply [flat|nested] 11+ messages in thread
* [edk2-platforms] [PATCH v2 2/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RdN1EdgeX2
2021-02-03 9:07 [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table Vijayenthiran Subramaniam
@ 2021-02-03 9:07 ` Vijayenthiran Subramaniam
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC Vijayenthiran Subramaniam
2021-02-11 15:14 ` [edk2-devel] [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
3 siblings, 0 replies; 11+ messages in thread
From: Vijayenthiran Subramaniam @ 2021-02-03 9:07 UTC (permalink / raw)
To: devel, Jonathan.Cameron, leif, ardb+tianocore, sami.mujawar
Cc: thomas.abraham
Add HMAT table support for RD-N1-Edge dual-chip platform. The latencies
mentioned in the table are hypothetical values and represents typical
latency between two chips. These values are applicable only for
RD-N1-Edge dual-chip fixed virtual and should not be reused for other
platforms.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Hmat.aslc | 114 ++++++++++++++++++++
2 files changed, 115 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
index d44f02ab0c16..36d41281439d 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf
@@ -22,6 +22,7 @@ [Sources]
Iort.aslc
Mcfg.aslc
RdN1Edge/Dsdt.asl
+ RdN1EdgeX2/Hmat.aslc
RdN1EdgeX2/Madt.aslc
RdN1EdgeX2/Srat.aslc
Spcr.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Hmat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Hmat.aslc
new file mode 100644
index 000000000000..975ffd2af8d4
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Hmat.aslc
@@ -0,0 +1,114 @@
+/** @file
+* Heterogeneous Memory Attribute Table (HMAT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+
+#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
+#define INITATOR_PROXIMITY_DOMAIN_CNT 2
+#define TARGET_PROXIMITY_DOMAIN_CNT 2
+
+//
+// HMAT Table
+//
+#pragma pack (1)
+
+typedef struct {
+ UINT32 InitatorProximityDomain[INITATOR_PROXIMITY_DOMAIN_CNT];
+ UINT32 TargetProximityDomain[TARGET_PROXIMITY_DOMAIN_CNT];
+ UINT16 MatrixEntry[INITATOR_PROXIMITY_DOMAIN_CNT * TARGET_PROXIMITY_DOMAIN_CNT];
+} InitiatorTargetProximityMatrix;
+
+typedef struct {
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER Header;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES Proximity[CHIP_CNT];
+ EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO LatencyInfo;
+ InitiatorTargetProximityMatrix Matrix;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache0;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache1;
+} EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE;
+
+#pragma pack ()
+
+#define HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT( \
+ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
+ ) \
+{ \
+ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
+}
+
+EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat = {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE,
+ EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE,
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION
+ ),
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ },
+
+ // Memory Proximity Domain
+ {
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x0, 0x0),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x1, 0x1),
+ },
+
+ // Latency Info
+ EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT (
+ 0, 0, INITATOR_PROXIMITY_DOMAIN_CNT, TARGET_PROXIMITY_DOMAIN_CNT, 100),
+ {
+ {0, 1}, {0, 1},
+ {
+ //
+ // The latencies mentioned in this table are hypothetical values and
+ // represents typical latency between two chips. These values are
+ // applicable only for RD-N1-Edge dual-chip fixed virtual platform and
+ // should not be reused for other platforms.
+ //
+ 10, 20,
+ 20, 10,
+ }
+ },
+
+ // Memory Side Cache
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x0, SIZE_8MB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x1, SIZE_8MB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+};
+
+VOID* CONST ReferenceAcpiTable = &Hmat;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
2021-02-03 9:07 [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 1/3] Platform/ARM/SgiPkg: Add helper macros for HMAT table Vijayenthiran Subramaniam
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 2/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RdN1EdgeX2 Vijayenthiran Subramaniam
@ 2021-02-03 9:07 ` Vijayenthiran Subramaniam
2021-02-12 17:28 ` Sami Mujawar
2021-02-11 15:14 ` [edk2-devel] [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
3 siblings, 1 reply; 11+ messages in thread
From: Vijayenthiran Subramaniam @ 2021-02-03 9:07 UTC (permalink / raw)
To: devel, Jonathan.Cameron, leif, ardb+tianocore, sami.mujawar
Cc: thomas.abraham
Add HMAT ACPI tables that is specific for RD-V1-MC quad-chip platform.
The latencies mentioned in the table are hypothetical values and
represents typical latency between four chips. These values are
applicable only for RD-V1-MC quad-chip fixed virtual and should not be
reused for other platforms.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc | 144 ++++++++++++++++++++
2 files changed, 145 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
index 051825993af0..f3552bc49003 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
@@ -22,6 +22,7 @@ [Sources]
Iort.aslc
Mcfg.aslc
RdV1Mc/Dsdt.asl
+ RdV1Mc/Hmat.aslc
RdV1Mc/Madt.aslc
RdV1Mc/Srat.aslc
Spcr.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc
new file mode 100644
index 000000000000..d2c067d70be9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc
@@ -0,0 +1,144 @@
+/** @file
+* Heterogeneous Memory Attribute Table (HMAT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+
+#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
+#define INITATOR_PROXIMITY_DOMAIN_CNT 4
+#define TARGET_PROXIMITY_DOMAIN_CNT 4
+
+//
+// HMAT Table
+//
+#pragma pack (1)
+
+typedef struct {
+ UINT32 InitatorProximityDomain[INITATOR_PROXIMITY_DOMAIN_CNT];
+ UINT32 TargetProximityDomain[TARGET_PROXIMITY_DOMAIN_CNT];
+ UINT16 MatrixEntry[INITATOR_PROXIMITY_DOMAIN_CNT * TARGET_PROXIMITY_DOMAIN_CNT];
+} InitiatorTargetProximityMatrix;
+
+typedef struct {
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER Header;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES Proximity[CHIP_CNT];
+ EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO LatencyInfo;
+ InitiatorTargetProximityMatrix Matrix;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache0;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache1;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache2;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache3;
+} EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE;
+
+#pragma pack ()
+
+#define HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT( \
+ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
+ ) \
+{ \
+ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
+}
+
+EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat = {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE,
+ EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE,
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION
+ ),
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ },
+
+ // Memory Proximity Domain
+ {
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x0, 0x0),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x1, 0x1),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x2, 0x2),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x3, 0x3),
+ },
+
+ // Latency Info
+ EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT (
+ 0, 0, INITATOR_PROXIMITY_DOMAIN_CNT, TARGET_PROXIMITY_DOMAIN_CNT, 100),
+ {
+ {0, 1, 2, 3}, {0, 1, 2, 3},
+ {
+ //
+ // The latencies mentioned in this table are hypothetical values and
+ // represents typical latency between four chips. These values are
+ // applicable only for RD-V1-MC quad-chip fixed virtual platform and
+ // should not be reused for other platforms.
+ //
+ 10, 20, 20, 20,
+ 20, 10, 20, 20,
+ 20, 20, 10, 20,
+ 20, 20, 20, 10,
+ }
+ },
+
+ // Memory Side Cache
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x0, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x1, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x2, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x3, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+};
+
+VOID* CONST ReferenceAcpiTable = &Hmat;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC Vijayenthiran Subramaniam
@ 2021-02-12 17:28 ` Sami Mujawar
2021-02-17 9:17 ` [edk2-devel] " Vijayenthiran Subramaniam
0 siblings, 1 reply; 11+ messages in thread
From: Sami Mujawar @ 2021-02-12 17:28 UTC (permalink / raw)
To: Vijayenthiran Subramaniam, devel@edk2.groups.io,
Jonathan.Cameron@Huawei.com, leif@nuviainc.com,
ardb+tianocore@kernel.org
Cc: Thomas Abraham, nd
Hi Vijay,
This patch needs similar changes as patch 2/3.
Regards,
Sami Mujawar
-----Original Message-----
From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Sent: 03 February 2021 09:07 AM
To: devel@edk2.groups.io; Jonathan.Cameron@Huawei.com; leif@nuviainc.com; ardb+tianocore@kernel.org; Sami Mujawar <Sami.Mujawar@arm.com>
Cc: Thomas Abraham <thomas.abraham@arm.com>
Subject: [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
Add HMAT ACPI tables that is specific for RD-V1-MC quad-chip platform.
The latencies mentioned in the table are hypothetical values and
represents typical latency between four chips. These values are
applicable only for RD-V1-MC quad-chip fixed virtual and should not be
reused for other platforms.
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 1 +
Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc | 144 ++++++++++++++++++++
2 files changed, 145 insertions(+)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
index 051825993af0..f3552bc49003 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
@@ -22,6 +22,7 @@ [Sources]
Iort.aslc
Mcfg.aslc
RdV1Mc/Dsdt.asl
+ RdV1Mc/Hmat.aslc
RdV1Mc/Madt.aslc
RdV1Mc/Srat.aslc
Spcr.aslc
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc
new file mode 100644
index 000000000000..d2c067d70be9
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc
@@ -0,0 +1,144 @@
+/** @file
+* Heterogeneous Memory Attribute Table (HMAT)
+*
+* Copyright (c) 2020, ARM Limited. All rights reserved.
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include "SgiAcpiHeader.h"
+#include "SgiPlatform.h"
+#include <IndustryStandard/Acpi.h>
+#include <Library/AcpiLib.h>
+#include <Library/ArmLib.h>
+
+#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
+#define INITATOR_PROXIMITY_DOMAIN_CNT 4
+#define TARGET_PROXIMITY_DOMAIN_CNT 4
+
+//
+// HMAT Table
+//
+#pragma pack (1)
+
+typedef struct {
+ UINT32 InitatorProximityDomain[INITATOR_PROXIMITY_DOMAIN_CNT];
+ UINT32 TargetProximityDomain[TARGET_PROXIMITY_DOMAIN_CNT];
+ UINT16 MatrixEntry[INITATOR_PROXIMITY_DOMAIN_CNT * TARGET_PROXIMITY_DOMAIN_CNT];
+} InitiatorTargetProximityMatrix;
+
+typedef struct {
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER Header;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES Proximity[CHIP_CNT];
+ EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO LatencyInfo;
+ InitiatorTargetProximityMatrix Matrix;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache0;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache1;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache2;
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache3;
+} EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE;
+
+#pragma pack ()
+
+#define HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT( \
+ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
+ ) \
+{ \
+ TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
+}
+
+EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat = {
+ // Header
+ {
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE,
+ EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE,
+ EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION
+ ),
+ {
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE,
+ EFI_ACPI_RESERVED_BYTE
+ },
+ },
+
+ // Memory Proximity Domain
+ {
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x0, 0x0),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x1, 0x1),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x2, 0x2),
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
+ 1, 0x3, 0x3),
+ },
+
+ // Latency Info
+ EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT (
+ 0, 0, INITATOR_PROXIMITY_DOMAIN_CNT, TARGET_PROXIMITY_DOMAIN_CNT, 100),
+ {
+ {0, 1, 2, 3}, {0, 1, 2, 3},
+ {
+ //
+ // The latencies mentioned in this table are hypothetical values and
+ // represents typical latency between four chips. These values are
+ // applicable only for RD-V1-MC quad-chip fixed virtual platform and
+ // should not be reused for other platforms.
+ //
+ 10, 20, 20, 20,
+ 20, 10, 20, 20,
+ 20, 20, 10, 20,
+ 20, 20, 20, 10,
+ }
+ },
+
+ // Memory Side Cache
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x0, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x1, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x2, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+
+ EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
+ 0x3, SIZE_1GB,
+ HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
+ 1,
+ 1,
+ 2,
+ 2,
+ 64 // 64 bytes cache line length
+ ),
+ 0),
+};
+
+VOID* CONST ReferenceAcpiTable = &Hmat;
--
2.17.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [edk2-devel] [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
2021-02-12 17:28 ` Sami Mujawar
@ 2021-02-17 9:17 ` Vijayenthiran Subramaniam
0 siblings, 0 replies; 11+ messages in thread
From: Vijayenthiran Subramaniam @ 2021-02-17 9:17 UTC (permalink / raw)
To: devel, Sami Mujawar
Cc: Vijayenthiran Subramaniam, Jonathan.Cameron@Huawei.com,
leif@nuviainc.com, ardb+tianocore@kernel.org, Thomas Abraham, nd
Hi Sami,
On Fri, Feb 12, 2021 at 5:28 PM Sami Mujawar <sami.mujawar@arm.com> wrote:
>
> Hi Vijay,
>
> This patch needs similar changes as patch 2/3.
Ack.
>
> Regards,
>
> Sami Mujawar
>
> -----Original Message-----
> From: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
> Sent: 03 February 2021 09:07 AM
> To: devel@edk2.groups.io; Jonathan.Cameron@Huawei.com; leif@nuviainc.com; ardb+tianocore@kernel.org; Sami Mujawar <Sami.Mujawar@arm.com>
> Cc: Thomas Abraham <thomas.abraham@arm.com>
> Subject: [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
>
> Add HMAT ACPI tables that is specific for RD-V1-MC quad-chip platform.
> The latencies mentioned in the table are hypothetical values and
> represents typical latency between four chips. These values are
> applicable only for RD-V1-MC quad-chip fixed virtual and should not be
> reused for other platforms.
>
> Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
> ---
> Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf | 1 +
> Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc | 144 ++++++++++++++++++++
> 2 files changed, 145 insertions(+)
>
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
> index 051825993af0..f3552bc49003 100644
> --- a/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1McAcpiTables.inf
> @@ -22,6 +22,7 @@ [Sources]
> Iort.aslc
> Mcfg.aslc
> RdV1Mc/Dsdt.asl
> + RdV1Mc/Hmat.aslc
> RdV1Mc/Madt.aslc
> RdV1Mc/Srat.aslc
> Spcr.aslc
> diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc
> new file mode 100644
> index 000000000000..d2c067d70be9
> --- /dev/null
> +++ b/Platform/ARM/SgiPkg/AcpiTables/RdV1Mc/Hmat.aslc
> @@ -0,0 +1,144 @@
> +/** @file
> +* Heterogeneous Memory Attribute Table (HMAT)
> +*
> +* Copyright (c) 2020, ARM Limited. All rights reserved.
> +*
> +* SPDX-License-Identifier: BSD-2-Clause-Patent
> +*
> +**/
> +
> +#include "SgiAcpiHeader.h"
> +#include "SgiPlatform.h"
> +#include <IndustryStandard/Acpi.h>
> +#include <Library/AcpiLib.h>
> +#include <Library/ArmLib.h>
> +
> +#define CHIP_CNT FixedPcdGet32 (PcdChipCount)
> +#define INITATOR_PROXIMITY_DOMAIN_CNT 4
> +#define TARGET_PROXIMITY_DOMAIN_CNT 4
> +
> +//
> +// HMAT Table
> +//
> +#pragma pack (1)
> +
> +typedef struct {
> + UINT32 InitatorProximityDomain[INITATOR_PROXIMITY_DOMAIN_CNT];
> + UINT32 TargetProximityDomain[TARGET_PROXIMITY_DOMAIN_CNT];
> + UINT16 MatrixEntry[INITATOR_PROXIMITY_DOMAIN_CNT * TARGET_PROXIMITY_DOMAIN_CNT];
> +} InitiatorTargetProximityMatrix;
> +
> +typedef struct {
> + EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER Header;
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES Proximity[CHIP_CNT];
> + EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO LatencyInfo;
> + InitiatorTargetProximityMatrix Matrix;
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache0;
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache1;
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache2;
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO MemSideCache3;
> +} EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE;
> +
> +#pragma pack ()
> +
> +#define HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT( \
> + TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
> + ) \
> +{ \
> + TotalCacheLevels, CacheLevel, CacheAssociativity, WritePolicy, CacheLineSize \
> +}
> +
> +EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE Hmat = {
> + // Header
> + {
> + ARM_ACPI_HEADER (
> + EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE,
> + EFI_ACPI_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE,
> + EFI_ACPI_6_3_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION
> + ),
> + {
> + EFI_ACPI_RESERVED_BYTE,
> + EFI_ACPI_RESERVED_BYTE,
> + EFI_ACPI_RESERVED_BYTE,
> + EFI_ACPI_RESERVED_BYTE
> + },
> + },
> +
> + // Memory Proximity Domain
> + {
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
> + 1, 0x0, 0x0),
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
> + 1, 0x1, 0x1),
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
> + 1, 0x2, 0x2),
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
> + 1, 0x3, 0x3),
> + },
> +
> + // Latency Info
> + EFI_ACPI_6_3_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_INIT (
> + 0, 0, INITATOR_PROXIMITY_DOMAIN_CNT, TARGET_PROXIMITY_DOMAIN_CNT, 100),
> + {
> + {0, 1, 2, 3}, {0, 1, 2, 3},
> + {
> + //
> + // The latencies mentioned in this table are hypothetical values and
> + // represents typical latency between four chips. These values are
> + // applicable only for RD-V1-MC quad-chip fixed virtual platform and
> + // should not be reused for other platforms.
> + //
> + 10, 20, 20, 20,
> + 20, 10, 20, 20,
> + 20, 20, 10, 20,
> + 20, 20, 20, 10,
> + }
> + },
> +
> + // Memory Side Cache
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
> + 0x0, SIZE_1GB,
> + HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
> + 1,
> + 1,
> + 2,
> + 2,
> + 64 // 64 bytes cache line length
> + ),
> + 0),
> +
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
> + 0x1, SIZE_1GB,
> + HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
> + 1,
> + 1,
> + 2,
> + 2,
> + 64 // 64 bytes cache line length
> + ),
> + 0),
> +
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
> + 0x2, SIZE_1GB,
> + HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
> + 1,
> + 1,
> + 2,
> + 2,
> + 64 // 64 bytes cache line length
> + ),
> + 0),
> +
> + EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_INIT (
> + 0x3, SIZE_1GB,
> + HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES_INIT (
> + 1,
> + 1,
> + 2,
> + 2,
> + 64 // 64 bytes cache line length
> + ),
> + 0),
> +};
> +
> +VOID* CONST ReferenceAcpiTable = &Hmat;
> --
> 2.17.1
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [edk2-devel] [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms
2021-02-03 9:07 [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
` (2 preceding siblings ...)
2021-02-03 9:07 ` [edk2-platforms] [PATCH v2 3/3] Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC Vijayenthiran Subramaniam
@ 2021-02-11 15:14 ` Vijayenthiran Subramaniam
2021-02-12 14:06 ` Jonathan Cameron
3 siblings, 1 reply; 11+ messages in thread
From: Vijayenthiran Subramaniam @ 2021-02-11 15:14 UTC (permalink / raw)
To: devel, Sami Mujawar, Jonathan.Cameron
Cc: leif, ardb+tianocore, Thomas Abraham
Hi,
On Wed, Feb 3, 2021 at 9:08 AM Vijayenthiran Subramaniam
<vijayenthiran.subramaniam@arm.com> wrote:
>
> This patch series adds HMAT tables for Arm's Neoverse reference design
> multi-chip fixed virtual platforms. The first patch in the series adds helper
> macros to create HMAT table within SgiPkg and the rest two patches adds HMAT
> table for RD-N1-Edge-X2 and RD-V1-MC platforms respectively.
>
> Changes since v1:
> - Fix typo reported here: https://edk2.groups.io/g/devel/message/70855
> - Add comment in the HMAT table about the latency values:
> https://edk2.groups.io/g/devel/message/71012
>
> Vijayenthiran Subramaniam (3):
> Platform/ARM/SgiPkg: Add helper macros for HMAT table
> Platform/ARM/SgiPkg: Add HMAT ACPI table for RdN1EdgeX2
> Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
>
Pinging to see if there is any feedback on this patch series.
Regards,
Vijayenthiran
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [edk2-devel] [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms
2021-02-11 15:14 ` [edk2-devel] [edk2-platforms] [PATCH v2 0/3] Add HMAT tables for RD multi-chip platforms Vijayenthiran Subramaniam
@ 2021-02-12 14:06 ` Jonathan Cameron
0 siblings, 0 replies; 11+ messages in thread
From: Jonathan Cameron @ 2021-02-12 14:06 UTC (permalink / raw)
To: Vijayenthiran Subramaniam
Cc: devel, Sami Mujawar, leif, ardb+tianocore, Thomas Abraham
On Thu, 11 Feb 2021 15:14:09 +0000
Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com> wrote:
> Hi,
>
> On Wed, Feb 3, 2021 at 9:08 AM Vijayenthiran Subramaniam
> <vijayenthiran.subramaniam@arm.com> wrote:
> >
> > This patch series adds HMAT tables for Arm's Neoverse reference design
> > multi-chip fixed virtual platforms. The first patch in the series adds helper
> > macros to create HMAT table within SgiPkg and the rest two patches adds HMAT
> > table for RD-N1-Edge-X2 and RD-V1-MC platforms respectively.
> >
> > Changes since v1:
> > - Fix typo reported here: https://edk2.groups.io/g/devel/message/70855
> > - Add comment in the HMAT table about the latency values:
> > https://edk2.groups.io/g/devel/message/71012
> >
> > Vijayenthiran Subramaniam (3):
> > Platform/ARM/SgiPkg: Add helper macros for HMAT table
> > Platform/ARM/SgiPkg: Add HMAT ACPI table for RdN1EdgeX2
> > Platform/ARM/SgiPkg: Add HMAT ACPI table for RD-V1-MC
> >
>
> Pinging to see if there is any feedback on this patch series.
FWIW looks fine to me now, but I only ever focused on narrow details so
that's probably not that much use to you!
Jonathan
>
> Regards,
> Vijayenthiran
>
>
>
>
>
^ permalink raw reply [flat|nested] 11+ messages in thread