From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::32f; helo=mail-ot1-x32f.google.com; envelope-from=vladimir.olovyannikov@broadcom.com; receiver=edk2-devel@lists.01.org Received: from mail-ot1-x32f.google.com (mail-ot1-x32f.google.com [IPv6:2607:f8b0:4864:20::32f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0EE922194D387 for ; Wed, 19 Sep 2018 15:55:28 -0700 (PDT) Received: by mail-ot1-x32f.google.com with SMTP id i10-v6so7520485oth.0 for ; Wed, 19 Sep 2018 15:55:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:from:date:message-id:subject:to; bh=R3Nx1nxRPUP7sPYncxR7vFad66/O5dDABoOX4H/ytiA=; b=cmh1X79xgJ032dCRv3COSMCIx0vuoNhur6p/avCBlnzJrVtMaev4TF+TXDAzvuemvf hYZHKNZa1JFLOhoeeRfLQnRc1nvBCa8TqMU9apAw1YPv45n31mMlw6ML5/qMLxXeajLJ K+hLb6ATV0O24NPfxhEmMe0zR2OUUqy6ry4jM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=R3Nx1nxRPUP7sPYncxR7vFad66/O5dDABoOX4H/ytiA=; b=N4vhkWgKdkirneFWn7vWTf5ddd3i6ropaU4SJdTJrn1pAf9m7NBkquPqfCOtrZTexP JmfZLZwaXPS3fQDqLlBQ+4xEa+qS6fZLQvmjQWuEO26leSdrl9TDQNeENx19GC6Pp5h8 +j1ygSkyvn4ncwwBvWc2AM4zj8aJkz8nwaEtB9UZdO3Z89edKrs0TXbtiK6JeMil72+L owMhEW5jRzArIh8Lf+BGUef1vDo/52HOxoLircW6x6YtE1hosNVZRCEll5bmeWrcBfQN Q37kYhNgYP9MEnXoA4CC6xMkQgcanbFWjQLlJQtCxjLbs54zxWYk7dHpmisdvCWUo0Ij ILQQ== X-Gm-Message-State: APzg51AVdMRpRqudcoEN2xbRAri55IDh5xsmyJyxo2giBK5jBrJ2goz4 FWiTw+9dyDCbwLEXwNnWEAGqnADIGn/5WewDYlwUYQ== X-Google-Smtp-Source: ANB0VdahuefzG5BxKeOk+QW8fYEnk5whN86hYaAXhzNYWU9ZuuAQnFGHXGBw1IsSvz4NngLUaqocaXpcL0lG5b78lCQ= X-Received: by 2002:a9d:6388:: with SMTP id w8-v6mr21227938otk.45.1537397727370; Wed, 19 Sep 2018 15:55:27 -0700 (PDT) MIME-Version: 1.0 From: Vladimir Olovyannikov Date: Wed, 19 Sep 2018 15:55:15 -0700 Message-ID: To: Ard Biesheuvel , "edk2-devel@lists.01.org" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: Stack issue after warm UEFI reset and MMU enabling on an Armv8 platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Sep 2018 22:55:29 -0000 Content-Type: text/plain; charset="UTF-8" Hi All, I need UEFI experts help on the problem with Armv8 board on warm UEFI reset. Cold reset works fine. Here is how I set up a warm reset: STATIC EFI_STATUS ShutdownUefiBootServices ( VOID ) { EFI_STATUS Status; UINTN MemoryMapSize; EFI_MEMORY_DESCRIPTOR *MemoryMap; UINTN MapKey; UINTN DescriptorSize; UINT32 DescriptorVersion; UINTN Pages; MemoryMap = NULL; MemoryMapSize = 0; Pages = 0; do { Status = gBS->GetMemoryMap ( &MemoryMapSize, MemoryMap, &MapKey, &DescriptorSize, &DescriptorVersion ); if (Status == EFI_BUFFER_TOO_SMALL) { Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1; MemoryMap = AllocatePages (Pages); // // Get System MemoryMap // Status = gBS->GetMemoryMap ( &MemoryMapSize, MemoryMap, &MapKey, &DescriptorSize, &DescriptorVersion ); } // Don't do anything between the GetMemoryMap() and ExitBootServices() if (!EFI_ERROR(Status)) { Status = gBS->ExitBootServices (gImageHandle, MapKey); if (EFI_ERROR(Status)) { FreePages (MemoryMap, Pages); MemoryMap = NULL; MemoryMapSize = 0; } } } while (EFI_ERROR(Status)); return Status; } Then perform ArmCleanDataCache (); ArmInvalidateDataCache (); ArmDisableInstructionCache (); ArmInvalidateInstructionCache (); ArmDisableMmu (); Then jump to start of FV: typedef VOID (EFIAPI *START_FV)( VOID ); StartOfFv = (START_FV)(UINTN)PcdGet64(PcdFvBaseAddress); StartOfFv (); Now this is what happens on warm reset: reset -c warm 1. Until ArmEnableMmu() gets called, everything works as expected. Here is the stack right before ArmEnableMmu() is called: ArmConfigureMmu+0x4f8 InitMmu+0x24 MemoryPeim+0x440 PrePiMain+0x114 PrimaryMain+0x68 CEntryPoint+0xC4 EL2:0x00000000800008BC ----- End of stack info ----- 2. Here is the stack as soon as Mmu is enabled with ArmEnableMmu() : ArmConfigureMmu+0x4fc <-- This one is correct, at line 745 in ArmConfigureMmu() in ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c (return EFI_SUCCESS) _ModuleEntryPoint+0x24 <-- Wrong. This points directly to ASSERT(FALSE); and to CpuDeadLoop() in DxeCoreEntryPoint.c, lines 59-60. El2:0x000000008E5E8300 <-- Absolutely bogus --- End of stack info --- So, as soon as ArmEnableMmu() exits, execution jumps directly to CpuDeadLoop() in DxeCoreEntryPoint of _ModuleEntryPoint(). Would be grateful for any advice. Thank you, Vladimir