From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-x22e.google.com (mail-lf0-x22e.google.com [IPv6:2a00:1450:4010:c07::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 8AE8181E9C for ; Fri, 20 Jan 2017 02:30:42 -0800 (PST) Received: by mail-lf0-x22e.google.com with SMTP id n124so54794559lfd.2 for ; Fri, 20 Jan 2017 02:30:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=Br4KLKe2O16sPshCv6VqqnGB1NRoaGTGNvrE1pIBmJk=; b=Ba/i2GHgzksNeE0MJ2mVM4plitslTkCNYQeafPhRaAtCqt5aey0A510QduB2gt+yP9 IIrkompZ9Wao++01nejkjw7RferVH9g9baQwmkXUAwCmvoxEgKDGgNQKj+gAk/FdEBo+ tE18Tf0Yfq6puDa+IMvpsciq5LutxqGYXubyM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=Br4KLKe2O16sPshCv6VqqnGB1NRoaGTGNvrE1pIBmJk=; b=G81p3dAG4vFK3+VrJtr9mgieju1e6vVf03DYUJ3Z6yJFe4HiLOuvgmT2KauLZwyKzX 0fitDy31OZjfuAkWEQlL3uWZghJHZo3CswVEuP3p9kQByssPwJabSGu1vahDRnmx/LR2 kO1lY/CB5QLml2p3oHPXuwKbRZz03P/VvXJfcX5F6Uo7vnFMTHeiOeiE2GHRoEtCGlpy GzrVflVxff+ucLxhpv86FtUTy82y8vbIh0To88GHvYeXpDTGDpHqIDR+HCYWSM4Oqinx KVyzqQVVaDrH8HEqXs8nsEO0vqkPDKhySnUE3V+2nJCs1EDOdICTh9uEthH8EKkvrN0x g4Vg== X-Gm-Message-State: AIkVDXKlJe1X26mw1gGLa/2mWUU/zZI2QADZ4mKSRn88hkqqbOYW0oGlPymtI4Cl5ALRxazUeI5FHSMeWa9fQRW/ X-Received: by 10.46.21.72 with SMTP id 8mr6184662ljv.11.1484908240194; Fri, 20 Jan 2017 02:30:40 -0800 (PST) MIME-Version: 1.0 Received: by 10.25.207.72 with HTTP; Fri, 20 Jan 2017 02:30:39 -0800 (PST) In-Reply-To: References: <1484782032-82342-1-git-send-email-daniil.egranov@arm.com> <20170119151307.GZ25883@bivouac.eciton.net> From: Ryan Harkin Date: Fri, 20 Jan 2017 10:30:39 +0000 Message-ID: To: Daniil Egranov Cc: Leif Lindholm , "edk2-devel@lists.01.org" Subject: Re: [PATCH] ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe: Fixed crash on Juno R0 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Jan 2017 10:30:43 -0000 Content-Type: text/plain; charset=UTF-8 On 20 January 2017 at 01:34, Daniil Egranov wrote: > Hi Leif, Ryan > > > On 01/19/2017 09:13 AM, Leif Lindholm wrote: > > On Thu, Jan 19, 2017 at 01:49:04PM +0000, Ryan Harkin wrote: > > On 18 January 2017 at 23:27, Daniil Egranov wrote: > > The Marvell Yukon MAC address load supported only on Juno R1 and R2. > It disabled for Juno R0 due to PCI issues on this board. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Daniil Egranov > > Tested-by: Ryan Harkin > > --- > ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > index 47ff587..e9e6990 100644 > --- a/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > +++ b/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c > @@ -378,6 +378,7 @@ OnEndOfDxe ( > EFI_DEVICE_PATH_PROTOCOL* PciRootComplexDevicePath; > EFI_HANDLE Handle; > EFI_STATUS Status; > + UINT32 JunoRevision; > > // > // PCI Root Complex initialization > @@ -393,8 +394,12 @@ OnEndOfDxe ( > Status = gBS->ConnectController (Handle, NULL, PciRootComplexDevicePath, > FALSE); > ASSERT_EFI_ERROR (Status); > > - Status = ArmJunoSetNicMacAddress (); > - ASSERT_EFI_ERROR (Status); > + GetJunoRevision (JunoRevision); > + > + if (JunoRevision != JUNO_REVISION_R0) { > + Status = ArmJunoSetNicMacAddress (); > + ASSERT_EFI_ERROR (Status); > > This is just an FYI, but I stacked your patch on top of mainline, like this: > > 5f81f61 2017-01-18 ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe: > Fixed crash on Juno R0 [Daniil Egranov] > 19ca06b 2017-01-19 OvmfPkg: Remove superfluous return statements. > [Thomas Huth] > > The first time I ran this, Juno R0 worked fine, but on R1 and R2, the > assert triggered: > > UEFI firmware (version 5f81f61 built at 11:56:52 on Jan 19 2017) > [snip] > ASSERT_EFI_ERROR (Status = Not Found) > ASSERT [ArmJunoDxe] > /linaro/platforms/uefi/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c(401): > !EFI_ERROR (Status) > > I worked out what is happening. And it's not to do with this patch. > It's another fall-out from the re-work you did to the previous patch. > It's also ultimately due to a bug the firmware. > > With the initial version of your "Set Marvell Yukon MAC address" > patch, this hang didn't happen. I suspect that was because your error > checking was weaker and certain PCIe failures didn't trigger the > assert. > > To reproduce the error with this commit: > 1) power on and boot R1 or R2 into Shell > I do this by interrupting the boot by pressing ESCAPE and using the boot > menu > 2) At the Shell prompt, run "reset -s" to shutdown > 3) At the ARM Boot Loader "Cmd>" prompt, run "reboot" > 4) the board will hang while booting UEFI, assuming the board firmware > doesn't die with constant messages like this: > > ERROR: PCIe CSR read failed to respond > ERROR: SMBus transaction not claimed > > Assuming the problem is firmware, not EDK2, what should we do about it? > > OK, so instinctively, my reaction was that "the reset -s bug is a > system controller firmware bug and we shouldn't work around > it". However, since it is actually disrupting Ryan's workflow, which > frequently doesn't touch PCI at all, I think downgrading the ASSERT to > an error message is a good idea short-term. > > Daniil - could you make that change please? > > / > Leif > > > I've been able to reproduce "PCIe CSR read failed to respond" and "SMBus > transaction not claimed" errors on my Juno R2. I disabled Marvell Yukon > driver (.dsc/.fdf) and removed ArmJunoDxe patch but still see the same error > messages during the initial boot. > > Testing motherboard interfaces (FPGA build 118)... > SRAM 32MB test: PASSED > LAN9118 test: PASSED > KMI1/2 test: PASSED > MMC test: PASSED > PB/LEDs test: PASSED > FPGA UART test: PASSED > ERROR: PCIe CSR read failed to respond > ERROR: SMBus transaction not claimed > ERROR: PCIe CSR read failed to respond > ... > > Once it went through reporting these errors, the UEFI starts loading but > still fails in OnEndOfDxe(): > ASSERT_EFI_ERROR (Status = Not Found) > ASSERT [ArmJunoDxe] > /home/user/workspace/juno/uefi/edk2/ArmPlatformPkg/ArmJunoPkg/Drivers/ArmJunoDxe/ArmJunoDxe.c(110): > !EFI_ERROR (Status) > > This is the original ArmJunoDxe code: > Status = gBS->ConnectController (Handle, NULL, PciRootComplexDevicePath, > FALSE); > ASSERT_EFI_ERROR (Status); <---- line 110 I'm confused at which point in the commit history this is line 110. Just before your MAC commit, it's line 108. After your commit, and in the current mainline, it's line 394. Then, I have to go back to Jeremy's commit 58a4bff071832e587d18f97597b5d571dcebc9d7 on 27 July 2016 before I see another change to ArmJunoDxe.c. Before that commit, the assert appears on line 116. On my tree, 17.01, 16.12 and 16.11 has the assert on line 246, 16.10 on line 125. So I'm unsure what code you are running. > > but it actually fails here first: > Status = gBS->LocateDevicePath (&gEfiPciRootBridgeIoProtocolGuid, > &PciRootComplexDevicePath, > &Handle); > > Ryan - could you try to remove Marvell patches and check if you also > catching "PCIe .." and "SMBus .." errors without them and your build still > fails with other ASSERTs related to PCI. > > Leif - in my tests, if it fails with "PCIe .." and "SMBus ..", the UEFI PCI > enumeration is completely corrupted. > > These errors do not appear if board was reset with the nPBRESET button. It > never fails with "reset -w" and "reset -c". I also loaded Debian and used > the shutdown command from there and got the same "PCIe .." and "SMBus .." > errors after "reboot" command from the "Cmd>" prompt. Possibly, the > "reboot" command from the board shell prompt does not reset the board > correctly so it looks like a firmware issue. > Yes, that's pretty much what I've been saying. There appears to be a firmware bug that causes PCIe to be in an unstable state after software shutdown of the AP by the motherboard, followed by reset. The "PCIe CSR read failed to respond" error is nothing to do with EDK2 and happens before EDK2 runs. However, unlike you, if I don't get the "PCIe CSR read failed to respond" error, upstream EDK2 before your MAC address commit will boot without ASSERTing on R0/1/2. So I've never seen the assert at line 110 as you pointed out above. That's curious. I can see why that would/should assert, but it doesn't for me. Perhaps it's something to do with the tree you are building from? Or the devices you have connected? I have no additional SATA or PCIe devices connected to my board. Cheers, Ryan. > Thanks, > Daniil > > > Prior to your "Set Marvell Yukon MAC address" patch, or with the > earlier version, the board would boot anyway, but the Yukon device > would be missing. > > Now it dies. > > I don't know which is worse, but I think hanging is worse than an > ethernet port dropping out. Although hanging is a bit more obvious > that there's a problem... > > > + } > } > > STATIC > -- > 2.7.4 > > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel > >