From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-qk0-x236.google.com (mail-qk0-x236.google.com [IPv6:2607:f8b0:400d:c09::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B7C3C8211E for ; Mon, 13 Feb 2017 04:59:11 -0800 (PST) Received: by mail-qk0-x236.google.com with SMTP id p22so359768qka.0 for ; Mon, 13 Feb 2017 04:59:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to; bh=546DPW6gh2OMo4Xf/5M3mb+Am/acaYxXyu/0y1YO92Q=; b=I4SGJKMrRbmIC1iTuDA4jip9I4a9EgTJ0kLpV9y9naUtTOWOZSPpIdu/o9nEwIWRKT vom3lFD8vAgN1TDkztQ0T1ZvDvIZYPW7JVE7dmLN8DU0b3UCAWf7IQS43pRwzuEVm6Qy xVPv3RUPrNAmyrPe/FYzZt/djyuClv5xwIllw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to; bh=546DPW6gh2OMo4Xf/5M3mb+Am/acaYxXyu/0y1YO92Q=; b=QA0helb/X+YZNILYYAP2UWXtd5iNz2SrQSHCJX+emmVxYCok2yE6voubgKls1IifRb 3BidDDvtG0ltGG+OzX0QU0KyXLOCc85X95Rf4QkztE4xuI0K7MMbcIFodDg+L72Ty3JH ESCZQn222ZNnLO3Mhr7OQQnC3D9xkSVOj/KlgLhLB2d42GSyRdmFgWS73O7dxSVFsJKJ ZDctFMJYBGTYZYzkKSt/n9Zne/+RG4pS33HHSyCst5jhq0kalDB7V0jR06VRzZGE8GMN wVZEMC/cGK3zvtk7/NpzBvhJCuCxgdECqSNUUE5UtjWey5gIMb4OH/9IRYOeaikFOSr2 9NHQ== X-Gm-Message-State: AMke39nffAmG/dwTspip5SmnUnUI1Po9zPMt9ooFvNkh/weSKapMVsQZBbaFZ9mPkvKoXUFguoW2Ow2hEcDlt+mB X-Received: by 10.55.128.65 with SMTP id b62mr23418367qkd.302.1486990750820; Mon, 13 Feb 2017 04:59:10 -0800 (PST) MIME-Version: 1.0 Received: by 10.140.41.114 with HTTP; Mon, 13 Feb 2017 04:59:10 -0800 (PST) In-Reply-To: <1486972380-24255-1-git-send-email-haojian.zhuang@linaro.org> References: <1486972380-24255-1-git-send-email-haojian.zhuang@linaro.org> From: Haojian Zhuang Date: Mon, 13 Feb 2017 20:59:10 +0800 Message-ID: To: Leif Lindholm , "edk2-devel@lists.01.org" , Ard Biesheuvel Subject: Re: [PATCH 1/2] ArmPlatformPkg/PL061: remove duplicated PL061_GPIO_DATA_REG X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 13 Feb 2017 12:59:12 -0000 Content-Type: text/plain; charset=UTF-8 On 13 February 2017 at 15:52, Haojian Zhuang wrote: > PL061_GPIO_DATA_REG offset is referenced in PL061EffectiveAddress () > already. So remove the duplicated reference when invoke PL061GetPins () > or PL061SetPins (). > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Haojian Zhuang > --- > ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c > index 0e2ea61..ff8bb3b 100644 > --- a/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c > +++ b/ArmPlatformPkg/Drivers/PL061GpioDxe/PL061Gpio.c > @@ -186,7 +186,7 @@ Get ( > return EFI_INVALID_PARAMETER; > } > > - if (PL061GetPins (RegisterBase + PL061_GPIO_DATA_REG, Offset)) { > + if (PL061GetPins (RegisterBase, Offset)) { > *Value = 1; > } else { > *Value = 0; > @@ -239,14 +239,14 @@ Set ( > // Set the corresponding direction bit to HIGH for output > MmioOr8 (RegisterBase + PL061_GPIO_DIR_REG, GPIO_PIN_MASK(Offset)); > // Set the corresponding data bit to LOW for 0 > - PL061SetPins (RegisterBase + PL061_GPIO_DATA_REG, GPIO_PIN_MASK(Offset), 0); > + PL061SetPins (RegisterBase, GPIO_PIN_MASK(Offset), 0); > break; > > case GPIO_MODE_OUTPUT_1: > // Set the corresponding direction bit to HIGH for output > MmioOr8 (RegisterBase + PL061_GPIO_DIR_REG, GPIO_PIN_MASK(Offset)); > // Set the corresponding data bit to HIGH for 1 > - PL061SetPins (RegisterBase + PL061_GPIO_DATA_REG, GPIO_PIN_MASK(Offset), 0xff); > + PL061SetPins (RegisterBase, GPIO_PIN_MASK(Offset), 0xff); > break; > > default: > @@ -297,7 +297,7 @@ GetMode ( > // Check if it is input or output > if (MmioRead8 (RegisterBase + PL061_GPIO_DIR_REG) & GPIO_PIN_MASK(Offset)) { > // Pin set to output > - if (PL061GetPins (RegisterBase + PL061_GPIO_DATA_REG, GPIO_PIN_MASK(Offset))) { > + if (PL061GetPins (RegisterBase, GPIO_PIN_MASK(Offset))) { > *Mode = GPIO_MODE_OUTPUT_1; > } else { > *Mode = GPIO_MODE_OUTPUT_0; > -- > 2.7.4 > Correct Ard's email address. Regards Haojian