From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail05.groups.io (mail05.groups.io [45.79.224.7]) by spool.mail.gandi.net (Postfix) with ESMTPS id 2CE65D800F0 for ; Thu, 6 Mar 2025 22:58:08 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=z0Uvy02wS+SLMGCOh8qHsCqX2EMVW+HGGohpjdLn6dQ=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Resent-Date:Resent-From:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20240830; t=1741301887; v=1; x=1741561086; b=O2xIThh+i0JT25W2X4zLVkRIySfgOnC0TcVipj124zng3g3kh6+xaGf9Ms9gA8Qa0ZdanenG KPApbmGTK958+VgyE+GUSiGFWU5UuBWDpePx52TBFLze7J+ELBXgwcwRiHZFJB11ySju4xENKIV TnDtKXoIH/KWafMQlJBEz2A/VuLvAARzbMVSGximpeVewlmD9PElVgG/uwFqQLhCtOhaw6UkAcb CDpHpj8KJr49CZ3grcJaxmDDXYiKRZVFQ1E+08AwhLQWkaQBiYDsgMQhcWIVoTeP3Pztkl7tU4C VNtFldz5Ojnd7lwQfmkRsOWGYPfKPXoUeVstBgtHP+8hg== X-Received: by 127.0.0.2 with SMTP id bHmPYY7687511xugyTDldlrt; Thu, 06 Mar 2025 14:58:06 -0800 X-Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by mx.groups.io with SMTP id smtpd.web10.1518.1741301885646710167 for ; Thu, 06 Mar 2025 14:58:05 -0800 X-Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 526GXFaV028476 for ; Thu, 6 Mar 2025 22:58:05 GMT X-Received: from mail-yb1-f198.google.com (mail-yb1-f198.google.com [209.85.219.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4577rpjh26-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Thu, 06 Mar 2025 22:58:04 +0000 (GMT) X-Received: by mail-yb1-f198.google.com with SMTP id 3f1490d57ef6-e60aebf48e8so1463746276.0 for ; Thu, 06 Mar 2025 14:58:04 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCV9qF6X+00VN933iFmFO6T913L4cHs3ejc6j3+2yWnLjuVrz4xWmro4hAq2RDXGQO6/v+0UnQ==@edk2.groups.io X-Gm-Message-State: VJt5nqwiSSN7CGH3Zk8RkSOix7686176AA= X-Gm-Gg: ASbGnctL/hLG6N49ax1A/lRrwZkKOXBTTWg5yqaK02eggopWVmeM8QjnpIrD8IVl2B9 /urCj9vP+3K8oz8t+w9S9GBLpoWqwki60og2oYwNlw5cBTRhKgNNkI/HPUhWJdkYfZvDRjuBXuy ZuYJdfk33LX+MxhDH2rRSNKKpwRDzK2w== X-Received: by 2002:a05:6902:2a8f:b0:e5a:e774:d238 with SMTP id 3f1490d57ef6-e635c121fabmr1570094276.2.1741301883979; Thu, 06 Mar 2025 14:58:03 -0800 (PST) X-Google-Smtp-Source: AGHT+IG2u8agk1BoPEvLQ/Nh0gUzLupqIrfx2M+1RL6MtxyufrivFpH//ANsrGVUaBpqKzypPaJV0NhZCF2VWUJtcdA= X-Received: by 2002:a05:6902:2a8f:b0:e5a:e774:d238 with SMTP id 3f1490d57ef6-e635c121fabmr1570080276.2.1741301883615; Thu, 06 Mar 2025 14:58:03 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: "Leif Lindholm via groups.io" Date: Thu, 6 Mar 2025 22:57:52 +0000 X-Gm-Features: AQ5f1JqNys6XuFSDW6Ugo4zWx4i9yfdo4te-8ArRv9n73XOmipVM-vw5D5cn0SE Message-ID: Subject: Re: [edk2-devel] 18 register support for SMC/SVC on AARCH64 To: Kun Qin Cc: Sami Mujawar , olivier.deprez@arm.com, yeoreum.yun@arm.com, edk2-devel-groups-io , Ard Biesheuvel X-Authority-Analysis: v=2.4 cv=EYQyQOmC c=1 sm=1 tr=0 ts=67ca287c cx=c_pps a=OxDXTYJfYfhXdKRNwaci0A==:117 a=IkcTkHD0fZMA:10 a=Vs1iUdzkB0EA:10 a=NEAV23lmAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=wziznt-9xxNT1MpXZOgA:9 a=QEXdDO2ut3YA:10 a=cxVRdw0VslE0MYWkNwNp:22 X-Proofpoint-ORIG-GUID: pcSmqCbHJ9kYQ3OdnnI2zllmuGyGSozd X-Proofpoint-GUID: pcSmqCbHJ9kYQ3OdnnI2zllmuGyGSozd Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Resent-Date: Thu, 06 Mar 2025 14:58:05 -0800 Resent-From: leif.lindholm@oss.qualcomm.com Reply-To: devel@edk2.groups.io,leif.lindholm@oss.qualcomm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20240830 header.b=O2xIThh+; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 45.79.224.7 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=pass (policy=none) header.from=groups.io Hi Kun, My point is this has nothing to do with FF-A or likeliness. It is architecturally broken just from an SMCCC standpoint. But yes, I would like to hear more from Arm about the specific concern. Regards, Leif On Thu, 6 Mar 2025 at 20:42, Kun Qin wrote: > > Hi Leif, > > Thanks for the input. I agree that platforms supporting FF-A v1.2+ will r= ely on SMCCC v1.1+, and thus platforms not supporting whole 18 register usa= ge are not complying with the spec. > > I think Sami, Levi, or Olivier could chime in for better insights on thei= r concerns about SPMC at EL3. As far as the setup we are using (Hafnium as = SPMC), the 18-register usage is good across all firmware entities. > > Regards, > Kun > > On Thu, Mar 6, 2025 at 1:42=E2=80=AFAM Leif Lindholm wrote: >> >> Hi Kun, >> >> On Thu, 6 Mar 2025 at 06:13, Kun Qin wrote: >> > >> > Hi ARM enthusiasts, >> > >> > I recently filed a PR to allow 18 register support for SMC/SVC calls b= etween UEFI and secure partition components: https://github.com/tianocore/e= dk2/pull/10685/files. >> > >> > The main purpose of this change is to allow more registers to hold val= ues while doing FF-A transactions. In FF-A spec v1.2 and onward, the sectio= n "FFA_MSG_SEND_DIRECT_REQ2" mentions that up to 18 general-purpose registe= rs can be used for such calls. However, the current SMC/SVC implementation = in EDK2 only supports up to 8 registers. >> > >> > There were some differing opinions on how to support this more properl= y. Could you please review the PR and chime in on the email thread about ho= w to proceed with it? >> > >> > TL;DR: >> > >> > In conversations with ARM stakeholders, they revealed concerns about u= sing 18 registers all along because some older firmware components on the s= ecure side do not support full 18 register usage, and the returned values m= ay not be sane. Therefore, there is a need for a build flag that controls h= ow many registers are used during SMC calls to be backwards compatible, whi= ch is the PcdSxcUse18Registers approach I went with in the PR. >> >> I'm not sure I follow this one (and this is very much the reason I >> asked for email thread breakout - thank you). >> Code that relies on the 18 registers is relying on SMCCC >=3D 1.1. >> If code is relying on SMCCC >=3D 1.1, then it must verify that the >> secure side supports that >> by making an SMCCC_VERSION call. >> If that returns NOT_SUPPORTED, or that the version is 1.0, then the >> fewer-registers calling >> conventions MUST be used. Otherwise, the 18-register variant is safe. >> Am I missing something? >> >> If we're talking about supporting secure sides that don't comply with >> the spec, then I think >> that should be very much a "deal with broken secure firmware quirk" >> and not a different >> library. >> And in that case, it seems to me platform ports that felt the need to >> deal with broken >> secure sides should opt into that, with special handling in the single l= ibrary. >> >> If we're talking about supporting edk2 code that doesn't sanity check >> the version, then >> I'd suggest we fix the buggy edk2 code instead. >> >> Best Regards, >> >> Leif >> >> > The original approach of using the PCD was to make it a feature flag s= o that all header files, assembly files, and C files will not even compile = the code that supports more than 8 registers if not needed. But that would = involve the PCDs getting pre-processed by the build framework, and all comp= onents using the ArmSmcLib would thus have to add the PCD in their inf file= s. So instead, we went with the runtime code evaluation. >> > >> > On the PR, Sami suggested creating a new interface that supports SMC w= ith 18 registers and making the PCD control which function to call. For FF-= A functions that only involve 8 registers or under, the caller should just = use the legacy interfaces. But the issue is, once Standalone MM hands off t= he control using an 8 register SMC call, it will only be able to process 8 = register incoming requests, which will not work if it is woken up by an FF= A_MSG_SEND_DIRECT_REQ2 call using 18 registers. >> > >> > Any input is appreciated. >> > >> > Regards, >> > Kun -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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