public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: Heyi Guo <heyi.guo@linaro.org>
To: Leif Lindholm <leif.lindholm@linaro.org>,
	 Linaro UEFI Mailman List <linaro-uefi@lists.linaro.org>,
	 "edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
	G Gregory <graeme.gregory@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Guoheyi <guoheyi@huawei.com>,
	 wanghuiqiang <wanghuiqiang@huawei.com>,
	Ming Huang <huangming23@huawei.com>,
	Jason Zhang <zhangjinsong2@huawei.com>,
	Mengfanrong <mengfanrong@huawei.com>,
	waip23@126.com
Subject: Re: [PATCH edk2-platforms v5 00/11] Improve D0x platforms and bug fix
Date: Sat, 30 Sep 2017 03:19:06 +0800	[thread overview]
Message-ID: <CAE3ZECrHsbbbm9TJ-aZ6FzqRp5T1cOxHoA+9_QG0_Bcuek6+8A@mail.gmail.com> (raw)
In-Reply-To: <1506655190-56231-1-git-send-email-heyi.guo@linaro.org>

On 2017/9/29 11:19, Heyi Guo wrote:

Code can also be found in
github:https://github.com/hisilicon/OpenPlatformPkg.git
branch: rp-1710-platforms-v5

Note:
1. There may be some minor issue (or even in SoC IP) that causes D05/3
into exception,
which was just found when we updated edk2 and edk2-platforms. We will
continue to investigate the issue.

This issue might be caused by below code:

---
a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
+++
b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
@@ -465,6 +465,10 @@ PciIoPciRead (
   Address = (UINT8 *)&Dev->ConfigSpace + Offset;
   Length = Count << ((UINTN)Width & 0x3);

+  if (Offset > sizeof (Dev->ConfigSpace)) {
+    Special process and return;
+  }
+
   if (Offset + Length > sizeof (Dev->ConfigSpace)) {
     //
     // Read all zeroes for config space accesses beyond the first

If the input Offset is larger than sizeof (Dev->ConfigSpace), we should not
go on the following code, or else the memory between Buffer + sizeof
(Dev->ConfigSpace) - Offset ~ Buffer will be seriously corrupted.

The bug will be triggered when the PCD PcdTurnOffUsbLegacySupport is true
and HcCapParams contains some value larger than 0x40, for EHCI controller.

We'd better also turn off this PCD for our platforms, since there are no
real ExtendCap registers for our EHCI controller.

However, even after fixing this, we still got another exception for
alignment fault, which needs addtional time to investigate.

Regards,

Heyi


It boot successfully by switch the VirtualEhciPciIo with old one.

2. The separate patch (Add AddressTranslationOffset support) is a
prerequisite for this series
   and it's source can also be found in above branch(rp-1710-platforms-v5).

Chenhui Sun (1):
  Hisilicon/D03: Disable the function of PerfTuning

Heyi Guo (4):
  Hisilicon/D05: Modify dsc and fdf file
  Hisilicon/D03: Modify dsc and fdf file
  Hisilicon: Fix the drivers use the same GUID issue
  Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase

Jason zhang (1):
  Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device.

Ming Huang (5):
  Hisilicon D03/D05: get firmware version from FIRMWARE_VER
  Hisilicon/D05/Pcie: fix bug of size definition
  D05/PCIe: Modify PcieRegionBase of secondary chip
  D05/ACPI: Disable D05 SAS0 and SAS2
  D05/ACPI: Modify I2C device

 Platform/Hisilicon/D02/EarlyConfigPeim/EarlyConfigPeim.inf
      |  2 +-
 Platform/Hisilicon/D02/FdtUpdateLibD02/FdtUpdateLib.inf
      |  2 +-
 Platform/Hisilicon/D02/Library/PlatformPciLib/PlatformPciLib.inf
      |  2 +-
 Platform/Hisilicon/D02/OemNicConfigD02/OemNicConfigD02.inf
      |  2 +-
 Platform/Hisilicon/D03/D03.dsc
      | 12 ++-
 Platform/Hisilicon/D03/D03.fdf
      |  4 +-
 Platform/Hisilicon/D03/Library/FdtUpdateLib/FdtUpdateLib.inf
      |  2 +-
 Platform/Hisilicon/D05/D05.dsc
      | 83 +++++++++--------
 Platform/Hisilicon/D05/D05.fdf
      |  4 +-
 Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
      |  2 +-
 Platform/Hisilicon/D05/Library/OemMiscLibD05/OemMiscLibD05.inf
      |  2 +-
 Platform/Hisilicon/D05/Library/PlatformPciLib/PlatformPciLib.inf
      |  2 +-
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.c
      | 38 ++++----
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciHostBridge.h
      |  7 ++
 Silicon/Hisilicon/Drivers/PciHostBridgeDxe/PciRootBridgeIo.c
      | 94 +++++++++++++++++++-
 Silicon/Hisilicon/Hi1610/Drivers/IoInitDxe/IoInitDxe.inf
      |  2 +-
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitDxe.inf
      |  3 +-
 Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
      | 50 -----------
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05I2c.asl
      | 20 +----
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
      |  8 +-
 Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
      | 10 +++
 Silicon/Hisilicon/HisiPkg.dec
      |  1 -
 Silicon/Hisilicon/Library/DS3231RealTimeClockLib/DS3231RealTimeClockLib.inf
|  2 +-
 Silicon/Hisilicon/Library/Dw8250SerialPortLib/Dw8250SerialPortLib.inf
      |  2 +-
 Silicon/Hisilicon/Library/I2CLib/I2CLib.inf
      |  2 +-
 Silicon/Hisilicon/Library/I2CLib/I2CLibRuntime.inf
      |  2 +-
 26 files changed, 203 insertions(+), 157 deletions(-)


  parent reply	other threads:[~2017-09-29 19:15 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-29  3:19 [PATCH edk2-platforms v5 00/11] Improve D0x platforms and bug fix Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 01/11] Hisilicon/D05: Modify dsc and fdf file Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 02/11] Hisilicon/D03: " Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 03/11] Hisilicon: Fix the drivers use the same GUID issue Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 04/11] Hisilicon D03/D05: get firmware version from FIRMWARE_VER Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 05/11] Hisilicon/PciHostBridgeDxe: Assign BAR resource from PciRegionBase Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 06/11] Hisilicon/D05/Pcie: fix bug of size definition Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 07/11] D05/PCIe: Modify PcieRegionBase of secondary chip Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 08/11] Hisilicon/D03: Disable the function of PerfTuning Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 09/11] D05/ACPI: Disable D05 SAS0 and SAS2 Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 10/11] D05/ACPI: Modify I2C device Heyi Guo
2017-09-29  3:19 ` [PATCH edk2-platforms v5 11/11] Hisilicon D03/D05: Enlarge iATU for RP with ARI capable device Heyi Guo
2017-09-29 19:19 ` Heyi Guo [this message]
2017-10-05 12:54 ` [PATCH edk2-platforms v5 00/11] Improve D0x platforms and bug fix Leif Lindholm

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAE3ZECrHsbbbm9TJ-aZ6FzqRp5T1cOxHoA+9_QG0_Bcuek6+8A@mail.gmail.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox