From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-in22.apple.com (mail-out22.apple.com [17.171.2.32]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D7A0582121 for ; Fri, 17 Feb 2017 08:43:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; d=apple.com; s=mailout2048s; c=relaxed/simple; q=dns/txt; i=@apple.com; t=1487349824; h=From:Sender:Reply-To:Subject:Date:Message-id:To:Cc:MIME-version:Content-type: Content-transfer-encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-reply-to:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=NNU9sfzw2QNG2ls4PCBJu0mE+1D6ZKBZxHpb5W5MBoQ=; b=uQV1Z+LO7V++O8w55OBex/DJzfUReRFAIVHwngiCkpJtSJPklQY4E7tuBvUBLCrz c50lgyNbj8mo83q9yWhfuOPCqkxUvECSqVUpBLWx5MlBdRdZXG///J8LEgINcu0X 7/uPUkKhAh92I5eAJEnzfetDY+YjID1G62zaRcvBN1H+3JKeG/7lXWs+vMxsMqWl l4veA+N+mnDxjO7Ahw+tw4oY8YMUukgjT14atTPuYcjOXu57bqapC9ZrOXw+mb7X CSV/RhjZsskFFKCvQd3OVWx2g2yVKT5omjIo7jdga/SiT5BUC2KvlHQ++wzAp4kd 9plsQYZmCbJi115DHICG7Q==; Received: from relay2.apple.com (relay2.apple.com [17.128.113.67]) by mail-in22.apple.com (Apple Secure Mail Relay) with SMTP id A8.90.13154.04827A85; Fri, 17 Feb 2017 08:43:44 -0800 (PST) X-AuditID: 11ab0216-f523c9a000003362-e9-58a72840a7b0 Received: from nwk-mmpp-sz10.apple.com (nwk-mmpp-sz10.apple.com [17.128.115.122]) by relay2.apple.com (Apple SCV relay) with SMTP id C4.16.11444.04827A85; Fri, 17 Feb 2017 08:43:44 -0800 (PST) MIME-version: 1.0 Received: from [17.153.70.48] (unknown [17.153.70.48]) by nwk-mmpp-sz10.apple.com (Oracle Communications Messaging Server 8.0.1.2.0 64bit (built Dec 14 2016)) with ESMTPSA id <0OLJ004WY2GV7K50@nwk-mmpp-sz10.apple.com>; Fri, 17 Feb 2017 08:43:44 -0800 (PST) Sender: afish@apple.com From: Andrew Fish In-reply-to: Date: Fri, 17 Feb 2017 08:43:42 -0800 Cc: edk2-devel@lists.01.org Message-id: References: To: Arka Sharma X-Mailer: Apple Mail (2.3226) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrJLMWRmVeSWpSXmKPExsUi2FDorOugsTzCoH+zscXmnh52iz2HjjI7 MHnsnHWX3aN79j+WAKYoLpuU1JzMstQifbsEroz7G38yF7yQrOhva2VtYPwl0sXIySEhYCJx Z8o7pi5GLg4hgX2MEr9uTGaHSZx8+BYqcYhR4tz742AJXgFBiR+T77F0MXJwMAuoS0yZkgtR 08Ek8W3yYlaQGmEBcYl3ZzYxQ9gWEh1bOplAbDYBZYkV8z+AzeEUCJb48vIIWA2LgKrEnPaP YDazgLTEw4nHWSFsbYkn7y6wQuy1kXhy5gkTyF4hgQCJiZtYQMIiQCf0353FCBKWEJCVmP3L C+L8DWwSTzYETmAUnoXk6FkIR89CMn8BI/MqRuHcxMwc3cw8IyO9xIKCnFS95PzcTYygsF7N JLaD8d5rw0OMAhyMSjy8HkLLI4RYE8uKK3MPMUpzsCiJ89rbLYsQEkhPLEnNTk0tSC2KLyrN SS0+xMjEwSnVwCgUWXlLdsW0pXPsRHSjdqRbBC+y8Tos0Cg3U26DdZdd1MTj0h56zVNueh/0 XbksY47xpgSWx/uvS8Um/M1tve5jsk6ZPS6mYP+tql3CU09f+9T1ZEredoU9u1nVNydzpTYW fN039/0n5y1/Yh/+X/C5XlXjX8msF03VLA/MmSvtgy+nC5fucVJiKc5INNRiLipOBACuujhO TAIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpgkeLIzCtJLcpLzFFi42IRbCiu0nXQWB5hcPeRsMXmnh52iz2HjjI7 MHnsnHWX3aN79j+WAKYoLpuU1JzMstQifbsEroz7G38yF7yQrOhva2VtYPwl0sXIySEhYCJx 8uFbJghbTOLCvfVsXYxcHEIChxglzr0/zg6S4BUQlPgx+R5LFyMHB7OAusSUKbkQNR1MEt8m L2YFqREWEJd4d2YTM4RtIdGxpRNsKJuAssSK+R/A5nAKBEt8eXkErIZFQFViTvtHMJtZQFri 4cTjrBC2tsSTdxdYIfbaSDw584QJZK+QQIDExE0sIGERoBP6785iBAlLCMhKzP7lNYFRcBaS Q2chHDoLycwFjMyrGAWKUnMSK430EgsKclL1kvNzNzGCw7PQeQfjsWVWhxgFOBiVeHgduJdH CLEmlhVX5gJDgoNZSYQ3Xw0oxJuSWFmVWpQfX1Sak1p8iDEZ6JOJzFKiyfnA2MkriTc0MTEw MTY2MzY2NzEnTVhJnDdFalmEkEB6YklqdmpqQWoRzBYmDk6pBsb1xgeiq22P7dg1ae4jjXRJ +xmR777031liu63VMcz+0plQqZyfVTe5TZ/cu/p8WeL7L/tsasM39O6/t13TXqIut85URbr0 E8OJ1itvv74RUfc+V7X4m8laTuVnDKWCdlJLpm1gco0+3fLC9HPiadGsbOE36fPtPwapaVxO vpj9g7/j0Yd6dR4lluKMREMt5qLiRABjSA3FkwIAAA== Subject: Re: Mapping of PrpList in NvmExpressDxe X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 17 Feb 2017 16:43:46 -0000 Content-type: text/plain; charset=utf-8 Content-transfer-encoding: quoted-printable > On Feb 17, 2017, at 5:54 AM, Arka Sharma = wrote: >=20 > I am wondering what is the reason for mapping the PrpList buffer with > EfiPciIoOperationBusMasterCommonBuffer, as host will fill the Prp > entries and after updating the submission queue doorbell device will > start processing the command and fetch the Prp entries. So I am > thinking the Prplist buffer could have been mapped as > EfiPciIoOperationBusMasterRead. Is there any reason for mapping it as > CommonBuffer that I am not able to figure out ? >=20 Arka, Good question. Historically there have been a lot of bugs in DMA code in = EFI. The reason being if you don't follow the rules the code still works = since DMA is so coherent in hardware on an x86 PC. This is not the case = for a lot of ARM platforms.=20 There is a good overview of UEFI DMA operations in the UEFI Spec PCI Bus = Support Chapter.=20 DMA Bus Master Read Operation =E2=80=A2 Call Map() for EfiPciOperationBusMasterRead or = EfiPciOperationBusMasterRead64. =E2=80=A2 Program the DMA Bus Master with the DeviceAddress returned by = Map(). =E2=80=A2 Start the DMA Bus Master. =E2=80=A2 Wait for DMA Bus Master to complete the read operation. =E2=80=A2 Call Unmap(). DMA Bus Master Write Operation =E2=80=A2 Call Map() for EfiPciOperationBusMasterWrite or = EfiPciOperationBusMasterRead64. =E2=80=A2 Program the DMA Bus Master with the DeviceAddress returned by = Map(). =E2=80=A2 Start the DMA Bus Master. =E2=80=A2 Wait for DMA Bus Master to complete the write operation. =E2=80=A2 Perform a PCI controller specific read transaction to flush = all PCI write buffers (See PCI Specification Section 3.2.5.2) . =E2=80=A2 Call Flush(). =E2=80=A2 Call Unmap(). DMA Bus Master Common Buffer Operation =E2=80=A2 Call AllocateBuffer() to allocate a common buffer. =E2=80=A2 Call Map() for EfiPciOperationBusMasterCommonBuffer or = EfiPciOperationBusMasterCommonBuffer64. =E2=80=A2 Program the DMA Bus Master with the DeviceAddress returned by = Map(). =E2=80=A2 The common buffer can now be accessed equally by the processor = and the DMA bus master. =E2=80=A2 Call Unmap(). =E2=80=A2 Call FreeBuffer(). So to answer your question. The Read and Write operations are one shot = on the buffer, while Common Buffer is a buffer that is DMA coherent and = can be reused. Thats probably why Common Buffer is used by the NVMe = driver.=20 Basically the common usage for the Read and Write mappings are the = caller passing a buffer (like a block on the disk). The Queues that run = DMA are common buffer as the PCI hardware and the CPU both need to = access them intermittently. To be clear for the read and write case the = CPU only has a coherent view of the buffer after the Unmap() is called.=20= I think the only way you can enforce most of the UEFI driver DMA rules = on x86 is to turn on an IOMMU that would cause faults if you don't = follow the rules. Basically you have the IOMMU fault on DMA transactions = to a buffer that is not following the rules above.=20 Thanks, Andrew Fish > Regards, > Arka > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel