From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::244; helo=mail-wr0-x244.google.com; envelope-from=roman.bacik@broadcom.com; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x244.google.com (mail-wr0-x244.google.com [IPv6:2a00:1450:400c:c0c::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 1CA9F2033D1B7 for ; Wed, 2 May 2018 11:08:10 -0700 (PDT) Received: by mail-wr0-x244.google.com with SMTP id p5-v6so14959718wre.12 for ; Wed, 02 May 2018 11:08:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=mime-version:from:date:message-id:subject:to:cc; bh=Jg9s5GPCJNmrYtNmBxEqxoEUTB5tbbw5TtFrLadbdXE=; b=INcuInHJ9Jjo6oDVrk0XgUBvsh7XFCOCxwaPLzg8/cPgKKpAPLweY6YnEYcsJ4MEfT kWZ4Fouk/d3GdPFNN+GHvFn+ZGU7Aun71sFzxT/8umtKplDF3DAjMf29pOe6ZMnSb6cR 1oA5pbkDHkgssF/LNpRKZvQ2V2MbejxJdvobE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=Jg9s5GPCJNmrYtNmBxEqxoEUTB5tbbw5TtFrLadbdXE=; b=MQ/LSsyzF+oK4vzmW+FSQtZNSJBeZlv50td7ZvIRpdXH6jwdoawSXWtP1aT9w1lTm5 lskUJFi5JuNR0cU4HbonYUIXURYXz3zTy7fJK7U1kIP37sKGxN0LEFcjkX8WSmgkPrEc 5hx2yDzXlY60vFgbGt2Coj+ClDISPVzcSDpihJWGuG89uFp+BPfpeZekjr2OxcXHSjGc 1ji4OA2T9kbd9su2gFVZObqpcDwB8XOfRDxDsoAMEVDQTMcGBYfVRj8d49rnRwBEiB25 rfpBeBeosrTb44Tf3VPTBFV+HK7hr3lnSlMLAbq1utI3KIesnPjQ3VAp0w6WOY1OA7Tq DQKg== X-Gm-Message-State: ALQs6tCZvWB49AOzCNiImk79zWj++dtPmP3wwdkgSVM49+65NOEwK7dn 5oMPB0n5nVgHbzJB15IU5dTc+6rkGMqJ7pVyqgqz9EbHovE= X-Google-Smtp-Source: AB8JxZpcd5qlk1Z3xqfwW13A4OLG1OjcfbpvQne1SQ67Rwf2zh43hr697ztEzyiZUjBex9wZ7M96TQ4gzqQdgqbLThU= X-Received: by 2002:adf:c3cd:: with SMTP id d13-v6mr11361460wrg.282.1525284489152; Wed, 02 May 2018 11:08:09 -0700 (PDT) MIME-Version: 1.0 Received: by 10.223.210.68 with HTTP; Wed, 2 May 2018 11:07:28 -0700 (PDT) From: Roman Bacik Date: Wed, 2 May 2018 11:07:28 -0700 Message-ID: To: edk2-devel@lists.01.org Cc: Ruiyu Ni , Vladimir Olovyannikov Subject: [PATCH v2] MdeModulePkg/Bus: Enable ascending resource list X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 May 2018 18:08:11 -0000 Content-Type: text/plain; charset="UTF-8" Some processors require resource list sorted in ascending order. Cc: Ruiyu Ni Cc: Vladimir Olovyannikov Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Roman Bacik --- MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf | 1 + .../Bus/Pci/PciBusDxe/PciResourceSupport.c | 43 ++++++++++++++++++---- MdeModulePkg/MdeModulePkg.dec | 3 ++ MdeModulePkg/MdeModulePkg.dsc | 1 + 4 files changed, 41 insertions(+), 7 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf index 97608bf..5cb3761 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf @@ -110,6 +110,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdMrIovSupport ## CONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration ## SOMETIMES_CONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdListAscending ## CONSUMES [UserExtensions.TianoCore."ExtraFiles"] PciBusDxeExtra.uni diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c index 2f713fc..45575fa 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciResourceSupport.c @@ -106,19 +106,30 @@ InsertResourceNode ( PCI_RESOURCE_NODE *Temp; UINT64 ResNodeAlignRest; UINT64 TempAlignRest; + BOOLEAN Ascending; ASSERT (Bridge != NULL); ASSERT (ResNode != NULL); - InsertHeadList (&Bridge->ChildList, &ResNode->Link); + Ascending = FeaturePcdGet (PcdListAscending); + + if (!Ascending) { + InsertHeadList (&Bridge->ChildList, &ResNode->Link); + CurrentLink = Bridge->ChildList.ForwardLink->ForwardLink; + } else { + CurrentLink = Bridge->ChildList.BackLink; + InsertTailList (&Bridge->ChildList, &ResNode->Link); + } - CurrentLink = Bridge->ChildList.ForwardLink->ForwardLink; while (CurrentLink != &Bridge->ChildList) { Temp = RESOURCE_NODE_FROM_LINK (CurrentLink); - if (ResNode->Alignment > Temp->Alignment) { + if ((Ascending && Temp->Alignment >= ResNode->Alignment) || + (!Ascending && ResNode->Alignment > Temp->Alignment)) { break; - } else if (ResNode->Alignment == Temp->Alignment) { + } + + if (!Ascending && ResNode->Alignment == Temp->Alignment) { ResNodeAlignRest = ResNode->Length & ResNode->Alignment; TempAlignRest = Temp->Length & Temp->Alignment; if ((ResNodeAlignRest == 0) || (ResNodeAlignRest >= TempAlignRest)) { @@ -128,7 +139,11 @@ InsertResourceNode ( SwapListEntries (&ResNode->Link, CurrentLink); - CurrentLink = ResNode->Link.ForwardLink; + if (Ascending) { + CurrentLink = ResNode->Link.BackLink; + } else { + CurrentLink = ResNode->Link.ForwardLink; + } } } @@ -1269,6 +1284,7 @@ ProgramBar ( EFI_PCI_IO_PROTOCOL *PciIo; UINT64 Address; UINT32 Address32; + BOOLEAN Ascending; ASSERT (Node->Bar < PCI_MAX_BAR); @@ -1282,6 +1298,7 @@ ProgramBar ( Address = 0; PciIo = &(Node->PciDev->PciIo); + Ascending = FeaturePcdGet (PcdListAscending); Address = Base + Node->Offset; @@ -1300,6 +1317,10 @@ ProgramBar ( case PciBarTypeMem32: case PciBarTypePMem32: + if (Ascending) { + Node->PciDev->PciBar[Node->Bar].BaseAddress = Address; + Address %= Base; + } PciIo->Pci.Write ( PciIo, EfiPciIoWidthUint32, @@ -1308,13 +1329,19 @@ ProgramBar ( &Address ); - Node->PciDev->PciBar[Node->Bar].BaseAddress = Address; + if (!Ascending) { + Node->PciDev->PciBar[Node->Bar].BaseAddress = Address; + } break; case PciBarTypeMem64: case PciBarTypePMem64: + if (Ascending) { + Node->PciDev->PciBar[Node->Bar].BaseAddress = Address; + Address %= Base; + } Address32 = (UINT32) (Address & 0x00000000FFFFFFFF); PciIo->Pci.Write ( @@ -1335,7 +1362,9 @@ ProgramBar ( &Address32 ); - Node->PciDev->PciBar[Node->Bar].BaseAddress = Address; + if (!Ascending) { + Node->PciDev->PciBar[Node->Bar].BaseAddress = Address; + } break; diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index cc39718..911f33a 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -1005,6 +1005,9 @@ # @Prompt Enable UEFI Stack Guard. gEfiMdeModulePkgTokenSpaceGuid.PcdCpuStackGuard|FALSE|BOOLEAN|0x30001055 + ## Indicates if the resource list is sorted in ascending order + gEfiMdeModulePkgTokenSpaceGuid.PcdListAscending|FALSE|BOOLEAN|0x30001056 + [PcdsFixedAtBuild, PcdsPatchableInModule] ## Dynamic type PCD can be registered callback function for Pcd setting action. # PcdMaxPeiPcdCallBackNumberPerPcdEntry indicates the maximum number of callback function diff --git a/MdeModulePkg/MdeModulePkg.dsc b/MdeModulePkg/MdeModulePkg.dsc index ec24a50..2dee860 100644 --- a/MdeModulePkg/MdeModulePkg.dsc +++ b/MdeModulePkg/MdeModulePkg.dsc @@ -200,6 +200,7 @@ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizeNonPopulateCapsule|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxSizePopulateCapsule|0x0 gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|28 + gEfiMdeModulePkgTokenSpaceGuid.PcdListAscending|FALSE [PcdsFixedAtBuild.IPF] gEfiMdePkgTokenSpaceGuid.PcdIoBlockBaseAddressForIpf|0x0ffffc000000 -- 2.7.4