From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-yb1-f177.google.com (mail-yb1-f177.google.com [209.85.219.177]) by mx.groups.io with SMTP id smtpd.web09.472.1635882682731469018 for ; Tue, 02 Nov 2021 12:51:23 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@corthon-com.20210112.gappssmtp.com header.s=20210112 header.b=7hjjDNFe; spf=pass (domain: gmail.com, ip: 209.85.219.177, mailfrom: debtech@gmail.com) Received: by mail-yb1-f177.google.com with SMTP id j75so1004128ybj.6 for ; Tue, 02 Nov 2021 12:51:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=corthon-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=grJ2bjcGfqlnwKpXzvrKgZ37W1xZq82i4WE7N9kOpMw=; b=7hjjDNFeE9/KChSU/qPucbPDBBAcTec4SZQVss6nmU/mb10FKZVD+ObdbTmK3oRarB V7mfgxJg9QQiSC+kl3xfzDASlSySjXhbYtfbSWGCqDv9gZ4yRmJvdjWDWIa3GZrWnuDF GgI1ie1oIcRYWb8P4eX3pMjwayCBKTFC9CQz2R9CmSsgu3Pu7vPhglhTGx2PRIQq7Uia RGD0ptjsUKZbNmfRhv+tczY+2zEqitJLmKShRAvB8Od9nX8QKlm9s0JXo1/AFhhm5+X5 mWa3WuOHOGt6IevBAVAtobSaNzpPhRKPDRQZrBbk8WNM08XA9en1k+o+jPs5VZx3R1f6 N51g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=grJ2bjcGfqlnwKpXzvrKgZ37W1xZq82i4WE7N9kOpMw=; b=LHPoqn7lFQgoCCqMcvzw0vxrA65tzVHZNt2kk1xKGW947gjE9Du4nfZSNfmrxm02X6 7Zm+hrfk3/pw8ridtqTZOtWXoGO/ak/fpUdSqdgF2kfarKtpBIcgV+APjOZB42De66bu p0+BdN2w6RO0MMnJQe/INoq2l3MUgSY0II5b1lkJaUUD/txyIIejOwbpcbQ+0Sk8IOR/ UUs+vxqFdeXw4kwWUzX0ZuGfvqvjIq0RVmTVfMifap/jX2lm0EHfIa+9zJpI+D+UKx+a QDzM8xkBmPbxy+ZsA+yLsQPsbnfAe7NIdQSma9c/c+TZxXoBvHCKngSlTJ69Kw8cHawr Ua2A== X-Gm-Message-State: AOAM530svsXNLLlWGUvaRKO8euIJ9L/gK9BB0RX2V9v9XTKPDPmkBkMN L3dUWuY3XG/CkN+lDraTQ3/RLCZak/PNp8SVQ48= X-Google-Smtp-Source: ABdhPJyop2/yXRDN7g2atyUJTIY9kqavvmBEVljljsndH/FLbn5d/z6x9I1zKbScRG1HKsUfyFN3XP9wnx41LkEgdGU= X-Received: by 2002:a25:800f:: with SMTP id m15mr32473791ybk.525.1635882681751; Tue, 02 Nov 2021 12:51:21 -0700 (PDT) MIME-Version: 1.0 References: <20211101195648.6420-1-brbarkel@microsoft.com> <20211101195648.6420-12-brbarkel@microsoft.com> <20211102095716.ucmiocmes3fsylge@leviathan> In-Reply-To: <20211102095716.ucmiocmes3fsylge@leviathan> From: "Bret Barkelew" Date: Tue, 2 Nov 2021 12:51:12 -0700 Message-ID: Subject: Re: [PATCH v1 11/16] ArmPkg: Add Basic MMU Lib for Arm silicon To: Leif Lindholm Cc: devel@edk2.groups.io, Ard Biesheuvel , Sean Brogan Content-Type: multipart/alternative; boundary="00000000000023de7b05cfd39e3a" --00000000000023de7b05cfd39e3a Content-Type: text/plain; charset="UTF-8" Will address. On Tue, Nov 2, 2021 at 2:57 AM Leif Lindholm wrote: > > On Mon, Nov 01, 2021 at 12:56:43 -0700, brbarkel@microsoft.com wrote: > > From: Sean Brogan > > > > REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3651 > > Some description please. > > > Cc: Leif Lindholm > > Cc: Ard Biesheuvel > > Cc: Sean Brogan > > Signed-off-by: Bret Barkelew > > --- > > ArmPkg/Library/MmuLib/MmuLib.c | 120 ++++++++++++++++++++ > > ArmPkg/ArmPkg.dsc | 1 + > > ArmPkg/Library/MmuLib/BaseMmuLib.inf | 30 +++++ > > 3 files changed, 151 insertions(+) > > > > diff --git a/ArmPkg/Library/MmuLib/MmuLib.c > b/ArmPkg/Library/MmuLib/MmuLib.c > > new file mode 100644 > > index 000000000000..7a6ba1f81819 > > --- /dev/null > > +++ b/ArmPkg/Library/MmuLib/MmuLib.c > > @@ -0,0 +1,120 @@ > > +/** @file > > +This library instance implements a very limited MMU Lib instance > > +for the ARM/AARCH64 architectures. This library shims a common library > > +interface to the ArmPkg defined ArmMmuLib.ib. > > - ib. ? > > > + > > +Copyright (c) Microsoft Corporation. > > +SPDX-License-Identifier: BSD-2-Clause-Patent > > + > > +**/ > > + > > +#include > > +#include > > +#include > > Please sort alphabetically. > > / > Leif > > > + > > +/** > > + Bitwise sets the memory attributes on a range of memory based on an > attributes mask. > > + > > + @param BaseAddress The start of the range for which to set > attributes. > > + @param Length The length of the range. > > + @param Attributes A bitmask of the attributes to set. See > "Physical memory > > + protection attributes" in UefiSpec.h > > + > > + @return EFI_SUCCESS > > + @return Others > > + > > +**/ > > +EFI_STATUS > > +EFIAPI > > +MmuSetAttributes ( > > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > > + IN UINT64 Length, > > + IN UINT64 Attributes > > + ) > > + { > > + EFI_STATUS Status; > > + > > + Status = EFI_UNSUPPORTED; > > + > > + if (Attributes & EFI_MEMORY_XP) { > > + Status = ArmSetMemoryRegionNoExec (BaseAddress, Length); > > + if (EFI_ERROR(Status)) { > > + DEBUG((DEBUG_ERROR, "%a - Failed to set NX. Status = %r\n", > __FUNCTION__, Status)); > > + } > > + } > > + > > + ASSERT_EFI_ERROR(Status); > > + return Status; > > + } > > + > > + > > +/** > > + Bitwise clears the memory attributes on a range of memory based on an > attributes mask. > > + > > + @param BaseAddress The start of the range for which to > clear attributes. > > + @param Length The length of the range. > > + @param Attributes A bitmask of the attributes to clear. > See "Physical memory > > + protection attributes" in UefiSpec.h > > + > > + @return EFI_SUCCESS > > + @return Others > > + > > +**/ > > +EFI_STATUS > > +EFIAPI > > +MmuClearAttributes ( > > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > > + IN UINT64 Length, > > + IN UINT64 Attributes > > + ) > > + { > > + EFI_STATUS Status; > > + > > + Status = EFI_UNSUPPORTED; > > + > > + if (Attributes & EFI_MEMORY_XP) { > > + Status = ArmClearMemoryRegionNoExec (BaseAddress, Length); > > + if (EFI_ERROR(Status)) { > > + DEBUG((DEBUG_ERROR, "%a - Failed to clear NX. Status = %r\n", > __FUNCTION__, Status)); > > + } > > + } > > + > > + if (Attributes & EFI_MEMORY_RO) { > > + Status = ArmClearMemoryRegionReadOnly(BaseAddress, Length); > > + if (EFI_ERROR(Status)) { > > + DEBUG((DEBUG_ERROR, "%a - Failed to clear RO. Status = %r\n", > __FUNCTION__, Status)); > > + } > > + } > > + > > + ASSERT_EFI_ERROR(Status); > > + return Status; > > + } > > + > > + > > +/** > > + Returns the memory attributes on a range of memory. > > + > > + @param BaseAddress The start of the range for which to set > attributes. > > + @param Attributes A return pointer for the attributes. > > + > > + @return EFI_SUCCESS > > + @return EFI_INVALID_PARAMETER A return pointer is NULL. > > + @return Others > > + > > +**/ > > +EFI_STATUS > > +EFIAPI > > +MmuGetAttributes ( > > + IN EFI_PHYSICAL_ADDRESS BaseAddress, > > + OUT UINT64 *Attributes > > + ) > > + { > > + EFI_STATUS Status; > > + > > + Status = EFI_UNSUPPORTED; > > + > > + DEBUG ((DEBUG_ERROR, "%a() API not implemented\n", __FUNCTION__)); > > + > > + ASSERT_EFI_ERROR(Status); > > + return Status; > > + } > > diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc > > index 06ede068f99d..cbc67daa7696 100644 > > --- a/ArmPkg/ArmPkg.dsc > > +++ b/ArmPkg/ArmPkg.dsc > > @@ -165,3 +165,4 @@ [Components.AARCH64] > > > > [Components.AARCH64, Components.ARM] > > ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.inf > > + ArmPkg/Library/MmuLib/BaseMmuLib.inf > > diff --git a/ArmPkg/Library/MmuLib/BaseMmuLib.inf > b/ArmPkg/Library/MmuLib/BaseMmuLib.inf > > new file mode 100644 > > index 000000000000..15095abee9c3 > > --- /dev/null > > +++ b/ArmPkg/Library/MmuLib/BaseMmuLib.inf > > @@ -0,0 +1,30 @@ > > +## @file > > +# This library instance implements a very limited MMU Lib instance > > +# for the ARM/AARCH64 architectures. This library shims a common > library > > +# interface to the ArmPkg defined ArmMmuLib. > > +# > > +# Copyright (c) Microsoft Corporation. > > +# > > +# SPDX-License-Identifier: BSD-2-Clause-Patent > > +# > > +## > > + > > +[Defines] > > + INF_VERSION = 0x00010005 > > + BASE_NAME = MmuLib > > + FILE_GUID = 6f2ee9a4-79b3-4b77-9a47-e2bd4b917b75 > > + MODULE_TYPE = BASE > > + VERSION_STRING = 1.0 > > + LIBRARY_CLASS = MmuLib > > + > > +[Sources] > > + MmuLib.c > > + > > +[Packages] > > + MdePkg/MdePkg.dec > > + MdeModulePkg/MdeModulePkg.dec > > + ArmPkg/ArmPkg.dec > > + > > +[LibraryClasses] > > + DebugLib > > + ArmMmuLib > > -- > > 2.31.1.windows.1 > > > --00000000000023de7b05cfd39e3a Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Will address.

On Tue, Nov 2, 2021 at 2:57 AM Leif Lindholm = <leif@nuviainc.com> wrote:

On Mon, Nov 01, 2021 at 12:56:43 -0700, brbarkel@microsoft.com wrote:
> From: Sean Brogan <sean.brogan@microsoft.com>
>
> REF: https://bugzilla.tianocore.org/show_b= ug.cgi?id=3D3651

Some description please.

> Cc: Leif Lindholm <leif@nuviainc.com>
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Sean Brogan <sean.brogan@microsoft.com>
> Signed-off-by: Bret Barkelew <bret.barkelew@microsoft.com>
> ---
>=C2=A0 ArmPkg/Library/MmuLib/MmuLib.c=C2=A0 =C2=A0 =C2=A0 =C2=A0| 120 += +++++++++++++++++++
>=C2=A0 ArmPkg/ArmPkg.dsc=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 |=C2=A0 =C2=A01 +
>=C2=A0 ArmPkg/Library/MmuLib/BaseMmuLib.inf |=C2=A0 30 +++++
>=C2=A0 3 files changed, 151 insertions(+)
>
> diff --git a/ArmPkg/Library/MmuLib/MmuLib.c b/ArmPkg/Library/MmuLib/Mm= uLib.c
> new file mode 100644
> index 000000000000..7a6ba1f81819
> --- /dev/null
> +++ b/ArmPkg/Library/MmuLib/MmuLib.c
> @@ -0,0 +1,120 @@
> +/** @file
> +This library instance implements a very limited MMU Lib instance
> +for the ARM/AARCH64 architectures.=C2=A0 This library shims a common = library
> +interface to the ArmPkg defined ArmMmuLib.ib.

- ib. ?

> +
> +Copyright (c) Microsoft Corporation.
> +SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Library/MmuLib.h>
> +#include <Library/ArmMmuLib.h>
> +#include <Library/DebugLib.h>

Please sort alphabetically.

/
=C2=A0 =C2=A0 Leif

> +
> +/**
> +=C2=A0 Bitwise sets the memory attributes on a range of memory based = on an attributes mask.
> +
> +=C2=A0 @param=C2=A0 BaseAddress=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0The start of the range for which to set attributes.
> +=C2=A0 @param=C2=A0 Length=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 The length of the range.
> +=C2=A0 @param=C2=A0 Attributes=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 A bitmask of the attributes to set. See "Physical memory
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 protection attributes" in U= efiSpec.h
> +
> +=C2=A0 @return EFI_SUCCESS
> +=C2=A0 @return Others
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +MmuSetAttributes (
> +=C2=A0 IN=C2=A0 EFI_PHYSICAL_ADDRESS=C2=A0 =C2=A0 =C2=A0 BaseAddress,=
> +=C2=A0 IN=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 Length,
> +=C2=A0 IN=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 Attributes
> +=C2=A0 )
> +=C2=A0 {
> +=C2=A0 =C2=A0 EFI_STATUS Status;
> +
> +=C2=A0 =C2=A0 Status =3D EFI_UNSUPPORTED;
> +
> +=C2=A0 =C2=A0 if (Attributes & EFI_MEMORY_XP) {
> +=C2=A0 =C2=A0 =C2=A0 Status =3D ArmSetMemoryRegionNoExec (BaseAddress= , Length);
> +=C2=A0 =C2=A0 =C2=A0 if (EFI_ERROR(Status)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 DEBUG((DEBUG_ERROR, "%a - Failed to = set NX.=C2=A0 Status =3D %r\n", __FUNCTION__, Status));
> +=C2=A0 =C2=A0 =C2=A0 }
> +=C2=A0 =C2=A0 }
> +
> +=C2=A0 =C2=A0 ASSERT_EFI_ERROR(Status);
> +=C2=A0 =C2=A0 return Status;
> +=C2=A0 }
> +
> +
> +/**
> +=C2=A0 Bitwise clears the memory attributes on a range of memory base= d on an attributes mask.
> +
> +=C2=A0 @param=C2=A0 BaseAddress=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0The start of the range for which to clear attributes.
> +=C2=A0 @param=C2=A0 Length=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 The length of the range.
> +=C2=A0 @param=C2=A0 Attributes=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 A bitmask of the attributes to clear. See "Physical memory
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 protection attributes" in U= efiSpec.h
> +
> +=C2=A0 @return EFI_SUCCESS
> +=C2=A0 @return Others
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +MmuClearAttributes (
> +=C2=A0 IN=C2=A0 EFI_PHYSICAL_ADDRESS=C2=A0 =C2=A0 =C2=A0 BaseAddress,=
> +=C2=A0 IN=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 Length,
> +=C2=A0 IN=C2=A0 UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 Attributes
> +=C2=A0 )
> +=C2=A0 {
> +=C2=A0 =C2=A0 EFI_STATUS Status;
> +
> +=C2=A0 =C2=A0 Status =3D EFI_UNSUPPORTED;
> +
> +=C2=A0 =C2=A0 if (Attributes & EFI_MEMORY_XP) {
> +=C2=A0 =C2=A0 =C2=A0 Status =3D ArmClearMemoryRegionNoExec (BaseAddre= ss, Length);
> +=C2=A0 =C2=A0 =C2=A0 if (EFI_ERROR(Status)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 DEBUG((DEBUG_ERROR, "%a - Failed to = clear NX.=C2=A0 Status =3D %r\n", __FUNCTION__, Status));
> +=C2=A0 =C2=A0 =C2=A0 }
> +=C2=A0 =C2=A0 }
> +
> +=C2=A0 =C2=A0 if (Attributes & EFI_MEMORY_RO) {
> +=C2=A0 =C2=A0 =C2=A0 Status =3D ArmClearMemoryRegionReadOnly(BaseAddr= ess, Length);
> +=C2=A0 =C2=A0 =C2=A0 if (EFI_ERROR(Status)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 DEBUG((DEBUG_ERROR, "%a - Failed to = clear RO.=C2=A0 Status =3D %r\n", __FUNCTION__, Status));
> +=C2=A0 =C2=A0 =C2=A0 }
> +=C2=A0 =C2=A0 }
> +
> +=C2=A0 =C2=A0 ASSERT_EFI_ERROR(Status);
> +=C2=A0 =C2=A0 return Status;
> +=C2=A0 }
> +
> +
> +/**
> +=C2=A0 Returns the memory attributes on a range of memory.
> +
> +=C2=A0 @param=C2=A0 BaseAddress=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0The start of the range for which to set attributes.
> +=C2=A0 @param=C2=A0 Attributes=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 A return pointer for the attributes.
> +
> +=C2=A0 @return EFI_SUCCESS
> +=C2=A0 @return EFI_INVALID_PARAMETER=C2=A0 =C2=A0A return pointer is = NULL.
> +=C2=A0 @return Others
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +MmuGetAttributes (
> +=C2=A0 IN=C2=A0 EFI_PHYSICAL_ADDRESS=C2=A0 =C2=A0 =C2=A0 BaseAddress,=
> +=C2=A0 OUT UINT64=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 *Attributes
> +=C2=A0 )
> +=C2=A0 {
> +=C2=A0 =C2=A0 EFI_STATUS Status;
> +
> +=C2=A0 =C2=A0 Status =3D EFI_UNSUPPORTED;
> +
> +=C2=A0 =C2=A0 DEBUG ((DEBUG_ERROR, "%a() API not implemented\n&q= uot;, __FUNCTION__));
> +
> +=C2=A0 =C2=A0 ASSERT_EFI_ERROR(Status);
> +=C2=A0 =C2=A0 return Status;
> +=C2=A0 }
> diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
> index 06ede068f99d..cbc67daa7696 100644
> --- a/ArmPkg/ArmPkg.dsc
> +++ b/ArmPkg/ArmPkg.dsc
> @@ -165,3 +165,4 @@ [Components.AARCH64]
>=C2=A0
>=C2=A0 [Components.AARCH64, Components.ARM]
>=C2=A0 =C2=A0 ArmPkg/Library/StandaloneMmMmuLib/ArmMmuStandaloneMmLib.i= nf
> +=C2=A0 ArmPkg/Library/MmuLib/BaseMmuLib.inf
> diff --git a/ArmPkg/Library/MmuLib/BaseMmuLib.inf b/ArmPkg/Library/Mmu= Lib/BaseMmuLib.inf
> new file mode 100644
> index 000000000000..15095abee9c3
> --- /dev/null
> +++ b/ArmPkg/Library/MmuLib/BaseMmuLib.inf
> @@ -0,0 +1,30 @@
> +## @file
> +# This library instance implements a very limited MMU Lib instance > +# for the ARM/AARCH64 architectures.=C2=A0 This library shims a commo= n library
> +# interface to the ArmPkg defined ArmMmuLib.
> +#
> +# Copyright (c) Microsoft Corporation.
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> +=C2=A0 INF_VERSION=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D 0x00010005
> +=C2=A0 BASE_NAME=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =3D MmuLib
> +=C2=A0 FILE_GUID=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =3D 6f2ee9a4-79b3-4b77-9a47-e2bd4b917b75
> +=C2=A0 MODULE_TYPE=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =3D BASE
> +=C2=A0 VERSION_STRING=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0=3D 1.0
> +=C2=A0 LIBRARY_CLASS=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =3D MmuLib
> +
> +[Sources]
> +=C2=A0 MmuLib.c
> +
> +[Packages]
> +=C2=A0 MdePkg/MdePkg.dec
> +=C2=A0 MdeModulePkg/MdeModulePkg.dec
> +=C2=A0 ArmPkg/ArmPkg.dec
> +
> +[LibraryClasses]
> +=C2=A0 DebugLib
> +=C2=A0 ArmMmuLib
> --
> 2.31.1.windows.1
>
--00000000000023de7b05cfd39e3a--