From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 75CAF740034 for ; Tue, 23 Jan 2024 08:58:54 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=pe5tlQpcPw+7vFVv7G1IZOqNqudEMsQh6MSUEoAvpk0=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1706000333; v=1; b=KuVag+I/9rRSzagyevOxeR1bC4XjxFQNqt/Gp3feEtik9SSdh/l3dyI1UwDA2BzOr9dLB9bE igof6blDM/cnEm9kbErM/0gFuDHrCz88qU0u5/UNr1i3FAWNSHrC3Ls7xjt1+AZ2GMsz+k5pwCm BuZs3vdIVTtKRDYUFuibbL/o= X-Received: by 127.0.0.2 with SMTP id xs1PYY7687511xWH19FwfjZR; Tue, 23 Jan 2024 00:58:53 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.7805.1706000332184961557 for ; Tue, 23 Jan 2024 00:58:52 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 25E18113E for ; Tue, 23 Jan 2024 00:59:37 -0800 (PST) X-Received: from mail-pj1-f54.google.com (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A693C3FBB1 for ; Tue, 23 Jan 2024 00:58:51 -0800 (PST) X-Received: by mail-pj1-f54.google.com with SMTP id 98e67ed59e1d1-2906dffd8ddso2165936a91.3 for ; Tue, 23 Jan 2024 00:58:51 -0800 (PST) X-Gm-Message-State: 4kZY0jFN2iVgOmY0dfg6Xk9gx7686176AA= X-Google-Smtp-Source: AGHT+IHxSxIguz8+3DhL4RkunBCNA5BFeIZ10HCfRcVbTgyLR57q9Mjz4TrpIzmPBmyqV3ieksUlUq6xyeFuVT79zvE= X-Received: by 2002:a17:90a:ea0d:b0:290:c0c:9cdc with SMTP id w13-20020a17090aea0d00b002900c0c9cdcmr2903614pjy.69.1706000330970; Tue, 23 Jan 2024 00:58:50 -0800 (PST) MIME-Version: 1.0 References: <20240104131616.474492-1-sahil@arm.com> <20240104131616.474492-2-sahil@arm.com> In-Reply-To: <20240104131616.474492-2-sahil@arm.com> From: "sahil" Date: Tue, 23 Jan 2024 14:28:39 +0530 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A To: devel@edk2.groups.io Cc: Ard Biesheuvel , Sami Mujawar , Sahil Kaushal , quic_llindhol@quicinc.com, thomas.abraham@arm.com Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sahil@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b="KuVag+I/"; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Hi All, Please find the links to previous discussions below : V1 - https://edk2.groups.io/g/devel/topic/96088980#100022 V2 - https://edk2.groups.io/g/devel/topic/96671861#103652 V3 - https://edk2.groups.io/g/devel/topic/100912169#112452 Thanks, Sahil On Thu, 4 Jan 2024 at 18:46, sahil wrote: > > NT_FW_CONFIG DTB contains platform information passed by TF-A boot > stage. This patch enables support to first extract address of > NT_FW_CONFIG and then pass it to other modules as a PPI. > > Signed-off-by: sahil > --- > Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 5 ++++- > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 3 ++- > Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 9 ++++++--- > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c | 12 +++++++++++- > Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S | 4 +++- > 5 files changed, 26 insertions(+), 7 deletions(-) > > diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > index d59f25a5b915..c04162e7e7cd 100644 > --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec > @@ -1,7 +1,7 @@ > ## @file > # Describes the entire platform configuration. > # > -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.
> +# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -83,3 +83,6 @@ > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004F > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x00000050 > gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051 > + > +[Ppis] > + gArmNeoverseN1SocParameterPpiGuid = { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } } > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > index 96e590cdd810..ead7f11ec964 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf > @@ -1,7 +1,7 @@ > ## @file > # Platform Library for N1Sdp. > # > -# Copyright (c) 2018-2021, ARM Limited. All rights reserved.
> +# Copyright (c) 2018-2024, ARM Limited. All rights reserved.
> # > # SPDX-License-Identifier: BSD-2-Clause-Patent > # > @@ -63,3 +63,4 @@ > > [Ppis] > gArmMpCoreInfoPpiGuid > + gArmNeoverseN1SocParameterPpiGuid > diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > index 097160c7e2d1..2bddf5007431 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2018 - 2020, ARM Limited. All rights reserved. > +* Copyright (c) 2018 - 2024, ARM Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -55,12 +55,15 @@ > typedef struct { > /*! 0 - Single Chip, 1 - Chip to Chip (C2C) */ > UINT8 MultichipMode; > - /*! Slave count in C2C mode */ > - UINT8 SlaveCount; > + /*! Secondary chip count in C2C mode */ > + UINT8 SecondaryChipCount; > /*! Local DDR memory size in GigaBytes */ > UINT8 LocalDdrSize; > /*! Remote DDR memory size in GigaBytes */ > UINT8 RemoteDdrSize; > } NEOVERSEN1SOC_PLAT_INFO; > > +typedef struct { > + CONST VOID *NtFwConfig; > +} NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI; > #endif > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > index c0effd37f333..e8568b7a039b 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c > @@ -1,6 +1,6 @@ > /** @file > > - Copyright (c) 2018-2021, ARM Limited. All rights reserved.
> + Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
> > SPDX-License-Identifier: BSD-2-Clause-Patent > > @@ -8,8 +8,12 @@ > > #include > #include > +#include > #include > > +UINT64 gArgNtFwConfigDtPtr; > +STATIC NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI mNeoverseN1SocParameterPpi; > + > STATIC ARM_CORE_INFO mCoreInfoTable[] = { > { 0x0, 0x0 }, // Cluster 0, Core 0 > { 0x0, 0x1 }, // Cluster 0, Core 1 > @@ -46,6 +50,7 @@ ArmPlatformInitialize ( > IN UINTN MpId > ) > { > + mNeoverseN1SocParameterPpi.NtFwConfig = (VOID *)gArgNtFwConfigDtPtr; > return RETURN_SUCCESS; > } > > @@ -80,6 +85,11 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = { > EFI_PEI_PPI_DESCRIPTOR_PPI, > &gArmMpCoreInfoPpiGuid, > &mMpCoreInfoPpi > + }, > + { > + EFI_PEI_PPI_DESCRIPTOR_PPI, > + &gArmNeoverseN1SocParameterPpiGuid, > + &mNeoverseN1SocParameterPpi > } > }; > > diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > index 8d2069dea837..828c383d6892 100644 > --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved. > +* Copyright (c) 2019 - 2024, ARM Limited. All rights reserved. > * > * SPDX-License-Identifier: BSD-2-Clause-Patent > * > @@ -25,6 +25,8 @@ GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) > // the UEFI firmware through the CPU registers. > // > ASM_PFX(ArmPlatformPeiBootAction): > + adr x10, gArgNtFwConfigDtPtr > + str x0, [x10] > ret > > // > -- > 2.25.1 > > > > ------------ > Groups.io Links: You receive all messages sent to this group. > View/Reply Online (#113164): https://edk2.groups.io/g/devel/message/113164 > Mute This Topic: https://groups.io/mt/103521643/7175337 > Group Owner: devel+owner@edk2.groups.io > Unsubscribe: https://edk2.groups.io/g/devel/unsub [sahilkaushal05@gmail.com] > ------------ > > -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#114184): https://edk2.groups.io/g/devel/message/114184 Mute This Topic: https://groups.io/mt/103521643/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-