* [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A
2024-01-04 13:16 [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG sahil
@ 2024-01-04 13:16 ` sahil
2024-01-23 8:58 ` sahil
2024-03-01 14:02 ` Sami Mujawar
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module sahil
` (4 subsequent siblings)
5 siblings, 2 replies; 16+ messages in thread
From: sahil @ 2024-01-04 13:16 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Leif Lindholm, Sami Mujawar, Sahil Kaushal
NT_FW_CONFIG DTB contains platform information passed by TF-A boot
stage. This patch enables support to first extract address of
NT_FW_CONFIG and then pass it to other modules as a PPI.
Signed-off-by: sahil <sahil@arm.com>
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 5 ++++-
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 3 ++-
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 9 ++++++---
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c | 12 +++++++++++-
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S | 4 +++-
5 files changed, 26 insertions(+), 7 deletions(-)
diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
index d59f25a5b915..c04162e7e7cd 100644
--- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
@@ -1,7 +1,7 @@
## @file
# Describes the entire platform configuration.
#
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -83,3 +83,6 @@
gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004F
gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x00000050
gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051
+
+[Ppis]
+ gArmNeoverseN1SocParameterPpiGuid = { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } }
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
index 96e590cdd810..ead7f11ec964 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
@@ -1,7 +1,7 @@
## @file
# Platform Library for N1Sdp.
#
-# Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018-2024, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -63,3 +63,4 @@
[Ppis]
gArmMpCoreInfoPpiGuid
+ gArmNeoverseN1SocParameterPpiGuid
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 097160c7e2d1..2bddf5007431 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
+* Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -55,12 +55,15 @@
typedef struct {
/*! 0 - Single Chip, 1 - Chip to Chip (C2C) */
UINT8 MultichipMode;
- /*! Slave count in C2C mode */
- UINT8 SlaveCount;
+ /*! Secondary chip count in C2C mode */
+ UINT8 SecondaryChipCount;
/*! Local DDR memory size in GigaBytes */
UINT8 LocalDdrSize;
/*! Remote DDR memory size in GigaBytes */
UINT8 RemoteDdrSize;
} NEOVERSEN1SOC_PLAT_INFO;
+typedef struct {
+ CONST VOID *NtFwConfig;
+} NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI;
#endif
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
index c0effd37f333..e8568b7a039b 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -8,8 +8,12 @@
#include <Library/ArmPlatformLib.h>
#include <Library/BaseLib.h>
+#include <NeoverseN1Soc.h>
#include <Ppi/ArmMpCoreInfo.h>
+UINT64 gArgNtFwConfigDtPtr;
+STATIC NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI mNeoverseN1SocParameterPpi;
+
STATIC ARM_CORE_INFO mCoreInfoTable[] = {
{ 0x0, 0x0 }, // Cluster 0, Core 0
{ 0x0, 0x1 }, // Cluster 0, Core 1
@@ -46,6 +50,7 @@ ArmPlatformInitialize (
IN UINTN MpId
)
{
+ mNeoverseN1SocParameterPpi.NtFwConfig = (VOID *)gArgNtFwConfigDtPtr;
return RETURN_SUCCESS;
}
@@ -80,6 +85,11 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
EFI_PEI_PPI_DESCRIPTOR_PPI,
&gArmMpCoreInfoPpiGuid,
&mMpCoreInfoPpi
+ },
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gArmNeoverseN1SocParameterPpiGuid,
+ &mNeoverseN1SocParameterPpi
}
};
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
index 8d2069dea837..828c383d6892 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved.
+* Copyright (c) 2019 - 2024, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -25,6 +25,8 @@ GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
// the UEFI firmware through the CPU registers.
//
ASM_PFX(ArmPlatformPeiBootAction):
+ adr x10, gArgNtFwConfigDtPtr
+ str x0, [x10]
ret
//
--
2.25.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A sahil
@ 2024-01-23 8:58 ` sahil
2024-03-01 14:02 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: sahil @ 2024-01-23 8:58 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Sami Mujawar, Sahil Kaushal, quic_llindhol,
thomas.abraham
Hi All,
Please find the links to previous discussions below :
V1 -
https://edk2.groups.io/g/devel/topic/96088980#100022
V2 -
https://edk2.groups.io/g/devel/topic/96671861#103652
V3 -
https://edk2.groups.io/g/devel/topic/100912169#112452
Thanks,
Sahil
On Thu, 4 Jan 2024 at 18:46, sahil <sahil@arm.com> wrote:
>
> NT_FW_CONFIG DTB contains platform information passed by TF-A boot
> stage. This patch enables support to first extract address of
> NT_FW_CONFIG and then pass it to other modules as a PPI.
>
> Signed-off-by: sahil <sahil@arm.com>
> ---
> Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 5 ++++-
> Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 3 ++-
> Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 9 ++++++---
> Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c | 12 +++++++++++-
> Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S | 4 +++-
> 5 files changed, 26 insertions(+), 7 deletions(-)
>
> diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> index d59f25a5b915..c04162e7e7cd 100644
> --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> @@ -1,7 +1,7 @@
> ## @file
> # Describes the entire platform configuration.
> #
> -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
> +# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -83,3 +83,6 @@
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio32Translation|0x40000000000|UINT64|0x0000004F
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation|0x40000000000|UINT64|0x00000050
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051
> +
> +[Ppis]
> + gArmNeoverseN1SocParameterPpiGuid = { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } }
> diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
> index 96e590cdd810..ead7f11ec964 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
> +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
> @@ -1,7 +1,7 @@
> ## @file
> # Platform Library for N1Sdp.
> #
> -# Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
> +# Copyright (c) 2018-2024, ARM Limited. All rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -63,3 +63,4 @@
>
> [Ppis]
> gArmMpCoreInfoPpiGuid
> + gArmNeoverseN1SocParameterPpiGuid
> diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> index 097160c7e2d1..2bddf5007431 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> @@ -1,6 +1,6 @@
> /** @file
> *
> -* Copyright (c) 2018 - 2020, ARM Limited. All rights reserved.
> +* Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -55,12 +55,15 @@
> typedef struct {
> /*! 0 - Single Chip, 1 - Chip to Chip (C2C) */
> UINT8 MultichipMode;
> - /*! Slave count in C2C mode */
> - UINT8 SlaveCount;
> + /*! Secondary chip count in C2C mode */
> + UINT8 SecondaryChipCount;
> /*! Local DDR memory size in GigaBytes */
> UINT8 LocalDdrSize;
> /*! Remote DDR memory size in GigaBytes */
> UINT8 RemoteDdrSize;
> } NEOVERSEN1SOC_PLAT_INFO;
>
> +typedef struct {
> + CONST VOID *NtFwConfig;
> +} NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI;
> #endif
> diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
> index c0effd37f333..e8568b7a039b 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
> +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2018-2021, ARM Limited. All rights reserved.<BR>
> + Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -8,8 +8,12 @@
>
> #include <Library/ArmPlatformLib.h>
> #include <Library/BaseLib.h>
> +#include <NeoverseN1Soc.h>
> #include <Ppi/ArmMpCoreInfo.h>
>
> +UINT64 gArgNtFwConfigDtPtr;
> +STATIC NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI mNeoverseN1SocParameterPpi;
> +
> STATIC ARM_CORE_INFO mCoreInfoTable[] = {
> { 0x0, 0x0 }, // Cluster 0, Core 0
> { 0x0, 0x1 }, // Cluster 0, Core 1
> @@ -46,6 +50,7 @@ ArmPlatformInitialize (
> IN UINTN MpId
> )
> {
> + mNeoverseN1SocParameterPpi.NtFwConfig = (VOID *)gArgNtFwConfigDtPtr;
> return RETURN_SUCCESS;
> }
>
> @@ -80,6 +85,11 @@ EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
> EFI_PEI_PPI_DESCRIPTOR_PPI,
> &gArmMpCoreInfoPpiGuid,
> &mMpCoreInfoPpi
> + },
> + {
> + EFI_PEI_PPI_DESCRIPTOR_PPI,
> + &gArmNeoverseN1SocParameterPpiGuid,
> + &mNeoverseN1SocParameterPpi
> }
> };
>
> diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
> index 8d2069dea837..828c383d6892 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
> +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/AArch64/Helper.S
> @@ -1,6 +1,6 @@
> /** @file
> *
> -* Copyright (c) 2019 - 2020, ARM Limited. All rights reserved.
> +* Copyright (c) 2019 - 2024, ARM Limited. All rights reserved.
> *
> * SPDX-License-Identifier: BSD-2-Clause-Patent
> *
> @@ -25,6 +25,8 @@ GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> // the UEFI firmware through the CPU registers.
> //
> ASM_PFX(ArmPlatformPeiBootAction):
> + adr x10, gArgNtFwConfigDtPtr
> + str x0, [x10]
> ret
>
> //
> --
> 2.25.1
>
>
>
> ------------
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>
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A sahil
2024-01-23 8:58 ` sahil
@ 2024-03-01 14:02 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: Sami Mujawar @ 2024-03-01 14:02 UTC (permalink / raw)
To: sahil, devel
[-- Attachment #1: Type: text/plain, Size: 518 bytes --]
Hi Sahil,
Thank you for this patch.
These changes look good to me.
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module
2024-01-04 13:16 [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG sahil
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A sahil
@ 2024-01-04 13:16 ` sahil
2024-01-23 9:11 ` sahil
2024-03-01 14:23 ` Sami Mujawar
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp sahil
` (3 subsequent siblings)
5 siblings, 2 replies; 16+ messages in thread
From: sahil @ 2024-01-04 13:16 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Leif Lindholm, Sami Mujawar, Sahil Kaushal
This patch adds a PEI to parse NT_FW_CONFIG and pass it to
other PEI modules(as PPI) and DXE modules(as HOB).
Signed-off-by: sahil <sahil@arm.com>
---
Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf | 41 ++++++
Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c | 132 ++++++++++++++++++++
2 files changed, 173 insertions(+)
diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
new file mode 100644
index 000000000000..363351b5a1df
--- /dev/null
+++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
@@ -0,0 +1,41 @@
+## @file
+# This PEI module parse the NtFwConfig for N1Sdp platform and produce
+# the PPI and HOB.
+#
+# Copyright (c) 2024, ARM Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = N1SdpNtFwConfigPei
+ FILE_GUID = CE76D56C-D3A5-4763-9138-DF09E1D1B614
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ ENTRY_POINT = NtFwConfigPeEntryPoint
+
+[Sources]
+ NtFwConfigPei.c
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ DebugLib
+ FdtLib
+ HobLib
+ PeimEntryPoint
+
+[Ppis]
+ gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid
+ gArmNeoverseN1SocParameterPpiGuid
+
+[Guids]
+ gArmNeoverseN1SocPlatformInfoDescriptorGuid
+
+[Depex]
+ gArmNeoverseN1SocParameterPpiGuid
diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c
new file mode 100644
index 000000000000..330377d21a79
--- /dev/null
+++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c
@@ -0,0 +1,132 @@
+/** @file
+
+ Copyright (c) 2024, ARM Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PeiServicesLib.h>
+
+#include <NeoverseN1Soc.h>
+#include <libfdt.h>
+
+STATIC EFI_PEI_PPI_DESCRIPTOR mPpi;
+
+/**
+ The entrypoint of the module, parse NtFwConfig and produce the PPI and HOB.
+
+ @param[in] FileHandle Handle of the file being invoked.
+ @param[in] PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Either no NT_FW_CONFIG was given by EL3 firmware
+ OR the N1Sdp FDT HOB was successfully created.
+ @retval EFI_NOT_FOUND Error processing the DTB
+ @retval EFI_OUT_OF_RESOURCES Could not allocate memory for the HOB
+ @retval * Other errors are possible.
+**/
+EFI_STATUS
+EFIAPI
+NtFwConfigPeEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ CONST NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI *ParamPpi;
+ CONST UINT32 *Property;
+ INT32 Offset;
+ NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
+ INT32 Status;
+
+ PlatInfo = BuildGuidHob (
+ &gArmNeoverseN1SocPlatformInfoDescriptorGuid,
+ sizeof (*PlatInfo)
+ );
+
+ if (PlatInfo == NULL) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to allocate platform info HOB\n",
+ gEfiCallerBaseName
+ ));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = PeiServicesLocatePpi (
+ &gArmNeoverseN1SocParameterPpiGuid,
+ 0,
+ NULL,
+ (VOID **)&ParamPpi
+ );
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to locate gArmNeoverseN1SocParameterPpiGuid - %r\n",
+ gEfiCallerBaseName,
+ Status
+ ));
+ return Status;
+ }
+
+ if (fdt_check_header (ParamPpi->NtFwConfig) != 0) {
+ DEBUG ((DEBUG_ERROR, "Invalid DTB file %p passed\n", ParamPpi->NtFwConfig));
+ return EFI_NOT_FOUND;
+ }
+
+ Offset = fdt_subnode_offset (ParamPpi->NtFwConfig, 0, "platform-info");
+ if (Offset == -FDT_ERR_NOTFOUND) {
+ DEBUG ((DEBUG_ERROR, "Invalid DTB : platform-info node not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "local-ddr-size", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "local-ddr-size property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->LocalDdrSize = fdt32_to_cpu (*Property);
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "remote-ddr-size", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "remote-ddr-size property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->RemoteDdrSize = fdt32_to_cpu (*Property);
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "secondary-chip-count", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "secondary-chip-count property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->SecondaryChipCount = fdt32_to_cpu (*Property);
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "multichip-mode", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "multichip-mode property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->MultichipMode = fdt32_to_cpu (*Property);
+
+ mPpi.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ mPpi.Guid = &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid;
+ mPpi.Ppi = PlatInfo;
+
+ Status = PeiServicesInstallPpi (&mPpi);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to install PEI service - %r\n",
+ gEfiCallerBaseName,
+ Status
+ ));
+ }
+
+ return Status;
+}
--
2.25.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module sahil
@ 2024-01-23 9:11 ` sahil
2024-03-01 14:23 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: sahil @ 2024-01-23 9:11 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Sami Mujawar, Sahil Kaushal, thomas.abraham,
quic_llindhol
Hi All,
Please find the links to previous discussions below :
V1 -
https://edk2.groups.io/g/devel/topic/96088980#100022
V2 -
https://edk2.groups.io/g/devel/topic/96671861#103652
V3 -
https://edk2.groups.io/g/devel/topic/100912169#112452
Thanks,
Sahil
On Thu, 4 Jan 2024 at 18:46, sahil <sahil@arm.com> wrote:
>
> This patch adds a PEI to parse NT_FW_CONFIG and pass it to
> other PEI modules(as PPI) and DXE modules(as HOB).
>
> Signed-off-by: sahil <sahil@arm.com>
> ---
> Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf | 41 ++++++
> Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c | 132 ++++++++++++++++++++
> 2 files changed, 173 insertions(+)
>
> diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
> new file mode 100644
> index 000000000000..363351b5a1df
> --- /dev/null
> +++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
> @@ -0,0 +1,41 @@
> +## @file
> +# This PEI module parse the NtFwConfig for N1Sdp platform and produce
> +# the PPI and HOB.
> +#
> +# Copyright (c) 2024, ARM Limited. All rights reserved.<BR>
> +#
> +# SPDX-License-Identifier: BSD-2-Clause-Patent
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x0001001B
> + BASE_NAME = N1SdpNtFwConfigPei
> + FILE_GUID = CE76D56C-D3A5-4763-9138-DF09E1D1B614
> + MODULE_TYPE = PEIM
> + VERSION_STRING = 1.0
> + ENTRY_POINT = NtFwConfigPeEntryPoint
> +
> +[Sources]
> + NtFwConfigPei.c
> +
> +[Packages]
> + EmbeddedPkg/EmbeddedPkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> +
> +[LibraryClasses]
> + DebugLib
> + FdtLib
> + HobLib
> + PeimEntryPoint
> +
> +[Ppis]
> + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid
> + gArmNeoverseN1SocParameterPpiGuid
> +
> +[Guids]
> + gArmNeoverseN1SocPlatformInfoDescriptorGuid
> +
> +[Depex]
> + gArmNeoverseN1SocParameterPpiGuid
> diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c
> new file mode 100644
> index 000000000000..330377d21a79
> --- /dev/null
> +++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c
> @@ -0,0 +1,132 @@
> +/** @file
> +
> + Copyright (c) 2024, ARM Limited. All rights reserved.<BR>
> + SPDX-License-Identifier: BSD-2-Clause-Patent
> +
> +**/
> +
> +#include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> +#include <Library/PeiServicesLib.h>
> +
> +#include <NeoverseN1Soc.h>
> +#include <libfdt.h>
> +
> +STATIC EFI_PEI_PPI_DESCRIPTOR mPpi;
> +
> +/**
> + The entrypoint of the module, parse NtFwConfig and produce the PPI and HOB.
> +
> + @param[in] FileHandle Handle of the file being invoked.
> + @param[in] PeiServices Describes the list of possible PEI Services.
> +
> + @retval EFI_SUCCESS Either no NT_FW_CONFIG was given by EL3 firmware
> + OR the N1Sdp FDT HOB was successfully created.
> + @retval EFI_NOT_FOUND Error processing the DTB
> + @retval EFI_OUT_OF_RESOURCES Could not allocate memory for the HOB
> + @retval * Other errors are possible.
> +**/
> +EFI_STATUS
> +EFIAPI
> +NtFwConfigPeEntryPoint (
> + IN EFI_PEI_FILE_HANDLE FileHandle,
> + IN CONST EFI_PEI_SERVICES **PeiServices
> + )
> +{
> + CONST NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI *ParamPpi;
> + CONST UINT32 *Property;
> + INT32 Offset;
> + NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> + INT32 Status;
> +
> + PlatInfo = BuildGuidHob (
> + &gArmNeoverseN1SocPlatformInfoDescriptorGuid,
> + sizeof (*PlatInfo)
> + );
> +
> + if (PlatInfo == NULL) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "[%a]: failed to allocate platform info HOB\n",
> + gEfiCallerBaseName
> + ));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + Status = PeiServicesLocatePpi (
> + &gArmNeoverseN1SocParameterPpiGuid,
> + 0,
> + NULL,
> + (VOID **)&ParamPpi
> + );
> +
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "[%a]: failed to locate gArmNeoverseN1SocParameterPpiGuid - %r\n",
> + gEfiCallerBaseName,
> + Status
> + ));
> + return Status;
> + }
> +
> + if (fdt_check_header (ParamPpi->NtFwConfig) != 0) {
> + DEBUG ((DEBUG_ERROR, "Invalid DTB file %p passed\n", ParamPpi->NtFwConfig));
> + return EFI_NOT_FOUND;
> + }
> +
> + Offset = fdt_subnode_offset (ParamPpi->NtFwConfig, 0, "platform-info");
> + if (Offset == -FDT_ERR_NOTFOUND) {
> + DEBUG ((DEBUG_ERROR, "Invalid DTB : platform-info node not found\n"));
> + return EFI_NOT_FOUND;
> + }
> +
> + Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "local-ddr-size", NULL);
> + if (Property == NULL) {
> + DEBUG ((DEBUG_ERROR, "local-ddr-size property not found\n"));
> + return EFI_NOT_FOUND;
> + }
> +
> + PlatInfo->LocalDdrSize = fdt32_to_cpu (*Property);
> +
> + Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "remote-ddr-size", NULL);
> + if (Property == NULL) {
> + DEBUG ((DEBUG_ERROR, "remote-ddr-size property not found\n"));
> + return EFI_NOT_FOUND;
> + }
> +
> + PlatInfo->RemoteDdrSize = fdt32_to_cpu (*Property);
> +
> + Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "secondary-chip-count", NULL);
> + if (Property == NULL) {
> + DEBUG ((DEBUG_ERROR, "secondary-chip-count property not found\n"));
> + return EFI_NOT_FOUND;
> + }
> +
> + PlatInfo->SecondaryChipCount = fdt32_to_cpu (*Property);
> +
> + Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "multichip-mode", NULL);
> + if (Property == NULL) {
> + DEBUG ((DEBUG_ERROR, "multichip-mode property not found\n"));
> + return EFI_NOT_FOUND;
> + }
> +
> + PlatInfo->MultichipMode = fdt32_to_cpu (*Property);
> +
> + mPpi.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI
> + | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
> + mPpi.Guid = &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid;
> + mPpi.Ppi = PlatInfo;
> +
> + Status = PeiServicesInstallPpi (&mPpi);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "[%a]: failed to install PEI service - %r\n",
> + gEfiCallerBaseName,
> + Status
> + ));
> + }
> +
> + return Status;
> +}
> --
> 2.25.1
>
>
>
> ------------
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> View/Reply Online (#113165): https://edk2.groups.io/g/devel/message/113165
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> ------------
>
>
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module sahil
2024-01-23 9:11 ` sahil
@ 2024-03-01 14:23 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: Sami Mujawar @ 2024-03-01 14:23 UTC (permalink / raw)
To: Sahil Kaushal, devel@edk2.groups.io
Cc: Ard Biesheuvel, Leif Lindholm, Sahil Kaushal, nd
Hi Sahil,
There are multiple items that need fixing in this patch. Also, the changes in Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec from Patch 3/4 must be part of this patch.
To save my time from reviewing the whole thing again, I am going to fix that before merging.
However, do find my response inline marked [SAMI] and please do go through my feedback so that you know what to look for next time.
Regards,
Sami Mujawar
On 04/01/2024, 13:16, "sahil" <sahil@arm.com <mailto:sahil@arm.com>> wrote:
This patch adds a PEI to parse NT_FW_CONFIG and pass it to
other PEI modules(as PPI) and DXE modules(as HOB).
Signed-off-by: sahil <sahil@arm.com <mailto:sahil@arm.com>>
---
Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf | 41 ++++++
Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c | 132 ++++++++++++++++++++
[SAMI] I think these files should be moved to Silicon/ARM/NeoverseN1Soc/Library/N1SdpNtFwConfigPei.
I will do that before merging.
2 files changed, 173 insertions(+)
diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
new file mode 100644
index 000000000000..363351b5a1df
--- /dev/null
+++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
@@ -0,0 +1,41 @@
+## @file
+# This PEI module parse the NtFwConfig for N1Sdp platform and produce
+# the PPI and HOB.
+#
+# Copyright (c) 2024, ARM Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = N1SdpNtFwConfigPei
+ FILE_GUID = CE76D56C-D3A5-4763-9138-DF09E1D1B614
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ ENTRY_POINT = NtFwConfigPeEntryPoint
+
+[Sources]
+ NtFwConfigPei.c
+
+[Packages]
+ EmbeddedPkg/EmbeddedPkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+
+[LibraryClasses]
+ DebugLib
+ FdtLib
+ HobLib
+ PeimEntryPoint
+
+[Ppis]
+ gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid
+ gArmNeoverseN1SocParameterPpiGuid
+
+[Guids]
+ gArmNeoverseN1SocPlatformInfoDescriptorGuid
+
+[Depex]
+ gArmNeoverseN1SocParameterPpiGuid
diff --git a/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c
new file mode 100644
index 000000000000..330377d21a79
--- /dev/null
+++ b/Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.c
@@ -0,0 +1,132 @@
+/** @file
+
+ Copyright (c) 2024, ARM Limited. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
+#include <Library/PeiServicesLib.h>
+
+#include <NeoverseN1Soc.h>
+#include <libfdt.h>
+
+STATIC EFI_PEI_PPI_DESCRIPTOR mPpi;
+
+/**
+ The entrypoint of the module, parse NtFwConfig and produce the PPI and HOB.
+
+ @param[in] FileHandle Handle of the file being invoked.
+ @param[in] PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS Either no NT_FW_CONFIG was given by EL3 firmware
+ OR the N1Sdp FDT HOB was successfully created.
[SAMI] Would it not be enough to say Success? The documentation for the function already mentions what is expected.
+ @retval EFI_NOT_FOUND Error processing the DTB
+ @retval EFI_OUT_OF_RESOURCES Could not allocate memory for the HOB
+ @retval * Other errors are possible.
+**/
+EFI_STATUS
+EFIAPI
+NtFwConfigPeEntryPoint (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ CONST NEOVERSEN1SOC_EL3_FW_HANDOFF_PARAM_PPI *ParamPpi;
+ CONST UINT32 *Property;
+ INT32 Offset;
+ NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
+ INT32 Status;
[SAMI] This should be EFI_STATUS.
+
+ PlatInfo = BuildGuidHob (
+ &gArmNeoverseN1SocPlatformInfoDescriptorGuid,
+ sizeof (*PlatInfo)
+ );
+
+ if (PlatInfo == NULL) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to allocate platform info HOB\n",
+ gEfiCallerBaseName
+ ));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ Status = PeiServicesLocatePpi (
+ &gArmNeoverseN1SocParameterPpiGuid,
+ 0,
+ NULL,
+ (VOID **)&ParamPpi
+ );
[SAMI] I think Locate PPI should be done fist, that way if it fails we do not allocate the HOB.
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to locate gArmNeoverseN1SocParameterPpiGuid - %r\n",
+ gEfiCallerBaseName,
+ Status
+ ));
+ return Status;
+ }
+
+ if (fdt_check_header (ParamPpi->NtFwConfig) != 0) {
[SAMI] There should be a check to see if ParamPpi is NULL. Also ParamPpi is dereferenced too many times in this function. It is advisable to have a local variable instead.
+ DEBUG ((DEBUG_ERROR, "Invalid DTB file %p passed\n", ParamPpi->NtFwConfig));
+ return EFI_NOT_FOUND;
+ }
+
+ Offset = fdt_subnode_offset (ParamPpi->NtFwConfig, 0, "platform-info");
+ if (Offset == -FDT_ERR_NOTFOUND) {
+ DEBUG ((DEBUG_ERROR, "Invalid DTB : platform-info node not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "local-ddr-size", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "local-ddr-size property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->LocalDdrSize = fdt32_to_cpu (*Property);
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "remote-ddr-size", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "remote-ddr-size property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->RemoteDdrSize = fdt32_to_cpu (*Property);
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "secondary-chip-count", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "secondary-chip-count property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->SecondaryChipCount = fdt32_to_cpu (*Property);
+
+ Property = fdt_getprop (ParamPpi->NtFwConfig, Offset, "multichip-mode", NULL);
+ if (Property == NULL) {
+ DEBUG ((DEBUG_ERROR, "multichip-mode property not found\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatInfo->MultichipMode = fdt32_to_cpu (*Property);
+
+ mPpi.Flags = EFI_PEI_PPI_DESCRIPTOR_PPI
+ | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST;
+ mPpi.Guid = &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid;
+ mPpi.Ppi = PlatInfo;
+
+ Status = PeiServicesInstallPpi (&mPpi);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to install PEI service - %r\n",
+ gEfiCallerBaseName,
+ Status
+ ));
+ }
+
+ return Status;
+}
--
2.25.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread
* [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp
2024-01-04 13:16 [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG sahil
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 1/4] Silicon/ARM/NeoverseN1Soc: Extract NT_FW_CONFIG address passed by TF-A sahil
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 2/4] Platform/ARM/N1Sdp: Add N1SdpNtFwConfigPei PEI module sahil
@ 2024-01-04 13:16 ` sahil
2024-01-23 9:14 ` sahil
2024-03-01 14:19 ` Sami Mujawar
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data sahil
` (2 subsequent siblings)
5 siblings, 2 replies; 16+ messages in thread
From: sahil @ 2024-01-04 13:16 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Leif Lindholm, Sami Mujawar, Sahil Kaushal
Incorporate N1SdpNtFwConfigPei PEI module which parses NT_FW_CONFIG and
passes it to other PEI modules(as PPI) and DXE modules(as HOB).
Signed-off-by: sahil <sahil@arm.com>
---
Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 3 +++
Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 ++++-
Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 3 ++-
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
index c04162e7e7cd..cca5bf45db67 100644
--- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
+++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
@@ -22,6 +22,8 @@
Include # Root include for the package
[Guids.common]
+ # ARM NeoverseN1Soc Platform Info descriptor
+ gArmNeoverseN1SocPlatformInfoDescriptorGuid = { 0x9fa16eb5, 0xce13, 0x4d37, { 0x96, 0xf0, 0x0a, 0xb5, 0xf1, 0xab, 0xff, 0x01 } }
gArmNeoverseN1SocTokenSpaceGuid = { 0xab93eb78, 0x60d7, 0x4099, { 0xac, 0xeb, 0x6d, 0xb5, 0x02, 0x58, 0x7c, 0x24 } }
[PcdsFixedAtBuild]
@@ -85,4 +87,5 @@
gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051
[Ppis]
+ gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid = { 0x21D04AD4, 0x4D23, 0x426D, { 0x8D, 0x3E, 0x92, 0x23, 0x3E, 0xF4, 0xB9, 0x5E } }
gArmNeoverseN1SocParameterPpiGuid = { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } }
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
index d04b22d3ef51..013a2e706e1a 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
@@ -4,7 +4,7 @@
# This provides platform specific component descriptions and libraries that
# conform to EFI/Framework standards.
#
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -228,6 +228,9 @@
# Platform driver
Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf
+ # PEI Phase modules
+ Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
+
# Human Interface Support
MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
index e5e24ea50294..4c4a6b193658 100644
--- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
+++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
@@ -1,7 +1,7 @@
## @file
# FDF file of N1Sdp
#
-# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
##
@@ -195,6 +195,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Core/Pei/PeiMain.inf
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
+ INF Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
--
2.25.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp sahil
@ 2024-01-23 9:14 ` sahil
2024-03-01 14:19 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: sahil @ 2024-01-23 9:14 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Sami Mujawar, Sahil Kaushal, quic_llindhol,
thomas.abraham
Hi All,
Please find the links to previous discussions below :
V1 -
https://edk2.groups.io/g/devel/topic/96088980#100022
V2 -
https://edk2.groups.io/g/devel/topic/96671861#103652
V3 -
https://edk2.groups.io/g/devel/topic/100912169#112452
Thanks,
Sahil
On Thu, 4 Jan 2024 at 18:46, sahil <sahil@arm.com> wrote:
>
> Incorporate N1SdpNtFwConfigPei PEI module which parses NT_FW_CONFIG and
> passes it to other PEI modules(as PPI) and DXE modules(as HOB).
>
> Signed-off-by: sahil <sahil@arm.com>
> ---
> Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec | 3 +++
> Platform/ARM/N1Sdp/N1SdpPlatform.dsc | 5 ++++-
> Platform/ARM/N1Sdp/N1SdpPlatform.fdf | 3 ++-
> 3 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> index c04162e7e7cd..cca5bf45db67 100644
> --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> @@ -22,6 +22,8 @@
> Include # Root include for the package
>
> [Guids.common]
> + # ARM NeoverseN1Soc Platform Info descriptor
> + gArmNeoverseN1SocPlatformInfoDescriptorGuid = { 0x9fa16eb5, 0xce13, 0x4d37, { 0x96, 0xf0, 0x0a, 0xb5, 0xf1, 0xab, 0xff, 0x01 } }
> gArmNeoverseN1SocTokenSpaceGuid = { 0xab93eb78, 0x60d7, 0x4099, { 0xac, 0xeb, 0x6d, 0xb5, 0x02, 0x58, 0x7c, 0x24 } }
>
> [PcdsFixedAtBuild]
> @@ -85,4 +87,5 @@
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00000051
>
> [Ppis]
> + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid = { 0x21D04AD4, 0x4D23, 0x426D, { 0x8D, 0x3E, 0x92, 0x23, 0x3E, 0xF4, 0xB9, 0x5E } }
> gArmNeoverseN1SocParameterPpiGuid = { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } }
> diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
> index d04b22d3ef51..013a2e706e1a 100644
> --- a/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
> +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.dsc
> @@ -4,7 +4,7 @@
> # This provides platform specific component descriptions and libraries that
> # conform to EFI/Framework standards.
> #
> -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
> +# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -228,6 +228,9 @@
> # Platform driver
> Platform/ARM/N1Sdp/Drivers/PlatformDxe/PlatformDxe.inf
>
> + # PEI Phase modules
> + Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
> +
> # Human Interface Support
> MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
>
> diff --git a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
> index e5e24ea50294..4c4a6b193658 100644
> --- a/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
> +++ b/Platform/ARM/N1Sdp/N1SdpPlatform.fdf
> @@ -1,7 +1,7 @@
> ## @file
> # FDF file of N1Sdp
> #
> -# Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
> +# Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> ##
> @@ -195,6 +195,7 @@ READ_LOCK_STATUS = TRUE
> INF MdeModulePkg/Core/Pei/PeiMain.inf
> INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
> INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
> + INF Platform/ARM/N1Sdp/Drivers/N1SdpNtFwConfigPei/NtFwConfigPei.inf
>
> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> --
> 2.25.1
>
>
>
> ------------
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> ------------
>
>
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp sahil
2024-01-23 9:14 ` sahil
@ 2024-03-01 14:19 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: Sami Mujawar @ 2024-03-01 14:19 UTC (permalink / raw)
To: sahil, devel
[-- Attachment #1: Type: text/plain, Size: 1802 bytes --]
Hi Sahil,
Thank you for this patch.
On Thu, Jan 4, 2024 at 05:16 AM, sahil wrote:
>
> diff --git a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> b/Silicon/ARM/Neov=
> erseN1Soc/NeoverseN1Soc.dec
> index c04162e7e7cd..cca5bf45db67 100644
> --- a/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> +++ b/Silicon/ARM/NeoverseN1Soc/NeoverseN1Soc.dec
> @@ -22,6 +22,8 @@
> Include # Root include for the package=0D
> =0D
> [Guids.common]=0D
> + # ARM NeoverseN1Soc Platform Info descriptor=0D
> + gArmNeoverseN1SocPlatformInfoDescriptorGuid =3D { 0x9fa16eb5, 0xce13,
> 0x=
> 4d37, { 0x96, 0xf0, 0x0a, 0xb5, 0xf1, 0xab, 0xff, 0x01 } }=0D
> gArmNeoverseN1SocTokenSpaceGuid =3D { 0xab93eb78, 0x60d7, 0x4099, { 0xac=
> , 0xeb, 0x6d, 0xb5, 0x02, 0x58, 0x7c, 0x24 } }=0D
> =0D
> [PcdsFixedAtBuild]=0D
> @@ -85,4 +87,5 @@
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber|2|UINT32|0x00=
> 000051=0D
> =0D
> [Ppis]=0D
> + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid =3D { 0x21D04AD4,
> 0x4D23,=
> 0x426D, { 0x8D, 0x3E, 0x92, 0x23, 0x3E, 0xF4, 0xB9, 0x5E } }=0D
> gArmNeoverseN1SocParameterPpiGuid =3D { 0x4DDD5A72, 0x31AD, 0x4B20, { 0x=
> 8F, 0x5F, 0xB3, 0xE8, 0x24, 0x6F, 0x80, 0x2B } }=0D
These changes should be part of patch 2/4. I am going to move this file to the correct patch before merging.
With that fixed,
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
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^ permalink raw reply [flat|nested] 16+ messages in thread
* [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data
2024-01-04 13:16 [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG sahil
` (2 preceding siblings ...)
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 3/4] Platform/ARM/N1Sdp: Enable N1SdpNtFwConfigPei PEI module for N1Sdp sahil
@ 2024-01-04 13:16 ` sahil
2024-01-23 9:14 ` sahil
2024-03-01 14:22 ` Sami Mujawar
2024-01-19 11:24 ` [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG Sami Mujawar
2024-03-04 14:38 ` Sami Mujawar
5 siblings, 2 replies; 16+ messages in thread
From: sahil @ 2024-01-04 13:16 UTC (permalink / raw)
To: devel; +Cc: Ard Biesheuvel, Leif Lindholm, Sami Mujawar, Sahil Kaushal
N1SdpNtFwConfigPei PEIM extracts platform information from NT_FW_CONFIG
and provides it to other modules as a PPI and a HOB. PlatformLibMem
then consumes these values in the form of a PPI during PEI phase and
ConfigurationManagerDxe as a HOB during DXE phase. The previous
approach of fetching platform information from a fixed address
is also removed in this patch.
Signed-off-by: sahil <sahil@arm.com>
---
Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 6 +++-
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 1 +
Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 5 ++-
Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 5 ---
Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 33 +++++++++---------
Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 35 +++++++++++++++-----
6 files changed, 55 insertions(+), 30 deletions(-)
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
index 4f8e7f13021a..e4aaed3e9dd5 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
@@ -1,7 +1,7 @@
## @file
# Configuration Manager Dxe
#
-# Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+# Copyright (c) 2021 - 2024, ARM Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -42,6 +42,7 @@
[LibraryClasses]
ArmPlatformLib
+ HobLib
PrintLib
UefiBootServicesTableLib
UefiDriverEntryPoint
@@ -170,5 +171,8 @@
gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation
gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber
+[Guids]
+ gArmNeoverseN1SocPlatformInfoDescriptorGuid
+
[Depex]
TRUE
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
index ead7f11ec964..e7af4c711817 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
@@ -64,3 +64,4 @@
[Ppis]
gArmMpCoreInfoPpiGuid
gArmNeoverseN1SocParameterPpiGuid
+ gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
index 303c38dcaee9..ea9cb20ba752 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2021-2024, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -302,6 +302,9 @@ typedef struct PlatformRepositoryInfo {
/// Memory Affinity Info
CM_ARM_MEMORY_AFFINITY_INFO MemAffInfo[DDR_REGION_COUNT];
+ /// N1Sdp Platform Info
+ NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
+
} EDKII_PLATFORM_REPOSITORY_INFO;
#endif // CONFIGURATION_MANAGER_H_
diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
index 2bddf5007431..5483e7bc5f68 100644
--- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
+++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
@@ -41,11 +41,6 @@
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C000000
#define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ 0x1300000
-// Base address to a structure of type NEOVERSEN1SOC_PLAT_INFO which is
-// pre-populated by a earlier boot stage
-#define NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE (NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + \
- 0x00008000)
-
/*
* Platform information structure stored in Non-secure SRAM. Platform
* information are passed from the trusted firmware with the below structure
diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
index fa6408a7dd1e..966a83294c00 100644
--- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
+++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
@@ -1,7 +1,7 @@
/** @file
Configuration Manager Dxe
- Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2021 - 2024, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -16,6 +16,7 @@
#include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
#include <Library/ArmLib.h>
#include <Library/DebugLib.h>
+#include <Library/HobLib.h>
#include <Library/IoLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootServicesTableLib.h>
@@ -1242,19 +1243,27 @@ InitializePlatformRepository (
IN EDKII_PLATFORM_REPOSITORY_INFO * CONST PlatRepoInfo
)
{
- NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
UINT64 Dram2Size;
UINT64 RemoteDdrSize;
+ VOID *PlatInfoHob;
+
+ PlatInfoHob = GetFirstGuidHob (&gArmNeoverseN1SocPlatformInfoDescriptorGuid);
+
+ if (PlatInfoHob == NULL) {
+ DEBUG ((DEBUG_ERROR, "Platform HOB is NULL\n"));
+ return EFI_NOT_FOUND;
+ }
+
+ PlatRepoInfo->PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)GET_GUID_HOB_DATA (PlatInfoHob);
RemoteDdrSize = 0;
- PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
- Dram2Size = ((PlatInfo->LocalDdrSize - 2) * SIZE_1GB);
+ Dram2Size = ((PlatRepoInfo->PlatInfo->LocalDdrSize - 2) * SIZE_1GB);
PlatRepoInfo->MemAffInfo[LOCAL_DDR_REGION2].Length = Dram2Size;
- if (PlatInfo->MultichipMode == 1) {
- RemoteDdrSize = ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
+ if (PlatRepoInfo->PlatInfo->MultichipMode == 1) {
+ RemoteDdrSize = ((UINT64)(PlatRepoInfo->PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
// Update Remote DDR Region1
PlatRepoInfo->MemAffInfo[REMOTE_DDR_REGION1].ProximityDomain = 1;
@@ -1512,7 +1521,6 @@ GetGicCInfo (
)
{
EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
- NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
UINT32 TotalObjCount;
UINT32 ObjIndex;
@@ -1523,9 +1531,8 @@ GetGicCInfo (
}
PlatformRepo = This->PlatRepoInfo;
- PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
- if (PlatInfo->MultichipMode == 1) {
+ if (PlatformRepo->PlatInfo->MultichipMode == 1) {
TotalObjCount = PLAT_CPU_COUNT * 2;
} else {
TotalObjCount = PLAT_CPU_COUNT;
@@ -1623,7 +1630,6 @@ GetStandardNameSpaceObject (
{
EFI_STATUS Status;
EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
- NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
UINT32 AcpiTableCount;
if ((This == NULL) || (CmObject == NULL)) {
@@ -1634,9 +1640,8 @@ GetStandardNameSpaceObject (
Status = EFI_NOT_FOUND;
PlatformRepo = This->PlatRepoInfo;
- PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
AcpiTableCount = ARRAY_SIZE (PlatformRepo->CmAcpiTableList);
- if (PlatInfo->MultichipMode == 0)
+ if (PlatformRepo->PlatInfo->MultichipMode == 0)
AcpiTableCount -= 1;
switch (GET_CM_OBJECT_ID (CmObjectId)) {
@@ -1697,7 +1702,6 @@ GetArmNameSpaceObject (
{
EFI_STATUS Status;
EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
- NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
UINT32 GicRedistCount;
UINT32 GicCpuCount;
UINT32 ProcHierarchyInfoCount;
@@ -1719,8 +1723,7 @@ GetArmNameSpaceObject (
PlatformRepo = This->PlatRepoInfo;
// Probe for multi chip information
- PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
- if (PlatInfo->MultichipMode == 1) {
+ if (PlatformRepo->PlatInfo->MultichipMode == 1) {
GicRedistCount = 2;
GicCpuCount = PLAT_CPU_COUNT * 2;
ProcHierarchyInfoCount = PLAT_PROC_HIERARCHY_NODE_COUNT * 2;
diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
index 9e8a1efc557d..80daedb33416 100644
--- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
+++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
@@ -1,6 +1,6 @@
/** @file
- Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
+ Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
@@ -10,6 +10,7 @@
#include <Library/DebugLib.h>
#include <Library/HobLib.h>
#include <Library/MemoryAllocationLib.h>
+#include <Library/PeiServicesLib.h>
#include <NeoverseN1Soc.h>
// The total number of descriptors, including the final "end-of-table" descriptor.
@@ -30,15 +31,33 @@ ArmPlatformGetVirtualMemoryMap (
IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap
)
{
- UINTN Index;
- ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
- EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
- NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
- UINT64 DramBlock2Size;
- UINT64 RemoteDdrSize;
+ UINTN Index;
+ ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
+ CONST NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
+ UINT64 DramBlock2Size;
+ UINT64 RemoteDdrSize;
+ EFI_STATUS Status;
Index = 0;
- PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
+
+ Status = PeiServicesLocatePpi (
+ &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid,
+ 0,
+ NULL,
+ (VOID **)&PlatInfo
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((
+ DEBUG_ERROR,
+ "[%a]: failed to locate gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid - %r\n",
+ gEfiCallerBaseName,
+ Status
+ ));
+ *VirtualMemoryMap = NULL;
+ return;
+ }
+
DramBlock2Size = ((UINT64)(PlatInfo->LocalDdrSize -
NEOVERSEN1SOC_DRAM_BLOCK1_SIZE / SIZE_1GB) *
(UINT64)SIZE_1GB);
--
2.25.1
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^ permalink raw reply related [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data sahil
@ 2024-01-23 9:14 ` sahil
2024-03-01 14:22 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: sahil @ 2024-01-23 9:14 UTC (permalink / raw)
To: devel
Cc: Ard Biesheuvel, Sami Mujawar, Sahil Kaushal, thomas.abraham,
quic_llindhol
Hi All,
Please find the links to previous discussions below :
V1 -
https://edk2.groups.io/g/devel/topic/96088980#100022
V2 -
https://edk2.groups.io/g/devel/topic/96671861#103652
V3 -
https://edk2.groups.io/g/devel/topic/100912169#112452
Thanks,
Sahil
On Thu, 4 Jan 2024 at 18:46, sahil <sahil@arm.com> wrote:
>
> N1SdpNtFwConfigPei PEIM extracts platform information from NT_FW_CONFIG
> and provides it to other modules as a PPI and a HOB. PlatformLibMem
> then consumes these values in the form of a PPI during PEI phase and
> ConfigurationManagerDxe as a HOB during DXE phase. The previous
> approach of fetching platform information from a fixed address
> is also removed in this patch.
>
> Signed-off-by: sahil <sahil@arm.com>
> ---
> Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf | 6 +++-
> Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf | 1 +
> Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h | 5 ++-
> Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h | 5 ---
> Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c | 33 +++++++++---------
> Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c | 35 +++++++++++++++-----
> 6 files changed, 55 insertions(+), 30 deletions(-)
>
> diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
> index 4f8e7f13021a..e4aaed3e9dd5 100644
> --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
> +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManagerDxe.inf
> @@ -1,7 +1,7 @@
> ## @file
> # Configuration Manager Dxe
> #
> -# Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
> +# Copyright (c) 2021 - 2024, ARM Limited. All rights reserved.<BR>
> #
> # SPDX-License-Identifier: BSD-2-Clause-Patent
> #
> @@ -42,6 +42,7 @@
>
> [LibraryClasses]
> ArmPlatformLib
> + HobLib
> PrintLib
> UefiBootServicesTableLib
> UefiDriverEntryPoint
> @@ -170,5 +171,8 @@
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieMmio64Translation
> gArmNeoverseN1SocTokenSpaceGuid.PcdRemotePcieSegmentNumber
>
> +[Guids]
> + gArmNeoverseN1SocPlatformInfoDescriptorGuid
> +
> [Depex]
> TRUE
> diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
> index ead7f11ec964..e7af4c711817 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
> +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLib.inf
> @@ -64,3 +64,4 @@
> [Ppis]
> gArmMpCoreInfoPpiGuid
> gArmNeoverseN1SocParameterPpiGuid
> + gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid
> diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
> index 303c38dcaee9..ea9cb20ba752 100644
> --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
> +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
> + Copyright (c) 2021-2024, ARM Limited. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -302,6 +302,9 @@ typedef struct PlatformRepositoryInfo {
> /// Memory Affinity Info
> CM_ARM_MEMORY_AFFINITY_INFO MemAffInfo[DDR_REGION_COUNT];
>
> + /// N1Sdp Platform Info
> + NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> +
> } EDKII_PLATFORM_REPOSITORY_INFO;
>
> #endif // CONFIGURATION_MANAGER_H_
> diff --git a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> index 2bddf5007431..5483e7bc5f68 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> +++ b/Silicon/ARM/NeoverseN1Soc/Include/NeoverseN1Soc.h
> @@ -41,11 +41,6 @@
> #define NEOVERSEN1SOC_EXP_PERIPH_BASE0 0x1C000000
> #define NEOVERSEN1SOC_EXP_PERIPH_BASE0_SZ 0x1300000
>
> -// Base address to a structure of type NEOVERSEN1SOC_PLAT_INFO which is
> -// pre-populated by a earlier boot stage
> -#define NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE (NEOVERSEN1SOC_NON_SECURE_SRAM_BASE + \
> - 0x00008000)
> -
> /*
> * Platform information structure stored in Non-secure SRAM. Platform
> * information are passed from the trusted firmware with the below structure
> diff --git a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
> index fa6408a7dd1e..966a83294c00 100644
> --- a/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
> +++ b/Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.c
> @@ -1,7 +1,7 @@
> /** @file
> Configuration Manager Dxe
>
> - Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
> + Copyright (c) 2021 - 2024, ARM Limited. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -16,6 +16,7 @@
> #include <IndustryStandard/SerialPortConsoleRedirectionTable.h>
> #include <Library/ArmLib.h>
> #include <Library/DebugLib.h>
> +#include <Library/HobLib.h>
> #include <Library/IoLib.h>
> #include <Library/PcdLib.h>
> #include <Library/UefiBootServicesTableLib.h>
> @@ -1242,19 +1243,27 @@ InitializePlatformRepository (
> IN EDKII_PLATFORM_REPOSITORY_INFO * CONST PlatRepoInfo
> )
> {
> - NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> UINT64 Dram2Size;
> UINT64 RemoteDdrSize;
> + VOID *PlatInfoHob;
> +
> + PlatInfoHob = GetFirstGuidHob (&gArmNeoverseN1SocPlatformInfoDescriptorGuid);
> +
> + if (PlatInfoHob == NULL) {
> + DEBUG ((DEBUG_ERROR, "Platform HOB is NULL\n"));
> + return EFI_NOT_FOUND;
> + }
> +
> + PlatRepoInfo->PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)GET_GUID_HOB_DATA (PlatInfoHob);
>
> RemoteDdrSize = 0;
>
> - PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
> - Dram2Size = ((PlatInfo->LocalDdrSize - 2) * SIZE_1GB);
> + Dram2Size = ((PlatRepoInfo->PlatInfo->LocalDdrSize - 2) * SIZE_1GB);
>
> PlatRepoInfo->MemAffInfo[LOCAL_DDR_REGION2].Length = Dram2Size;
>
> - if (PlatInfo->MultichipMode == 1) {
> - RemoteDdrSize = ((UINT64)(PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
> + if (PlatRepoInfo->PlatInfo->MultichipMode == 1) {
> + RemoteDdrSize = ((UINT64)(PlatRepoInfo->PlatInfo->RemoteDdrSize - 2) * SIZE_1GB);
>
> // Update Remote DDR Region1
> PlatRepoInfo->MemAffInfo[REMOTE_DDR_REGION1].ProximityDomain = 1;
> @@ -1512,7 +1521,6 @@ GetGicCInfo (
> )
> {
> EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> - NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> UINT32 TotalObjCount;
> UINT32 ObjIndex;
>
> @@ -1523,9 +1531,8 @@ GetGicCInfo (
> }
>
> PlatformRepo = This->PlatRepoInfo;
> - PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
>
> - if (PlatInfo->MultichipMode == 1) {
> + if (PlatformRepo->PlatInfo->MultichipMode == 1) {
> TotalObjCount = PLAT_CPU_COUNT * 2;
> } else {
> TotalObjCount = PLAT_CPU_COUNT;
> @@ -1623,7 +1630,6 @@ GetStandardNameSpaceObject (
> {
> EFI_STATUS Status;
> EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> - NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> UINT32 AcpiTableCount;
>
> if ((This == NULL) || (CmObject == NULL)) {
> @@ -1634,9 +1640,8 @@ GetStandardNameSpaceObject (
>
> Status = EFI_NOT_FOUND;
> PlatformRepo = This->PlatRepoInfo;
> - PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
> AcpiTableCount = ARRAY_SIZE (PlatformRepo->CmAcpiTableList);
> - if (PlatInfo->MultichipMode == 0)
> + if (PlatformRepo->PlatInfo->MultichipMode == 0)
> AcpiTableCount -= 1;
>
> switch (GET_CM_OBJECT_ID (CmObjectId)) {
> @@ -1697,7 +1702,6 @@ GetArmNameSpaceObject (
> {
> EFI_STATUS Status;
> EDKII_PLATFORM_REPOSITORY_INFO * PlatformRepo;
> - NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> UINT32 GicRedistCount;
> UINT32 GicCpuCount;
> UINT32 ProcHierarchyInfoCount;
> @@ -1719,8 +1723,7 @@ GetArmNameSpaceObject (
> PlatformRepo = This->PlatRepoInfo;
>
> // Probe for multi chip information
> - PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
> - if (PlatInfo->MultichipMode == 1) {
> + if (PlatformRepo->PlatInfo->MultichipMode == 1) {
> GicRedistCount = 2;
> GicCpuCount = PLAT_CPU_COUNT * 2;
> ProcHierarchyInfoCount = PLAT_PROC_HIERARCHY_NODE_COUNT * 2;
> diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
> index 9e8a1efc557d..80daedb33416 100644
> --- a/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
> +++ b/Silicon/ARM/NeoverseN1Soc/Library/PlatformLib/PlatformLibMem.c
> @@ -1,6 +1,6 @@
> /** @file
>
> - Copyright (c) 2018 - 2021, ARM Limited. All rights reserved.<BR>
> + Copyright (c) 2018 - 2024, ARM Limited. All rights reserved.<BR>
>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> @@ -10,6 +10,7 @@
> #include <Library/DebugLib.h>
> #include <Library/HobLib.h>
> #include <Library/MemoryAllocationLib.h>
> +#include <Library/PeiServicesLib.h>
> #include <NeoverseN1Soc.h>
>
> // The total number of descriptors, including the final "end-of-table" descriptor.
> @@ -30,15 +31,33 @@ ArmPlatformGetVirtualMemoryMap (
> IN ARM_MEMORY_REGION_DESCRIPTOR **VirtualMemoryMap
> )
> {
> - UINTN Index;
> - ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
> - EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
> - NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> - UINT64 DramBlock2Size;
> - UINT64 RemoteDdrSize;
> + UINTN Index;
> + ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
> + EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes;
> + CONST NEOVERSEN1SOC_PLAT_INFO *PlatInfo;
> + UINT64 DramBlock2Size;
> + UINT64 RemoteDdrSize;
> + EFI_STATUS Status;
>
> Index = 0;
> - PlatInfo = (NEOVERSEN1SOC_PLAT_INFO *)NEOVERSEN1SOC_PLAT_INFO_STRUCT_BASE;
> +
> + Status = PeiServicesLocatePpi (
> + &gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid,
> + 0,
> + NULL,
> + (VOID **)&PlatInfo
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((
> + DEBUG_ERROR,
> + "[%a]: failed to locate gArmNeoverseN1SocPlatformInfoDescriptorPpiGuid - %r\n",
> + gEfiCallerBaseName,
> + Status
> + ));
> + *VirtualMemoryMap = NULL;
> + return;
> + }
> +
> DramBlock2Size = ((UINT64)(PlatInfo->LocalDdrSize -
> NEOVERSEN1SOC_DRAM_BLOCK1_SIZE / SIZE_1GB) *
> (UINT64)SIZE_1GB);
> --
> 2.25.1
>
>
>
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>
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data sahil
2024-01-23 9:14 ` sahil
@ 2024-03-01 14:22 ` Sami Mujawar
1 sibling, 0 replies; 16+ messages in thread
From: Sami Mujawar @ 2024-03-01 14:22 UTC (permalink / raw)
To: sahil, devel
[-- Attachment #1: Type: text/plain, Size: 727 bytes --]
Hi Sahil,
Thank you for this patch.
This patch can clearly be split into 2, one for the Platform/ARM/N1Sdp/ConfigurationManager/ConfigurationManagerDxe/* changes and the other for the Silicon/ARM/NeoverseN1Soc/* changes.
I am going to do that before merging.
With that,
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
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^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG
2024-01-04 13:16 [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG sahil
` (3 preceding siblings ...)
2024-01-04 13:16 ` [edk2-devel] [edk2-platforms][PATCH V4 4/4] Silicon/ARM/NeoverseN1Soc: Consume N1SdpNtFwConfigPei supplied data sahil
@ 2024-01-19 11:24 ` Sami Mujawar
2024-03-04 14:38 ` Sami Mujawar
5 siblings, 0 replies; 16+ messages in thread
From: Sami Mujawar @ 2024-01-19 11:24 UTC (permalink / raw)
To: sahil, devel
[-- Attachment #1: Type: text/plain, Size: 1037 bytes --]
Hi Sahil,
On Thu, Jan 4, 2024 at 05:16 AM, sahil wrote:
>
> v4:
> - Fixed code review comments
> - Split the patch into four patches
Can you add git notes for the patches in the future, please? See https://github.com/tianocore/tianocore.github.io/wiki/Laszlo%27s-unkempt-git-guide-for-edk2-contributors-and-maintainers#contrib-30
Also, it would be of great help if you can add a link to the edk2 mailing list discussion that has taken place. I normally do that as it helps the maintainer locate the previous discussion easily.
For now, can you reply to the individual patches with the links to the previous discussion, please?
Regards,
Sami Mujawar
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^ permalink raw reply [flat|nested] 16+ messages in thread* Re: [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG
2024-01-04 13:16 [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG sahil
` (4 preceding siblings ...)
2024-01-19 11:24 ` [edk2-devel] [edk2-platforms][PATCH V4 0/4] Add support to parse NT_FW_CONFIG Sami Mujawar
@ 2024-03-04 14:38 ` Sami Mujawar
2024-03-04 14:40 ` Sami Mujawar
5 siblings, 1 reply; 16+ messages in thread
From: Sami Mujawar @ 2024-03-04 14:38 UTC (permalink / raw)
To: sahil, devel
[-- Attachment #1: Type: text/plain, Size: 552 bytes --]
As I mentioned in the individual patch reviews, I will be fixing things up before merging.
With that,
Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
Regards,
Sami Mujawar
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