From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f53.google.com (mail-ed1-f53.google.com [209.85.208.53]) by mx.groups.io with SMTP id smtpd.web11.1946.1675802997246662572 for ; Tue, 07 Feb 2023 12:49:57 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@gmail.com header.s=20210112 header.b=OkgdZ1sQ; spf=pass (domain: gmail.com, ip: 209.85.208.53, mailfrom: ritul.bits@gmail.com) Received: by mail-ed1-f53.google.com with SMTP id r3so8062158edq.13 for ; Tue, 07 Feb 2023 12:49:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=498aGMsphSo1MnfX5mB/FqnGB4wQtUgDfLzbjE9DWQA=; b=OkgdZ1sQsvnYTSUcnKojEbIPHl9DJ2ndtY0EzVV4yDKb/eRfHAC/63Rv6QeHo8JQSe ZPwtNnmSYLCJCrdruqR+ot498lKsS6tiBZa7kHzyWi3zd67Sb+RinBca41/qQmpVLfmc B/L8DBQI6kJDpTENrSaKVopE9PRzyELYSv52Pp/QXKlBmvMfBV9b2vl5S8LQQwGYdSkX nnyhniJZi1awsMVS5DC6AlBcFDQQnXLvm87lKPOnEjkA+PiN/XSlS8Hqy82jHT5ixtGY v1TG2D7WqH7/g508DLbFVwEWLmSftdVSPW8z0gAjP9WtK2MtYblnEheIDxX7auqIaACy qznw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=498aGMsphSo1MnfX5mB/FqnGB4wQtUgDfLzbjE9DWQA=; b=IS9y4MnDn5456akQaFjUbhqKn/NOrMRtRpdeRwL4zXmofhB8U/WuurVGwtg+kPTofM p76IUcgeKk3+OWVqnl/Obt4ghfGeQNszd/wqW+9M81+E1RemQnWYx/QQfKtHLyG0dcTZ EWSFcXHiQDljSNMCY2/cjIuw69VVRVlVdGlOjokuiRdHxlxYcvz3ipPFSQEwHobflXY8 aBUL+BizulU+SGls+RF0EqcDjAuWhHz7ftY0ucfquhcVR+IpWv8BDERpDwi2Zp8jqHAU b9kLrOir4CIgR1O28aDmaPk58VrPUstxfUl9KZcKuAJSGYrps0wnB2rF+/eciEQDDNg7 B8gA== X-Gm-Message-State: AO0yUKU1xc1dZFA3A6H+3TV8WLhuG1I+KmRZ7i+LH7zJKDad4p7q/FHF tazE9GEZFoPMPLwYC6MoE0vVRaplMRWIJC4h0hA= X-Google-Smtp-Source: AK7set8goMCh/cO95CxcvaejZ8OCpJfLON4vRmMawWNk7KY7gWp5krFW8g8BTRTPDCJtRWP04mjtBe6YHEa0RS8NFs4= X-Received: by 2002:a50:8a83:0:b0:4aa:9903:ec5f with SMTP id j3-20020a508a83000000b004aa9903ec5fmr1329933edj.54.1675802995552; Tue, 07 Feb 2023 12:49:55 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: ritul guru Date: Wed, 8 Feb 2023 02:19:43 +0530 Message-ID: Subject: Re: [edk2-devel] regarding uefipayload build warning for pcd To: Sean Rhodes Cc: devel@edk2.groups.io Content-Type: multipart/alternative; boundary="000000000000437a3505f4224a5b" --000000000000437a3505f4224a5b Content-Type: text/plain; charset="UTF-8" I do not get debug logs from edk2 payload even though debug payload is selected in menuconfig of coreboot. and also updated FD_BASE, if not then getting GCD assert while adding regions in phit table. below path should be give at L36 for custom edk2 repo? payloads/external/edk2/workspace/tianocore/ *Thanks & RegardsRitul Guru+91-9916513186* On Wed, Feb 8, 2023 at 2:06 AM Sean Rhodes wrote: > Why the edk2 changes? Just to fix this issue? > > Have you seen L36 of payloads/external/edk2/Kconfig > > On Tue, 7 Feb 2023 at 20:30, ritul guru wrote: > >> >> >> Loading driver 378D7B65-8DA9-4773-B6E4-A47826A833E1 >> InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 51A3E1C0 >> Loading driver at 0x00051DD1000 EntryPoint=0x00051DD5670 PcRtc.efi >> InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 51A3ED98 >> ProtectUefiImageCommon - 0x51A3E1C0 >> - 0x0000000051DD1000 - 0x0000000000008000 >> SetUefiImageMemoryAttributes - 0x0000000051DD1000 - 0x0000000000001000 >> (0x0000000000004008) >> SetUefiImageMemoryAttributes - 0x0000000051DD2000 - 0x0000000000006000 >> (0x0000000000020008) >> SetUefiImageMemoryAttributes - 0x0000000051DD8000 - 0x0000000000001000 >> (0x0000000000004008) >> PROGRESS CODE: V03040002 I0 >> >> ASSERT_EFI_ERROR (Status = Device Error) >> >> *ASSERT [PcRtc] >> /home//src/p/coreboot/payloads/external/edk2/workspace/tianocore/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c(1)* >> getting above assert after changed to FD_BASE to below value, >> This error is coming while booting to coreboot with edk2 payload: >> >> UefiPayloadPkg/UefiPayloadPkg.fdf >> DEFINE FD_BASE = 0x02182000 >> >> need to change FD_BASE, as it was going outside Available memory. >> any hint would be appreciated. >> >> >> >> >> *Thanks & RegardsRitul Guru+91-9916513186* >> >> >> On Tue, Feb 7, 2023 at 10:09 PM ritul guru wrote: >> >>> UefiPayloadPkg/UefiPayloadPkg.fdf >>> DEFINE FD_BASE = 0x00800000 >>> >>> Is the above address correct in uefipaylaod? >>> As observing some regions are getting out of limit of FD limit, >>> >>> and when setting DEFINE FD_BASE = 0x02200000, then seeing assert >>> in >>> [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister]. >>> >>> >>> >>> >>> >>> >>> *Thanks & RegardsRitul Guru+91-9916513186* >>> >>> >>> On Tue, Feb 7, 2023 at 8:29 PM ritul guru wrote: >>> >>>> Hi, >>>> I am building edk2 payload and getting below warning for >>>> PcdRtcIndexRegister, >>>> and if try to boot to then observing that there is assert at: >>>> >>>> ASSERT_EFI_ERROR (Status = Device Error) >>>> >>>> DXE_ASSERT!: >>>> /home/amd/src///coreboot/payloads/external/tianocore/tianocore/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c >>>> (141): !EFI_ERROR (Status) >>>> >>>> >>>> >>>> >>>> build time warning: >>>> Active Platform = >>>> /home//src///coreboot/payloads/external/edk2/workspace/tianocore/UefiPayloadPkg/UefiPayloadPkg.dsc >>>> .build: : warning: The PCD was not specified by any INF module in the >>>> platform for the given architecture. >>>> PCD: [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister] >>>> Platform: [UefiPayloadPkg.dsc] >>>> Arch: ['IA32'] >>>> build: : warning: The PCD was not specified by any INF module in the >>>> platform for the given architecture. >>>> PCD: [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister] >>>> Platform: [UefiPayloadPkg.dsc] >>>> Arch: ['IA32'] >>>> . done! >>>> >>>> >>>> >>>> >>>> *Thanks & RegardsRitul Guru+91-9916513186* >>>> >>> >> >> --000000000000437a3505f4224a5b Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
I do not get debug logs from edk2= payload even though debug payload is selected in menuconfig of coreboot.
and also updated FD_BASE, if not then getting = GCD assert while adding regions in phit table.

below path should be give at L36 for c= ustom edk2 repo?
payloads/external/edk2/works= pace/tianocore/
=C2=A0
Thanks & Regards
Ritul Guru
+91-9916513186


On Wed, Feb 8= , 2023 at 2:06 AM Sean Rhodes <sean@starlabs.systems> wrote:
Why the edk2 changes? Just to fix this issue?

Have you seen L36 of=C2=A0payloads/external/edk2/Kconfig

On Tue, 7 Feb 2023 at 20:30, ritul guru <ritul.bits@gmail.com> wrote:
<= blockquote class=3D"gmail_quote" style=3D"margin:0px 0px 0px 0.8ex;border-l= eft:1px solid rgb(204,204,204);padding-left:1ex">


Loading driver 378D7B65-8DA9-4773-B6E4-A47826A833= E1
InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 51A3E1= C0
Loading driver at 0x00051DD1000 EntryPoint=3D0x00051DD5670 PcRtc.efi<= br>InstallProtocolInterface: BC62157E-3E33-4FEC-9920-2D3B36D750DF 51A3ED98<= br>ProtectUefiImageCommon - 0x51A3E1C0
=C2=A0 - 0x0000000051DD1000 - 0x0= 000000000008000
SetUefiImageMemoryAttributes - 0x0000000051DD1000 - 0x00= 00000000001000 (0x0000000000004008)
SetUefiImageMemoryAttributes - 0x000= 0000051DD2000 - 0x0000000000006000 (0x0000000000020008)
SetUefiImageMemo= ryAttributes - 0x0000000051DD8000 - 0x0000000000001000 (0x0000000000004008)=
PROGRESS CODE: V03040002 I0

ASSERT_EFI_ERROR (Status =3D Device = Error)
ASSERT [PcRtc] /home//src/p/coreboot/payloads/external/edk2/wo= rkspace/tianocore/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c(1= )

getting above assert after= changed to FD_BASE to below value,=C2=A0
This error is coming while booting to coreboot with edk2 payload:

UefiPay= loadPkg/UefiPayloadPkg.fdf
DEFINE FD= _BASE =C2=A0 =C2=A0 =C2=A0 =3D 0x02182000

need to change FD_BASE, as it= was going outside Available memory.
any= hint would be appreciated.


Thanks & Regards
Ritul Guru
+91-9916513186


On Tue, Feb 7, 2023 at = 10:09 PM ritul guru <ritul.bits@gmail.com> wrote:
U= efiPayloadPkg/UefiPayloadPkg.fdf
DEFINE FD_BASE =C2=A0 =C2=A0 =C2=A0 =3D 0x00800000

Is the ab= ove=C2=A0address correct in uefipaylaod?
As observing=C2=A0some regions are getting out of limit of FD limit,
=

and = when setting DEFINE FD_BASE =C2=A0 =C2=A0 =C2=A0 =3D 0x02200000, then seein= g assert in=C2=A0
[gPcAtChipsetPkgTokenS= paceGuid.PcdRtcIndexRegister].

=



Thanks & Regards
Ritul Guru
+91-9916513186


=
On Tue, Fe= b 7, 2023 at 8:29 PM ritul guru <ritul.bits@gmail.com> wrote:
Hi,
I am building edk2 payloa= d and getting below warning for PcdRtcIndexRegister,
and if try to boot to then observing that there is assert at:<= /div>

=

ASSERT_EFI_ERROR (Status =3D Device Error)

DXE_A= SSERT!: /home/amd/src///coreboot/payloads/external/tianocore/tianocore/PcAt= ChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c (141): !EFI_ERROR (Stat= us)





build time warn= ing:
Active Platform =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0=3D /home//src///coreboot/payloads/external/edk2/workspace= /tianocore/UefiPayloadPkg/UefiPayloadPkg.dsc
.build: : warning: The PCD = was not specified by any INF module in the platform for the given architect= ure.
=C2=A0 =C2=A0 =C2=A0 =C2=A0 PCD: [gPcAtChipsetPkgTokenSpaceGuid.Pcd= RtcIndexRegister]
=C2=A0 =C2=A0 =C2=A0 =C2=A0 Platform: [UefiPayloadPkg.= dsc]
=C2=A0 =C2=A0 =C2=A0 =C2=A0 Arch: ['IA32']
build: : warn= ing: The PCD was not specified by any INF module in the platform for the gi= ven architecture.
=C2=A0 =C2=A0 =C2=A0 =C2=A0 PCD: [gPcAtChipsetPkgToken= SpaceGuid.PcdRtcTargetRegister]
=C2=A0 =C2=A0 =C2=A0 =C2=A0 Platform: [U= efiPayloadPkg.dsc]
=C2=A0 =C2=A0 =C2=A0 =C2=A0 Arch: ['IA32']. done!


Than= ks & Regards
Ritul Guru
+91-9916513186

--000000000000437a3505f4224a5b--