From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) by mx.groups.io with SMTP id smtpd.web11.716.1675796511954050823 for ; Tue, 07 Feb 2023 11:01:52 -0800 Authentication-Results: mx.groups.io; dkim=pass header.i=@gmail.com header.s=20210112 header.b=KIhIQ5t9; spf=pass (domain: gmail.com, ip: 209.85.218.54, mailfrom: ritul.bits@gmail.com) Received: by mail-ej1-f54.google.com with SMTP id hx15so45053987ejc.11 for ; Tue, 07 Feb 2023 11:01:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=cgL2lwuRITinsllyrwcqCuSHcJdpSb9IljnPVq04iek=; b=KIhIQ5t9b5hMawv9FOV+pU9ZLiQkmfAHNiqCFUvPugeaPjegB8lRl0oSsPFsp68SIi 1iluRAlOy9VWQLcWjB6Z+7gdBLsAcZhXSguc8Hbk+5suUHtrcmt5bb7Qq1hmLN5beiUD pvxkZNgXmLEmPlRxnOBu0GafMgWda9bYSBoJt0RdZjp+UCshQ3cgHFgbN5xlOrkfaTjh xNek3B8Py0L70OjAIz/lH/JRTtw69glmOIvGm1NIr+ylrWAURW2hYh4XtImicwdbs6yF SkXCaTeDQYMKu5i1Y87DKeA3BWBLQZ3kOHDUKILLx1qK9LucJb2sDs5y/Y0utmhRCsk1 /l2g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=cgL2lwuRITinsllyrwcqCuSHcJdpSb9IljnPVq04iek=; b=oq+oaRZ//mjTURZd19LK2PdBIH4FxWNO/vQfs2CJ4Z8HnwvbvlMA6cP3JF5rTDtrPp gJNLaesbf3dBYRFn5AXfQoTROwcRbPEPjOHF5b4wJjbrdE21gMTLngTXdtIRR7mPabvx L6reeFpq/FFppRP5aj2bdJvMWpcpxPPHZjD00lRz6AASTU5275PB+IoJUI9APdTaF7zU 84202sgC54Ru73witQ6y98nFQTHQuHMn7eFv97NL6YfdPKrLfog4gbadJJ7Kt099pOVx PCG33J7CMjDaS3ljDba2H8i3Ao3hjBASbo8bIiNmSkAvfTh7jEkcjTW1XJu4Xych7Z0/ HpUw== X-Gm-Message-State: AO0yUKXzWuNmcBMprTQlKya5HRvTKINf0R0D56HcUHr1vFQ1eUTnSIOZ RK/JKEfxrhajeuAWDmT5ODskjlwi6i2mlFdsxhA= X-Google-Smtp-Source: AK7set9vfiyanPrg2vGh6C74MfpQMmu9ilPPdmCbEkO7hSTtSfj9h24IKb6utesYUc0arm+e0l+zR/dlIwNmv92F3Qk= X-Received: by 2002:a17:906:1653:b0:880:575f:b20c with SMTP id n19-20020a170906165300b00880575fb20cmr1030606ejd.177.1675796510443; Tue, 07 Feb 2023 11:01:50 -0800 (PST) MIME-Version: 1.0 References: In-Reply-To: From: ritul guru Date: Wed, 8 Feb 2023 00:31:38 +0530 Message-ID: Subject: Re: [edk2-devel] regarding uefipayload build warning for pcd To: Sean Rhodes Cc: devel@edk2.groups.io Content-Type: multipart/alternative; boundary="000000000000b88c7405f420c7c0" --000000000000b88c7405f420c7c0 Content-Type: text/plain; charset="UTF-8" building it inside coreboot only. *Thanks & RegardsRitul Guru+91-9916513186* On Wed, Feb 8, 2023 at 12:00 AM Sean Rhodes wrote: > Hi Ritul > > It might be easier to build it inside coreboot; that'll use coreboots tool > chain and Kconfig so everything will just work. > > I.e. CONFIG_PAYLOAD_EDK2=y > > Sean > > On Tue, 7 Feb 2023, 18:24 ritul guru, wrote: > >> UefiPayloadPkg/UefiPayloadPkg.fdf >> DEFINE FD_BASE = 0x00800000 >> >> Is the above address correct in uefipaylaod? >> As observing some regions are getting out of limit of FD limit, >> >> and when setting DEFINE FD_BASE = 0x02200000, then seeing assert in >> [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister]. >> >> >> >> >> >> >> *Thanks & RegardsRitul Guru+91-9916513186* >> >> >> On Tue, Feb 7, 2023 at 8:29 PM ritul guru wrote: >> >>> Hi, >>> I am building edk2 payload and getting below warning for >>> PcdRtcIndexRegister, >>> and if try to boot to then observing that there is assert at: >>> >>> ASSERT_EFI_ERROR (Status = Device Error) >>> >>> DXE_ASSERT!: >>> /home/amd/src///coreboot/payloads/external/tianocore/tianocore/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcRtcEntry.c >>> (141): !EFI_ERROR (Status) >>> >>> >>> >>> >>> build time warning: >>> Active Platform = >>> /home//src///coreboot/payloads/external/edk2/workspace/tianocore/UefiPayloadPkg/UefiPayloadPkg.dsc >>> .build: : warning: The PCD was not specified by any INF module in the >>> platform for the given architecture. >>> PCD: [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister] >>> Platform: [UefiPayloadPkg.dsc] >>> Arch: ['IA32'] >>> build: : warning: The PCD was not specified by any INF module in the >>> platform for the given architecture. >>> PCD: [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister] >>> Platform: [UefiPayloadPkg.dsc] >>> Arch: ['IA32'] >>> . done! >>> >>> >>> >>> >>> *Thanks & RegardsRitul Guru+91-9916513186* >>> >> >> >> --000000000000b88c7405f420c7c0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
building it inside coreboot only.=

= Thanks & Regards
Ritul Guru
+91-991651318= 6


On Wed, Feb 8, 2023 at 12:00 AM Se= an Rhodes <sean@starlabs.systems> wrote:
Hi Ritul

It might be easier to build it inside coreboo= t; that'll use coreboots tool chain and Kconfig so everything will just= work.

I.e. CONFIG_PAYLO= AD_EDK2=3Dy

Sean

On= Tue, 7 Feb 2023, 18:24 ritul guru, <ritul.bits@gmail.com> wrote:
UefiPayloadPkg/UefiPayloadPkg.fdf
DEFINE FD_BASE =C2=A0 =C2=A0 =C2=A0 =3D 0x008000= 00

Is the above=C2=A0address correct in uefipaylaod?
As observing=C2=A0some regions are getting out of limit of= FD limit,

and when setting DEFINE FD_BASE =C2=A0 =C2=A0 =C2=A0 =3D 0x02200= 000, then seeing assert in=C2=A0
[gPcAtC= hipsetPkgTokenSpaceGuid.PcdRtcIndexRegister].




Thanks & Regards
Ritul Guru+91-9916513186
=

On Tue, Feb 7, 2023 at 8:29 PM ritul guru <ritul.bits@gmail.com> wrote:
Hi,
I am building edk2 payload and getting below warning for PcdRtcInde= xRegister,
and if try to boot to then ob= serving that there is assert at:

ASSERT_EFI_ERROR (Sta= tus =3D Device Error)

DXE_ASSERT!: /home/amd/src///coreboot/payloads/= external/tianocore/tianocore/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcR= tcEntry.c (141): !EFI_ERROR (Status)





build time warning:
= Active Platform =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0=3D /home//src///coreboot= /payloads/external/edk2/workspace/tianocore/UefiPayloadPkg/UefiPayloadPkg.d= sc
.build: : warning: The PCD was not specified by any INF module in the= platform for the given architecture.
=C2=A0 =C2=A0 =C2=A0 =C2=A0 PCD: [= gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister]
=C2=A0 =C2=A0 =C2=A0 = =C2=A0 Platform: [UefiPayloadPkg.dsc]
=C2=A0 =C2=A0 =C2=A0 =C2=A0 Arch: = ['IA32']
build: : warning: The PCD was not specified by any INF = module in the platform for the given architecture.
=C2=A0 =C2=A0 =C2=A0 = =C2=A0 PCD: [gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister]
=C2=A0 = =C2=A0 =C2=A0 =C2=A0 Platform: [UefiPayloadPkg.dsc]
=C2=A0 =C2=A0 =C2=A0= =C2=A0 Arch: ['IA32']
. done!


Thanks & Regards
Ritul Guru
+91-9916513186

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