From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=217.140.101.70; helo=foss.arm.com; envelope-from=thomas.abraham@arm.com; receiver=edk2-devel@lists.01.org Received: from foss.arm.com (foss.arm.com [217.140.101.70]) by ml01.01.org (Postfix) with ESMTP id D3FDB2063D743 for ; Tue, 22 May 2018 21:07:22 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5CF731529 for ; Tue, 22 May 2018 21:07:22 -0700 (PDT) Received: from mail-io0-f173.google.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 435AC3F59F for ; Tue, 22 May 2018 21:07:22 -0700 (PDT) Received: by mail-io0-f173.google.com with SMTP id g14-v6so21146011ioc.7 for ; Tue, 22 May 2018 21:07:22 -0700 (PDT) X-Gm-Message-State: ALKqPwdKF0tUo/WD8CQLU7CWfkwrx1xl4XPORsRdZOfRgmmtXVnr7Nip KOVjODs7iIb9EyoFA1z272kZGglV6frRVYRXSsw= X-Google-Smtp-Source: AB8JxZpITgWDz6lu06fixexuTLcGc32n8quH1rA80NJN9YwFu1oijVD8UmG9bUB54pBKCZgLLx9178QUCRe0JXwvCPQ= X-Received: by 2002:a6b:c083:: with SMTP id q125-v6mr989981iof.42.1527048441490; Tue, 22 May 2018 21:07:21 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a02:97b8:0:0:0:0:0 with HTTP; Tue, 22 May 2018 21:07:20 -0700 (PDT) In-Reply-To: References: <1526891152-18739-1-git-send-email-thomas.abraham@arm.com> <1526891152-18739-3-git-send-email-thomas.abraham@arm.com> From: Thomas Abraham Date: Wed, 23 May 2018 09:37:20 +0530 X-Gmail-Original-Message-ID: Message-ID: To: Ard Biesheuvel Cc: Thomas Abraham , "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH edk2-platforms v4 2/9] Platform/ARM/Sgi: add NOR flash platform library implementation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 May 2018 04:07:23 -0000 Content-Type: text/plain; charset="UTF-8" Hi Ard, On Mon, May 21, 2018 at 2:23 PM, Ard Biesheuvel wrote: > On 21 May 2018 at 10:25, Thomas Abraham wrote: >> From: Vishwanatha HG >> >> Add a initial NOR flash driver platform wrapper as part of the platform >> library. Access to NOR flash devices connected to CS0 and CS1 is enabled >> in this initial implementation. >> >> Contributed-under: TianoCore Contribution Agreement 1.1 >> Signed-off-by: Vishwanatha HG >> Signed-off-by: Thomas Abraham >> --- >> .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c | 66 ++++++++++++++++++++++ >> .../ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf | 34 +++++++++++ >> 2 files changed, 100 insertions(+) >> create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c >> create mode 100644 Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.inf >> >> diff --git a/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c >> new file mode 100644 >> index 0000000..9b4981f >> --- /dev/null >> +++ b/Platform/ARM/SgiPkg/Library/NorFlashLib/NorFlashLib.c >> @@ -0,0 +1,66 @@ >> +/** @file >> + >> + Copyright (c) 2018, ARM Ltd. All rights reserved. >> + >> + This program and the accompanying materials are licensed and made available >> + under the terms and conditions of the BSD License which accompanies this >> + distribution. The full text of the license may be found at >> + http://opensource.org/licenses/bsd-license.php >> + >> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, >> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. >> + >> + **/ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +STATIC NOR_FLASH_DESCRIPTION mNorFlashDevices[] = { >> + { >> + SGI_EXP_SMC_CS0_BASE, >> + SGI_EXP_SMC_CS0_BASE, >> + SIZE_256KB * 256, >> + SIZE_256KB, >> + {0xEBF0B9DF, 0x17d0, 0x4812, { 0xA9, 0x59, 0xCF, 0xD7, 0x92, 0xEE, 0x31, 0x13} } >> + }, >> + { >> + SGI_EXP_SMC_CS1_BASE, >> + SGI_EXP_SMC_CS1_BASE, >> + SIZE_256KB * 256, >> + SIZE_256KB, >> + { 0x1F15DA3C, 0x37FF, 0x4070, { 0xB4, 0x71, 0xBB, 0x4A, 0xF1, 0x2A, 0x72, 0x4A } } > > Please use consistent whitespace in these GUID definitions. > >> + }, >> +}; >> + >> +EFI_STATUS >> +NorFlashPlatformInitialization ( >> + VOID >> + ) >> +{ >> + UINT64 SysRegFlash; >> + >> + SysRegFlash = SGI_EXP_SYSPH_SYSTEM_REGISTERS + SGI_SYSPH_SYS_REG_FLASH; >> + if ((MmioRead32 (SysRegFlash) & SGI_SYSPH_SYS_REG_FLASH_RWEN) == 0) { >> + MmioWrite32 (SysRegFlash, 1); > > SGI_SYSPH_SYS_REG_FLASH_RWEN? The SysReg register has a bit in it that has to be set to allow read/write access to the NOR flash. So this macros represents that bit. > > Should you use MmioOr32() here? (I can't tell, I don't have the docs) Tested with MmioOr32() and that works as well. So updated the code. Thanks, Thomas.