Re: [edk2-devel] [PATCH v7 3/5] MdePkg: Implement RISC-V Cache Management Operations

["Pedro Falcato" <pedro.falcato@gmail.com>]

On Sun, Oct 29, 2023 at 2:46 PM Dhaval Sharma <dhaval@rivosinc.com> wrote:
>
> Implement Cache Management Operations (CMO) defined by
> RISC-V spec https://github.com/riscv/riscv-CMOs.
>
> Notes:
> 1. CMO only supports block based Operations. Meaning cache
>    flush/invd/clean Operations are not available for the entire
>    range. In that case we fallback on fence.i instructions.
> 2. Operations are implemented using Opcodes to make them compiler
>    independent. binutils 2.39+ compilers support CMO instructions.
>
> Test:
> 1. Ensured correct instructions are refelecting in asm

nit: reflecting

> 2. Not able to verify actual instruction in HW as Qemu ignores
>    any actual cache operations.

Do you have no way to test this in hardware? Since Rivos is a RISCV
vendor and all ;)
I don't like inviting the idea of merging CPU architectural changes
without actually testing them in something resembling real silicon
(i.e QEMU KVM is _fine_, QEMU TCG really isn't).

-- 
Pedro


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