From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pf1-f172.google.com (mail-pf1-f172.google.com [209.85.210.172]) by mx.groups.io with SMTP id smtpd.web11.39318.1683653055231525063 for ; Tue, 09 May 2023 10:24:15 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="signature has expired" header.i=@gmail.com header.s=20221208 header.b=o+24NO2J; spf=pass (domain: gmail.com, ip: 209.85.210.172, mailfrom: pedro.falcato@gmail.com) Received: by mail-pf1-f172.google.com with SMTP id d2e1a72fcca58-64395e741fcso6238058b3a.2 for ; Tue, 09 May 2023 10:24:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20221208; t=1683653054; x=1686245054; h=cc:to:subject:message-id:date:from:mime-version:from:to:cc:subject :date:message-id:reply-to; bh=+zqtPbP+iNvAdYZJssip7eZAwBzTG1Uvt+HokPkhpaw=; b=o+24NO2J3mTJdp02c0AHTVbr+XL03ZczmVWqkQ4QD1PJPFCrmeiSahKTTNehWnD70C z/SXIAZzzVTBEYvo+1FPIJijecO6YRlXZ93QOy4uFd4p9EBdN0gH9Tbjy7UWvR8Y3dVS yFAKPx+lmlSljRvqAYQzXRd0a16czAqTYX83t4/msTwyr7Ej7Byzte0KFMtfL3Bm6C/I V3vY91Y7kSMEXbQDZAKJrg8YBdCt0gIE/7iYHyY1LkRozRIrf/33edrtw/Md/l4nVFjT 1KvtXh5lNWyCogO60nR8s4QUYvrVZmsyPiidlStAwzx13g5haHbwDq3eAtpdllTMUWiJ iauQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1683653054; x=1686245054; h=cc:to:subject:message-id:date:from:mime-version:x-gm-message-state :from:to:cc:subject:date:message-id:reply-to; bh=+zqtPbP+iNvAdYZJssip7eZAwBzTG1Uvt+HokPkhpaw=; b=fnD3B9NrKsD9gmzVqdp8K+Q/iM+wIdjgRHxzW5x++WJyrMrBsfZdbWswYlssB07R3n aW7Y5txyIVKEYndv1al/U5zeKT4MMVZOF1U2wLsjvdDrsel3+ZWpu1iP8WIbSsPjxoO3 3gizYLBg5BFTQ8r04rryge7r3QgC5UxqWi8A2EPslx1pexmIaWi28wLITgFECgrZD1BL 50oeuLbLgsohqXdlBmAvjpeYkdEOwoG/vlLmi1LGGsruwNsvaw5ChPBsPN0oniXWsU0r Uo+rMkwVpZD0yN13O8Ym2NqwyvXFRYRjQ1mKmjYMFbg0TeEaJQyvL1o0U0ps2VAMDTsy t8Hw== X-Gm-Message-State: AC+VfDxEF21HcRQQgn6dfbVcridUzCosq55P51iiszn7DW4bgxNf/aqq b3Ty/TB8McOvXeATcjK6eAWS4L71K/Jste+B5BlUZF1iltozDbya X-Google-Smtp-Source: ACHHUZ7RUXcZwYTqOhSvGNvMro8o84F0Ol0IbXpJ2+tpaVUnpQNfQuCLddojyUVQijqJoXUmioPl62IG5M6F0JONr8A= X-Received: by 2002:a05:6a20:12c9:b0:100:ccb8:91fd with SMTP id v9-20020a056a2012c900b00100ccb891fdmr7064704pzg.22.1683653054472; Tue, 09 May 2023 10:24:14 -0700 (PDT) MIME-Version: 1.0 From: "Pedro Falcato" Date: Tue, 9 May 2023 18:24:03 +0100 Message-ID: Subject: Side effects of enabling PML5 in EFI To: edk2-devel-groups-io Cc: Andrew Fish , "Kinney, Michael D" , Ray Ni , Ard Biesheuvel Content-Type: text/plain; charset="UTF-8" Hi all, (+CC people vaguely related to the EFI spec, the PML5 implementation and kernel EFI boot code) As a result of the latest 5-level paging patches, I've been looking into how tiano supports PML5. This raised a question: Doesn't enabling PML5 in-firmware break compatibility with non-PML5-aware bootloaders and kernels? >>From an architectural point of view: - PML5 is enabled in CR4.LA57, but may only be toggled when not in IA32e mode (so, only in 32-bit) - Trying to mindlessly write to CR4 will #GP, and loading a 4-level page tables will crash with probable page faults or #GPs >>From an EFI spec point of view: - Whereas other architectures (arm64 for instance) specify the MMU state in detail, the x64 bits do not specify anything beyond "Paging enabled" (see 2.3.4). Which pre-PML5, was obviously well defined. - When under boot services, this is likely not a problem as page tables are owned by boot services. Unless they touch them as defined in "2.3.4.3. Enabling Paging or Alternate Translations in an Application", which may run into problems. >>From an OS kernel/bootloader point of view: - A PML5 aware kernel/bootloader will likely correctly identify the PML5 capability and enable LA57, load 5-level page tables. As such, this scenario always works. - A non-PML5-aware one may incorrectly overwrite LA57 (and #GP), or just load a 4-level paging structure into CR3, and thus disastrously crash. So, how is any of this supposed to work? -- Pedro