From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 8ACA87803DE for ; Thu, 12 Oct 2023 18:30:13 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=rw6+LT1dTrbzKAjiJG1Ue0bHrLCZd/rwpyA0pqz9kXg=; c=relaxed/simple; d=groups.io; h=MIME-Version:References:In-Reply-To:From:Date:Message-ID:Subject:To:Cc:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type:Content-Transfer-Encoding; s=20140610; t=1697135412; v=1; b=GAc7PLMd4V60DKu52nZCxoT/Eb0g+Gu9HhLOY/oiZfw3DEgEIsBK9Y5NcN4hOeYgPKoDJXVY W7hUFEZlyilhMsT95pvogOCisGvfEyOTby3D9E1Z/LWEqELo0H7sF4ATuw6mNdBkkbJLeF0VHxY NY2MaVePLiIbsWmmOyn8ptDI= X-Received: by 127.0.0.2 with SMTP id YqA5YY7687511xFfqNe6XGLQ; Thu, 12 Oct 2023 11:30:12 -0700 X-Received: from mail-ua1-f42.google.com (mail-ua1-f42.google.com [209.85.222.42]) by mx.groups.io with SMTP id smtpd.web11.20462.1697135411584539850 for ; Thu, 12 Oct 2023 11:30:11 -0700 X-Received: by mail-ua1-f42.google.com with SMTP id a1e0cc1a2514c-7b0a16f0338so662183241.0 for ; Thu, 12 Oct 2023 11:30:11 -0700 (PDT) X-Gm-Message-State: yf5I8ZLJsArbf1rKhqIni51Lx7686176AA= X-Google-Smtp-Source: AGHT+IHUc0IUhK4FsNiGMyZ1BgEQJ17MrYgFU69kBVQ/aH7Qh09WfcISW2BOIL20fdL1K5ZeovgvtMeXwHPWk32usz8= X-Received: by 2002:a67:e40d:0:b0:452:8953:729e with SMTP id d13-20020a67e40d000000b004528953729emr25540620vsf.13.1697135410469; Thu, 12 Oct 2023 11:30:10 -0700 (PDT) MIME-Version: 1.0 References: <20231004183426.5803-1-tphan@ventanamicro.com> In-Reply-To: From: "Pedro Falcato" Date: Thu, 12 Oct 2023 19:29:59 +0100 Message-ID: Subject: Re: [edk2-devel] [PATCH v2] UefiCpuPkg: RISC-V: MMU: Introduce a PCD for SATP mode To: devel@edk2.groups.io, sunilvl@ventanamicro.com Cc: Tuan Phan , ray.ni@intel.com, michael.d.kinney@intel.com, gaoliming@byosoft.com.cn, zhiguang.liu@intel.com, git@danielschaefer.me, andrei.warkentin@intel.com, ardb+tianocore@kernel.org, eric.dong@intel.com, kraxel@redhat.com, rahul1.kumar@intel.com, Dhaval Sharma Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pedro.falcato@gmail.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=GAc7PLMd; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=gmail.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io On Thu, Oct 12, 2023 at 1:12=E2=80=AFPM Sunil V L wrote: > > Hi Ray, > > On Wed, Oct 04, 2023 at 11:34:26AM -0700, Tuan Phan wrote: > > Introduce a PCD to control the maximum SATP mode that MMU allowed > > to use. This PCD helps RISC-V platform set bare or minimum SATP mode > > during bring up to debug memory map issue. > > > Could you help with review of this? It seems glaring to me that Maintainers.txt needs some sort of RISCV F: */*RiscV*/ pattern for riscv architectural changes across all packages - I'm not sure how much value the x86 Intel folks can add to RISCV or ARM code review and merging, apart from the traditional UEFI/tianocore feedback. --=20 Pedro -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109577): https://edk2.groups.io/g/devel/message/109577 Mute This Topic: https://groups.io/mt/101761642/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-