From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::241; helo=mail-io0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x241.google.com (mail-io0-x241.google.com [IPv6:2607:f8b0:4001:c06::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 5FD332034A893 for ; Fri, 27 Oct 2017 02:19:35 -0700 (PDT) Received: by mail-io0-x241.google.com with SMTP id 134so11360571ioo.0 for ; Fri, 27 Oct 2017 02:23:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=kZphUrQU8iLPtaFtk30uVc9BIAXYiwx4TyV0OuyrA2E=; b=gIDeARPXMlsgvWYBnRzxQwXt50tW//ijYd+pemxteBs65FC1Sy7H/ksqRynRq9wd+a EqOfrd/Lzxpop02GsqRXxL4ggkxk9ybE/nkpIsTJDQ3pspDJmh5i4WSYbK43agvBeIDL spzyd/txZ+omAANkJylZID1Xglzz04YfvMqWU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=kZphUrQU8iLPtaFtk30uVc9BIAXYiwx4TyV0OuyrA2E=; b=MQ+RTMzZ4XdetLxDIRZztSbFpCaNl9dw/x/c+cfFUav2yPjNwzQJchAAdjRWlc731g m4NTfsbgNIyZyfm19g7Qvya4luHiw/NNYoddo6ebfIzQFCIuY0TBg0BX47tnWeMg/Mgk w3QmhUInAllONz3HiObVHhNF1PGXLKkJRH88BFXkl2Sda87qmZvao/io326BQbmbOcXM WLQwKpk8a2Bx+2PN6n8lH4TUSgADneA9wUTi+kG9PNjfTXf+NxYBtuoRH9Y0WmtHee8e PMADGB5hEMAYQHZCCaagrBMCxEsUBfUXWV46Ht+aI17vP6GJnXHqmm2GtkLrP8DGvNvw I/HA== X-Gm-Message-State: AMCzsaW5Q+2NuCn7vGKfsLYua8ZqEe6pM/uBJ1eC2iewL3Is4ctLRb0O RKVIlmDWhQ70hx0M8vc0UCJBKearVNATBLpqCcgrfQ== X-Google-Smtp-Source: ABhQp+QDHxjFZPARvTu416Ja7oxn5Vt8Yb8BUnhLS319jYnGMJFUsydSGbqMEmIgsah5wDexTa6tAI18Ofn3BCStb98= X-Received: by 10.36.233.133 with SMTP id f127mr18918ith.34.1509096201949; Fri, 27 Oct 2017 02:23:21 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.131.167 with HTTP; Fri, 27 Oct 2017 02:23:21 -0700 (PDT) In-Reply-To: <20171027053326.48815-3-daniil.egranov@arm.com> References: <20171027053326.48815-1-daniil.egranov@arm.com> <20171027053326.48815-3-daniil.egranov@arm.com> From: Ard Biesheuvel Date: Fri, 27 Oct 2017 10:23:21 +0100 Message-ID: To: Daniil Egranov Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH 2/4] Drivers/SataSiI3132Dxe: Allow 64-bit DMA transfer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 27 Oct 2017 09:19:35 -0000 Content-Type: text/plain; charset="UTF-8" On 27 October 2017 at 06:33, Daniil Egranov wrote: > Set a PCI IO attribute allowing 64-bit DMA transfer. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Daniil Egranov Reviewed-by: Ard Biesheuvel > --- > EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c > index f4946552a0..c1760fdc1b 100644 > --- a/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c > +++ b/EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132.c > @@ -384,7 +384,7 @@ SataSiI3132DriverBindingStart ( > &Supports > ); > if (!EFI_ERROR (Status)) { > - Supports &= EFI_PCI_DEVICE_ENABLE; > + Supports &= EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE; > Status = PciIo->Attributes ( > PciIo, > EfiPciIoAttributeOperationEnable, > -- > 2.11.0 >