[edk2-platforms: PATCH v2 0/6] Armada7k8k misc improvements

[edk2-platforms: PATCH v2 0/6] Armada7k8k misc improvements

[Marcin Wojtas]

Hi,

A second version of the patchset brings one, though significant
change. An idea of using custom DtLoaderLib for the PMU IRQ handling
was dropped. Instead use existing PlatInitDxe. The EL3 service
is still switched off in the ExitBootServicesEvent. However its
execution depends on the gEdkiiPlatformHasAcpiGuid status check in the new
gEfiEventReadyToBootGuid routine.

The patches are available in the github:
https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/misc-upstream-r20190416

I'm looking forward to your comments or remarks.

Best regards,
Marcin

Changelog:
v1 -> v2:
* 3/6
  - Use PlatInitDxe and gEfiEventReadyToBootGuid event


Grzegorz Jaszczyk (1):
  Marvell/Armada80x0Db: Configure the CP1, comphy-2 to work with SFI 10G

Marcin Wojtas (4):
  Marvell/Armada7k8k: AcpiTables: Enable edge trigger of PMU interrupt
  Marvell/Armada7k8k: Implement PMU interrupt handling
  Marvell/Armada7k8k: Switch to software-based watchdog
  Marvell/Armada7k8k: ArmadaSoCDescLib: Add more I2C controllers

Mark Kettenis (1):
  Marvell/Armada7k8k: RealTimeClockLib: Update bus parameters

 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                                  |  2 +-
 Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc                                 |  4 +-
 Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc                                 |  4 +-
 Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                                      |  2 +-
 Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf                 |  6 ++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  8 +-
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h         |  7 +-
 Silicon/Marvell/Include/IndustryStandard/MvSmc.h                               |  2 +
 Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c                   | 82 ++++++++++++++++++++
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c |  5 +-
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c         |  5 ++
 Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc                                | 10 ++-
 12 files changed, 123 insertions(+), 14 deletions(-)

-- 
2.7.4

[edk2-platforms: PATCH v2 1/6] Marvell/Armada7k8k: RealTimeClockLib: Update bus parameters

[Marcin Wojtas]

From: Mark Kettenis <kettenis@jive.eu>

Adjust bus timing parameters to make reading and updating the RTC
reliable.

This patch aligns the bus configuration to the one used by Linux.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h | 7 ++++++-
 Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c | 5 +++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h
index 922f959..ee0c303 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h
@@ -41,10 +41,15 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #define RTC_IRQ_2_CONFIG_REG                    0x8
 #define RTC_IRQ_ALARM_EN                        0x1
 #define RTC_ALARM_2_REG                         0x14
+#define RTC_BRIDGE_TIMING_CTRL0_REG_OFFS        0x80
 #define RTC_BRIDGE_TIMING_CTRL1_REG_OFFS        0x84
 #define RTC_IRQ_STATUS_REG                      0x90
 #define RTC_IRQ_ALARM_MASK                      0x1
+#define RTC_WRITE_PERIOD_DELAY_MASK             0xFFFF
+#define RTC_WRITE_PERIOD_DELAY_DEFAULT          0x3FF
+#define RTC_WRITE_SETUP_DELAY_MASK              (0xFFFF << 16)
+#define RTC_WRITE_SETUP_DELAY_DEFAULT           (0x29 << 16)
 #define RTC_READ_OUTPUT_DELAY_MASK              0xFFFF
-#define RTC_READ_OUTPUT_DELAY_DEFAULT           0x1F
+#define RTC_READ_OUTPUT_DELAY_DEFAULT           0x3F
 
 #endif /* __RTCLIB_H__ */
diff --git a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
index 087bd9a..7de5ed7 100644
--- a/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c
@@ -250,6 +250,11 @@ LibRtcInitialize (
 
   /* Update RTC-MBUS bridge timing parameters */
   MmioAndThenOr32 (
+          mArmadaRtcBase + RTC_BRIDGE_TIMING_CTRL0_REG_OFFS,
+          ~(RTC_WRITE_SETUP_DELAY_MASK | RTC_WRITE_PERIOD_DELAY_MASK),
+          (RTC_WRITE_SETUP_DELAY_DEFAULT | RTC_WRITE_PERIOD_DELAY_DEFAULT)
+          );
+  MmioAndThenOr32 (
           mArmadaRtcBase + RTC_BRIDGE_TIMING_CTRL1_REG_OFFS,
           ~RTC_READ_OUTPUT_DELAY_MASK,
           RTC_READ_OUTPUT_DELAY_DEFAULT
-- 
2.7.4

[edk2-platforms: PATCH v2 2/6] Marvell/Armada7k8k: AcpiTables: Enable edge trigger of PMU interrupt

[Marcin Wojtas]

Extend MADT GICC table flags with PERFORMANCE_INTERRUPT_MODEL,
which is responsible for configuring interrupt type in the OS.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc b/Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc
index 3dae5d3..7ab927d 100644
--- a/Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc
+++ b/Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc
@@ -35,6 +35,8 @@
 #define PMU_INTERRUPT_CPU2        132
 #define PMU_INTERRUPT_CPU3        133
 
+#define PMU_INTERRUPT_FLAG        EFI_ACPI_6_0_GIC_ENABLED | EFI_ACPI_6_0_PERFORMANCE_INTERRUPT_MODEL
+
 #pragma pack(push, 1)
 typedef struct {
   EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
@@ -57,7 +59,7 @@ ACPI_6_0_MADT_STRUCTURE Madt = {
     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(0,                         // GicId
                                      0x000,                     // AcpiCpuUid
                                      0x000,                     // Mpidr
-                                     EFI_ACPI_6_0_GIC_ENABLED,  // Flags
+                                     PMU_INTERRUPT_FLAG,        // Flags
                                      PMU_INTERRUPT_CPU0,        // PmuIrq
                                      GICC_BASE,                 // GicBase
                                      GICV_BASE,                 // GicVBase
@@ -69,7 +71,7 @@ ACPI_6_0_MADT_STRUCTURE Madt = {
     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(1,                         // GicId
                                      0x001,                     // AcpiCpuUid
                                      0x001,                     // Mpidr
-                                     EFI_ACPI_6_0_GIC_ENABLED,  // Flags
+                                     PMU_INTERRUPT_FLAG,        // Flags
                                      PMU_INTERRUPT_CPU1,        // PmuIrq
                                      GICC_BASE,                 // GicBase
                                      GICV_BASE,                 // GicVBase
@@ -81,7 +83,7 @@ ACPI_6_0_MADT_STRUCTURE Madt = {
     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(2,                         // GicId
                                      0x100,                     // AcpiCpuUid
                                      0x100,                     // Mpidr
-                                     EFI_ACPI_6_0_GIC_ENABLED,  // Flags
+                                     PMU_INTERRUPT_FLAG,        // Flags
                                      PMU_INTERRUPT_CPU2,        // PmuIrq
                                      GICC_BASE,                 // GicBase
                                      GICV_BASE,                 // GicVBase
@@ -93,7 +95,7 @@ ACPI_6_0_MADT_STRUCTURE Madt = {
     EFI_ACPI_6_0_GICC_STRUCTURE_INIT(3,                         // GicId
                                      0x101,                     // AcpiCpuUid
                                      0x101,                     // Mpidr
-                                     EFI_ACPI_6_0_GIC_ENABLED,  // Flags
+                                     PMU_INTERRUPT_FLAG,        // Flags
                                      PMU_INTERRUPT_CPU3,        // PmuIrq
                                      GICC_BASE,                 // GicBase
                                      GICV_BASE,                 // GicVBase
-- 
2.7.4

[edk2-platforms: PATCH v2 3/6] Marvell/Armada7k8k: Implement PMU interrupt handling

[Marcin Wojtas]

Generic handling of the PMU interrupts in UEFI and Linux with
ACPI require enabling a dedicated handler in the EL3.
Extend the PlatInitDxe with enabler code.

Because for DT world the EL3 service must remain disabled,
switch it off in the ExitBootServicesEvent. Its execution
depends on the gEdkiiPlatformHasAcpiGuid status check in the new
gEfiEventReadyToBootGuid routine.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf |  6 ++
 Silicon/Marvell/Include/IndustryStandard/MvSmc.h               |  2 +
 Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c   | 82 ++++++++++++++++++++
 3 files changed, 90 insertions(+)

diff --git a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
index e707fe9..df10526 100644
--- a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
+++ b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
@@ -25,6 +25,7 @@
   PlatInitDxe.c
 
 [Packages]
+  ArmPkg/ArmPkg.dec
   EmbeddedPkg/EmbeddedPkg.dec
   MdeModulePkg/MdeModulePkg.dec
   MdePkg/MdePkg.dec
@@ -32,6 +33,7 @@
 
 [LibraryClasses]
   ArmadaIcuLib
+  ArmSmcLib
   ComPhyLib
   DebugLib
   MppLib
@@ -40,6 +42,10 @@
   UefiDriverEntryPoint
   UtmiPhyLib
 
+[Guids]
+  gEdkiiPlatformHasAcpiGuid
+  gEfiEventReadyToBootGuid
+
 [Protocols]
   gMarvellPlatformInitCompleteProtocolGuid    ## PRODUCES
 
diff --git a/Silicon/Marvell/Include/IndustryStandard/MvSmc.h b/Silicon/Marvell/Include/IndustryStandard/MvSmc.h
index 0c90f11..e5c89d9 100644
--- a/Silicon/Marvell/Include/IndustryStandard/MvSmc.h
+++ b/Silicon/Marvell/Include/IndustryStandard/MvSmc.h
@@ -20,5 +20,7 @@
 #define MV_SMC_ID_COMPHY_POWER_OFF        0x82000002
 #define MV_SMC_ID_COMPHY_PLL_LOCK         0x82000003
 #define MV_SMC_ID_DRAM_SIZE               0x82000010
+#define MV_SMC_ID_PMU_IRQ_ENABLE          0x82000012
+#define MV_SMC_ID_PMU_IRQ_DISABLE         0x82000013
 
 #endif //__MV_SMC_H__
diff --git a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c
index 18b6783..4012fd7 100644
--- a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c
+++ b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c
@@ -12,7 +12,12 @@
 
 **/
 
+#include <Guid/EventGroup.h>
+
+#include <IndustryStandard/MvSmc.h>
+
 #include <Library/ArmadaIcuLib.h>
+#include <Library/ArmSmcLib.h>
 #include <Library/DebugLib.h>
 #include <Library/MppLib.h>
 #include <Library/MvComPhyLib.h>
@@ -21,6 +26,62 @@
 #include <Library/UefiBootServicesTableLib.h>
 #include <Library/UtmiPhyLib.h>
 
+STATIC EFI_EVENT mArmada7k8kExitBootServicesEvent;
+
+/**
+  Disable extra EL3 handling of the PMU interrupts for DT world.
+
+  @param[in]   Event                  Event structure
+  @param[in]   Context                Notification context
+
+**/
+STATIC
+VOID
+Armada7k8kExitBootServicesHandler (
+  IN EFI_EVENT  Event,
+  IN VOID      *Context
+  )
+{
+  ARM_SMC_ARGS SmcRegs = {0};
+
+  SmcRegs.Arg0 = MV_SMC_ID_PMU_IRQ_DISABLE;
+  ArmCallSmc (&SmcRegs);
+
+  return;
+}
+
+/**
+  Check if we boot with DT and trigger EBS event in such case.
+
+  @param[in]   Event                  Event structure
+  @param[in]   Context                Notification context
+
+**/
+STATIC
+VOID
+Armada7k8kOnReadyToBootHandler (
+  IN EFI_EVENT  Event,
+  IN VOID      *Context
+  )
+{
+  EFI_STATUS    Status;
+  VOID         *Interface;
+
+  Status = gBS->LocateProtocol (&gEdkiiPlatformHasAcpiGuid,
+                  NULL,
+                  (VOID **)&Interface);
+  if (EFI_ERROR (Status)) {
+    Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES,
+                    TPL_NOTIFY,
+                    Armada7k8kExitBootServicesHandler,
+                    NULL,
+                    &mArmada7k8kExitBootServicesEvent);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_ERROR, "%a: Fail to register EBS event\n", __FUNCTION__));
+    }
+  }
+}
+
 EFI_STATUS
 EFIAPI
 ArmadaPlatInitDxeEntryPoint (
@@ -28,7 +89,9 @@ ArmadaPlatInitDxeEntryPoint (
   IN EFI_SYSTEM_TABLE   *SystemTable
   )
 {
+  ARM_SMC_ARGS  SmcRegs = {0};
   EFI_STATUS    Status;
+  EFI_EVENT     Event;
 
   DEBUG ((DEBUG_ERROR, "\nArmada Platform Init\n\n"));
 
@@ -43,5 +106,24 @@ ArmadaPlatInitDxeEntryPoint (
   MppInitialize ();
   ArmadaIcuInitialize ();
 
+  /*
+   * Enable EL3 PMU interrupt handler and
+   * register the ReadyToBoot event.
+   */
+  SmcRegs.Arg0 = MV_SMC_ID_PMU_IRQ_ENABLE;
+  ArmCallSmc (&SmcRegs);
+
+  Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL,
+                  TPL_CALLBACK,
+                  Armada7k8kOnReadyToBootHandler,
+                  NULL,
+                  &gEfiEventReadyToBootGuid,
+                  &Event);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR,
+      "%a: Fail to register OnReadyToBoot event\n",
+      __FUNCTION__));
+  }
+
   return EFI_SUCCESS;
 }
-- 
2.7.4

[edk2-platforms: PATCH v2 4/6] Marvell/Armada7k8k: Switch to software-based watchdog

[Marcin Wojtas]

Due to the hardware issue, it is better to
use generic MdeModulePkg version of the watchdog
instead of the ArmPkg driver. It prevents unwanted
resetting of the platform when spending "too long"
inside the default boot manager.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc | 2 +-
 Silicon/Marvell/Armada7k8k/Armada7k8k.fdf     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
index 8291582..0ced400 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc
@@ -454,7 +454,7 @@
   ArmPkg/Drivers/CpuDxe/CpuDxe.inf
   ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
   ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-  ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 
   # Platform Initialization
   Silicon/Marvell/Drivers/BoardDesc/MvBoardDescDxe.inf
diff --git a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
index e143517..d739020 100644
--- a/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
+++ b/Silicon/Marvell/Armada7k8k/Armada7k8k.fdf
@@ -114,7 +114,7 @@ FvNameGuid         = 5eda4200-2c5f-43cb-9da3-0baf74b1b30c
   INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
   INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
   INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
-  INF ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+  INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
   INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
   INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
   INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
-- 
2.7.4

[edk2-platforms: PATCH v2 5/6] Marvell/Armada7k8k: ArmadaSoCDescLib: Add more I2C controllers

[Marcin Wojtas]

Hitherto SoC library of Armada7k8k was missing AP and CP-MSS
I2C controllers. Fix that and update Armada70x0Db and
Armada80x0Db I2C description accordingly.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc                                 | 4 ++--
 Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc                                 | 2 +-
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h | 8 ++++++--
 Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c | 5 ++++-
 4 files changed, 13 insertions(+), 6 deletions(-)

diff --git a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
index e8cd177..01532b4 100644
--- a/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
+++ b/Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc
@@ -94,9 +94,9 @@
   # I2C
   gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x60, 0x21 }
   gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x0, 0x0 }
-  gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x1, 0x1 }
+  gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x0, 0x1, 0x1 }
   gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57 }
-  gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x0, 0x0 }
+  gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x1, 0x1 }
   gMarvellTokenSpaceGuid.PcdI2cClockFrequency|250000000
   gMarvellTokenSpaceGuid.PcdI2cBaudRate|100000
   gMarvellTokenSpaceGuid.PcdI2cBusCount|2
diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index 8e8c2ba..a28e330 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -103,7 +103,7 @@
   # I2C
   gMarvellTokenSpaceGuid.PcdI2cSlaveAddresses|{ 0x50, 0x57, 0x50, 0x57, 0x21, 0x25 }
   gMarvellTokenSpaceGuid.PcdI2cSlaveBuses|{ 0x0, 0x0, 0x1, 0x1, 0x0, 0x0 }
-  gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x1, 0x0, 0x1 }
+  gMarvellTokenSpaceGuid.PcdI2cControllersEnabled|{ 0x0, 0x1, 0x0, 0x0, 0x1 }
   gMarvellTokenSpaceGuid.PcdEepromI2cAddresses|{ 0x50, 0x57, 0x50, 0x57 }
   gMarvellTokenSpaceGuid.PcdEepromI2cBuses|{ 0x0, 0x0, 0x1, 0x1 }
   gMarvellTokenSpaceGuid.PcdI2cClockFrequency|250000000
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
index c2d7933..8bbc5b0 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h
@@ -56,8 +56,12 @@
 //
 // Platform description of I2C controllers
 //
-#define MV_SOC_I2C_PER_CP_COUNT          2
-#define MV_SOC_I2C_BASE(I2c)             (0x701000 + ((I2c) * 0x100))
+#define MV_SOC_I2C_PER_AP_COUNT          1
+#define MV_SOC_I2C_AP_BASE               (MV_SOC_AP806_BASE + 0x511000)
+#define MV_SOC_I2C_PER_CP_COUNT          3
+#define MV_SOC_I2C_BASE(I2c)             ((I2c < 2) ? \
+                                          (0x701000 + (I2c) * 0x100) : \
+                                          0x211000)
 
 //
 // Platform description of ICU (Interrupt Consolidation Unit) controllers
diff --git a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
index 584f445..355be64 100644
--- a/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
+++ b/Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c
@@ -157,7 +157,7 @@ ArmadaSoCDescI2cGet (
 
   CpCount = FixedPcdGet8 (PcdMaxCpCount);
 
-  *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT;
+  *DescCount = CpCount * MV_SOC_I2C_PER_CP_COUNT + MV_SOC_I2C_PER_AP_COUNT;
   Desc = AllocateZeroPool (*DescCount * sizeof (MV_SOC_I2C_DESC));
   if (Desc == NULL) {
     DEBUG ((DEBUG_ERROR, "%a: Cannot allocate memory\n", __FUNCTION__));
@@ -166,6 +166,9 @@ ArmadaSoCDescI2cGet (
 
   *I2cDesc = Desc;
 
+  Desc->I2cBaseAddress = MV_SOC_I2C_AP_BASE;
+  Desc++;
+
   for (CpIndex = 0; CpIndex < CpCount; CpIndex++) {
     for (Index = 0; Index < MV_SOC_I2C_PER_CP_COUNT; Index++) {
       Desc->I2cBaseAddress = MV_SOC_CP_BASE (CpIndex) + MV_SOC_I2C_BASE (Index);
-- 
2.7.4

[edk2-platforms: PATCH v2 6/6] Marvell/Armada80x0Db: Configure the CP1, comphy-2 to work with SFI 10G

[Marcin Wojtas]

From: Grzegorz Jaszczyk <jaz@semihalf.com>

By mistake port0 of the second PP2 controller was configured
to 5G speed, instead of 10G. Fix it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
---
 Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
index a28e330..c6510bb 100644
--- a/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
+++ b/Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc
@@ -137,7 +137,7 @@
   # 4: PCIE1         5 Gbps
   # 5: PCIE2         5 Gbps
   gMarvellTokenSpaceGuid.PcdChip1ComPhyTypes|{ $(CP_PCIE0), $(CP_SATA2), $(CP_SFI), $(CP_SATA3), $(CP_PCIE1), $(CP_PCIE2) }
-  gMarvellTokenSpaceGuid.PcdChip1ComPhySpeeds|{ $(CP_5G), $(CP_5G), $(CP_5_15625G), $(CP_5G), $(CP_5G), $(CP_5G) }
+  gMarvellTokenSpaceGuid.PcdChip1ComPhySpeeds|{ $(CP_5G), $(CP_5G), $(CP_10_3125G), $(CP_5G), $(CP_5G), $(CP_5G) }
 
   #UtmiPhy
   gMarvellTokenSpaceGuid.PcdUtmiControllersEnabled|{ 0x1, 0x1, 0x1, 0x0 }
-- 
2.7.4

Re: [edk2-platforms: PATCH v2 3/6] Marvell/Armada7k8k: Implement PMU interrupt handling

[Ard Biesheuvel]

On Tue, 16 Apr 2019 at 02:23, Marcin Wojtas <mw@semihalf.com> wrote:
>
> Generic handling of the PMU interrupts in UEFI and Linux with
> ACPI require enabling a dedicated handler in the EL3.
> Extend the PlatInitDxe with enabler code.
>
> Because for DT world the EL3 service must remain disabled,
> switch it off in the ExitBootServicesEvent. Its execution
> depends on the gEdkiiPlatformHasAcpiGuid status check in the new
> gEfiEventReadyToBootGuid routine.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Marcin Wojtas <mw@semihalf.com>
> ---
>  Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf |  6 ++
>  Silicon/Marvell/Include/IndustryStandard/MvSmc.h               |  2 +
>  Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c   | 82 ++++++++++++++++++++
>  3 files changed, 90 insertions(+)
>
> diff --git a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
> index e707fe9..df10526 100644
> --- a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
> +++ b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf
> @@ -25,6 +25,7 @@
>    PlatInitDxe.c
>
>  [Packages]
> +  ArmPkg/ArmPkg.dec
>    EmbeddedPkg/EmbeddedPkg.dec
>    MdeModulePkg/MdeModulePkg.dec
>    MdePkg/MdePkg.dec
> @@ -32,6 +33,7 @@
>
>  [LibraryClasses]
>    ArmadaIcuLib
> +  ArmSmcLib
>    ComPhyLib
>    DebugLib
>    MppLib
> @@ -40,6 +42,10 @@
>    UefiDriverEntryPoint
>    UtmiPhyLib
>
> +[Guids]
> +  gEdkiiPlatformHasAcpiGuid
> +  gEfiEventReadyToBootGuid
> +
>  [Protocols]
>    gMarvellPlatformInitCompleteProtocolGuid    ## PRODUCES
>
> diff --git a/Silicon/Marvell/Include/IndustryStandard/MvSmc.h b/Silicon/Marvell/Include/IndustryStandard/MvSmc.h
> index 0c90f11..e5c89d9 100644
> --- a/Silicon/Marvell/Include/IndustryStandard/MvSmc.h
> +++ b/Silicon/Marvell/Include/IndustryStandard/MvSmc.h
> @@ -20,5 +20,7 @@
>  #define MV_SMC_ID_COMPHY_POWER_OFF        0x82000002
>  #define MV_SMC_ID_COMPHY_PLL_LOCK         0x82000003
>  #define MV_SMC_ID_DRAM_SIZE               0x82000010
> +#define MV_SMC_ID_PMU_IRQ_ENABLE          0x82000012
> +#define MV_SMC_ID_PMU_IRQ_DISABLE         0x82000013
>
>  #endif //__MV_SMC_H__
> diff --git a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c
> index 18b6783..4012fd7 100644
> --- a/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c
> +++ b/Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c
> @@ -12,7 +12,12 @@
>
>  **/
>
> +#include <Guid/EventGroup.h>
> +
> +#include <IndustryStandard/MvSmc.h>
> +
>  #include <Library/ArmadaIcuLib.h>
> +#include <Library/ArmSmcLib.h>
>  #include <Library/DebugLib.h>
>  #include <Library/MppLib.h>
>  #include <Library/MvComPhyLib.h>
> @@ -21,6 +26,62 @@
>  #include <Library/UefiBootServicesTableLib.h>
>  #include <Library/UtmiPhyLib.h>
>
> +STATIC EFI_EVENT mArmada7k8kExitBootServicesEvent;
> +
> +/**
> +  Disable extra EL3 handling of the PMU interrupts for DT world.
> +
> +  @param[in]   Event                  Event structure
> +  @param[in]   Context                Notification context
> +
> +**/
> +STATIC
> +VOID

Please add EFIAPI here. I know it evaluates to nothing at the moment,
but since this is called via a function pointer by the DXE core, it
should have the correct prototype.

> +Armada7k8kExitBootServicesHandler (
> +  IN EFI_EVENT  Event,
> +  IN VOID      *Context
> +  )
> +{
> +  ARM_SMC_ARGS SmcRegs = {0};
> +
> +  SmcRegs.Arg0 = MV_SMC_ID_PMU_IRQ_DISABLE;
> +  ArmCallSmc (&SmcRegs);
> +
> +  return;
> +}
> +
> +/**
> +  Check if we boot with DT and trigger EBS event in such case.
> +
> +  @param[in]   Event                  Event structure
> +  @param[in]   Context                Notification context
> +
> +**/
> +STATIC
> +VOID

Same here

> +Armada7k8kOnReadyToBootHandler (
> +  IN EFI_EVENT  Event,
> +  IN VOID      *Context
> +  )
> +{
> +  EFI_STATUS    Status;
> +  VOID         *Interface;
> +
> +  Status = gBS->LocateProtocol (&gEdkiiPlatformHasAcpiGuid,
> +                  NULL,
> +                  (VOID **)&Interface);
> +  if (EFI_ERROR (Status)) {

Can we invert the logic (i.e. return early on success) with a comment
explaining why?

> +    Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES,
> +                    TPL_NOTIFY,
> +                    Armada7k8kExitBootServicesHandler,
> +                    NULL,
> +                    &mArmada7k8kExitBootServicesEvent);
> +    if (EFI_ERROR (Status)) {
> +      DEBUG ((DEBUG_ERROR, "%a: Fail to register EBS event\n", __FUNCTION__));
> +    }

Just use ASSERT_EFI_ERROR() here - this never fails in practice.

> +  }

Please close the event - ReadyToBoot could fire multiple times and you
only want the notification once.

> +}
> +
>  EFI_STATUS
>  EFIAPI
>  ArmadaPlatInitDxeEntryPoint (
> @@ -28,7 +89,9 @@ ArmadaPlatInitDxeEntryPoint (
>    IN EFI_SYSTEM_TABLE   *SystemTable
>    )
>  {
> +  ARM_SMC_ARGS  SmcRegs = {0};
>    EFI_STATUS    Status;
> +  EFI_EVENT     Event;
>
>    DEBUG ((DEBUG_ERROR, "\nArmada Platform Init\n\n"));
>
> @@ -43,5 +106,24 @@ ArmadaPlatInitDxeEntryPoint (
>    MppInitialize ();
>    ArmadaIcuInitialize ();
>
> +  /*
> +   * Enable EL3 PMU interrupt handler and
> +   * register the ReadyToBoot event.
> +   */
> +  SmcRegs.Arg0 = MV_SMC_ID_PMU_IRQ_ENABLE;
> +  ArmCallSmc (&SmcRegs);
> +
> +  Status = gBS->CreateEventEx (EVT_NOTIFY_SIGNAL,
> +                  TPL_CALLBACK,
> +                  Armada7k8kOnReadyToBootHandler,
> +                  NULL,
> +                  &gEfiEventReadyToBootGuid,
> +                  &Event);
> +  if (EFI_ERROR (Status)) {
> +    DEBUG ((DEBUG_ERROR,
> +      "%a: Fail to register OnReadyToBoot event\n",
> +      __FUNCTION__));
> +  }
> +

Just use ASSERT_EFI_ERROR here (as above)

>    return EFI_SUCCESS;
>  }
> --
> 2.7.4
>

I'll pick up the other patches, so no need to resend the whole series.

Re: [edk2-platforms: PATCH v2 0/6] Armada7k8k misc improvements

[Ard Biesheuvel]

On Tue, 16 Apr 2019 at 02:23, Marcin Wojtas <mw@semihalf.com> wrote:
>
> Hi,
>
> A second version of the patchset brings one, though significant
> change. An idea of using custom DtLoaderLib for the PMU IRQ handling
> was dropped. Instead use existing PlatInitDxe. The EL3 service
> is still switched off in the ExitBootServicesEvent. However its
> execution depends on the gEdkiiPlatformHasAcpiGuid status check in the new
> gEfiEventReadyToBootGuid routine.
>
> The patches are available in the github:
> https://github.com/MarvellEmbeddedProcessors/edk2-open-platform/commits/misc-upstream-r20190416
>
> I'm looking forward to your comments or remarks.
>
> Best regards,
> Marcin
>
> Changelog:
> v1 -> v2:
> * 3/6
>   - Use PlatInitDxe and gEfiEventReadyToBootGuid event
>
>
> Grzegorz Jaszczyk (1):
>   Marvell/Armada80x0Db: Configure the CP1, comphy-2 to work with SFI 10G
>
> Marcin Wojtas (4):
>   Marvell/Armada7k8k: AcpiTables: Enable edge trigger of PMU interrupt
>   Marvell/Armada7k8k: Switch to software-based watchdog
>   Marvell/Armada7k8k: ArmadaSoCDescLib: Add more I2C controllers
>
> Mark Kettenis (1):
>   Marvell/Armada7k8k: RealTimeClockLib: Update bus parameters
>

For the patches above

Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

Pushed as a8cf8edf747b..df2ad607e1be

>   Marvell/Armada7k8k: Implement PMU interrupt handling

I have responded with some comments on this one



>  Silicon/Marvell/Armada7k8k/Armada7k8k.dsc.inc                                  |  2 +-
>  Platform/Marvell/Armada70x0Db/Armada70x0Db.dsc                                 |  4 +-
>  Platform/Marvell/Armada80x0Db/Armada80x0Db.dsc                                 |  4 +-
>  Silicon/Marvell/Armada7k8k/Armada7k8k.fdf                                      |  2 +-
>  Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.inf                 |  6 ++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.h |  8 +-
>  Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.h         |  7 +-
>  Silicon/Marvell/Include/IndustryStandard/MvSmc.h                               |  2 +
>  Silicon/Marvell/Armada7k8k/Drivers/PlatInitDxe/PlatInitDxe.c                   | 82 ++++++++++++++++++++
>  Silicon/Marvell/Armada7k8k/Library/Armada7k8kSoCDescLib/Armada7k8kSoCDescLib.c |  5 +-
>  Silicon/Marvell/Armada7k8k/Library/RealTimeClockLib/RealTimeClockLib.c         |  5 ++
>  Silicon/Marvell/Armada7k8k/AcpiTables/Madt.aslc                                | 10 ++-
>  12 files changed, 123 insertions(+), 14 deletions(-)
>
> --
> 2.7.4
>