From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::22e; helo=mail-it0-x22e.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x22e.google.com (mail-it0-x22e.google.com [IPv6:2607:f8b0:4001:c0b::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 77BF82205B912 for ; Thu, 11 Jan 2018 02:04:31 -0800 (PST) Received: by mail-it0-x22e.google.com with SMTP id m11so19335293iti.1 for ; Thu, 11 Jan 2018 02:09:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=4R7U8gDWZxWCSeNoYKprILHC0zfDgTc5KskI4W8YglQ=; b=GFaDOJE8yBehKjVA7Dor8xu0YvsGbCoXY7Tfzwi+2npGQlqLm30rQFAydg13CSSlUY 69A3NK0xOeK5KXAP6Z1YFYMMkLAFVzgtWRD2UxdGxNvPFv0j00PjkDSgzqkoL0H7/KZs 4yN8qYBPXkGbyv4jALg5UovI9N+/M3NmIzDOc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=4R7U8gDWZxWCSeNoYKprILHC0zfDgTc5KskI4W8YglQ=; b=pBQtp5ywl1oCByyf7PYUyLHg0ofX2AVLlRZBHg27GIw02DEQozlYkEfedXLIgLF7j4 mL0QVMPrW6CsjYUGq3j08t/02I57GtY8SP7lt6019xJPQegNvJBYSihPvLF3p9r+//bX qKGPOxz8G+FiQT1co8niHa+xsPpwV6rGkiFiqgYZWiATb4n9LZjB0ZTAah2LNkxxAcot 7wYSi2D95At8MlS/ztvndGPlwYCw9RO6cyaaiEdLaG3qoRnXT3wNbacKwnh2qCjZKejB 3y0uasac7MvKkL27aZNhO1FcDmB3oZDqu6ZFnOX+da8ZfBcldE0AXPJVPK5c9MBgAhaQ GjeA== X-Gm-Message-State: AKwxyteL+c2h+Zy+4jyityz/eJsyyPSUo+559lo84dEdqTbLlG/JYqKE p1kRyhpcEfZCZhKAO9H4qXO7xjd+M9ROhgCFmhplMQ== X-Google-Smtp-Source: ACJfBou++g2LlWptc6QLhm9ZRHSCTaIDdW/j3AMPL+57jobWiBnfDsUzzubKEbXSkBYOdpcQz0eJr0Z3TqG2XKOnmcU= X-Received: by 10.36.184.3 with SMTP id m3mr675476ite.65.1515665384564; Thu, 11 Jan 2018 02:09:44 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.37.197 with HTTP; Thu, 11 Jan 2018 02:09:44 -0800 (PST) In-Reply-To: <6e0dbabe-a688-62cd-7600-31c497674610@Intel.com> References: <1515410208-14559-1-git-send-email-meenakshi.aggarwal@nxp.com> <1515410208-14559-2-git-send-email-meenakshi.aggarwal@nxp.com> <4ea591d7-5218-d174-7fde-90ecf8a76f02@Intel.com> <6e0dbabe-a688-62cd-7600-31c497674610@Intel.com> From: Ard Biesheuvel Date: Thu, 11 Jan 2018 10:09:44 +0000 Message-ID: To: "Ni, Ruiyu" Cc: Udit Kumar , Meenakshi Aggarwal , "edk2-devel@lists.01.org" , "Zeng, Star" , "leif.lindholm@linaro.org" Subject: Re: [RFC] SATA : Implemented NXP errata A008402 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Jan 2018 10:04:32 -0000 Content-Type: text/plain; charset="UTF-8" On 11 January 2018 at 02:25, Ni, Ruiyu wrote: > On 1/10/2018 5:52 PM, Ard Biesheuvel wrote: >> >> On 10 January 2018 at 09:43, Udit Kumar wrote: >>> >>> Hi Ruiyu, >>> >>>> -----Original Message----- >>>>> >>>>> >>>>> And this change will not impact any other hardware so no one is >>>>> basically >>>> >>>> impacted by this change. >>>> >>>> Your buggy HW only need the value zero. But the addition of PCD exposes >>>> an interface that can use any size of PRD. >>>> I am not sure the AtaAtapiPassThru can work if some platform sets the >>>> PCD >>>> value to others than 0 or 3F_FFFFh. >>> >>> >>> I don't see someone using this driver will set Pcd randomly, but I agree >>> on this >>> point other value should be handled. >>> Error or Assert could be added, if Pcd value is not 0 or 3F_FFFFh. >>> >>>> Can you please >>>> just duplicate the AtaAtapiPassThru in your platform? >>>> Because the driver is very stable today, not much code sync effort will >>>> be >>>> needed if core version is changed. >>> >>> >>> Duplicating is always a possibility :), but When we will push this >>> duplicated driver >>> (just for one line change) for upstreaming. >>> will this be acceptable ?? >> >> >> My main concern with this (and with using a PCD) is that the setting >> affects all SATA controllers in the system, including ones the you >> stick into a PCIe slot. >> >> So I think forking the driver is the only possible solution, but it >> will not be a one-line change: you need to ensure that you apply the >> workaround only to the SATA controllers in the SoC. >> > > Depending on the new driver's location. The package owner decides > whether forking is acceptable :) > I think forking is reasonable in this case: the workaround does not belong in generic code, and it seems only early silicon is affected anyway.