From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-it0-x236.google.com (mail-it0-x236.google.com [IPv6:2607:f8b0:4001:c0b::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0CF471A1E63 for ; Sat, 27 Aug 2016 09:37:47 -0700 (PDT) Received: by mail-it0-x236.google.com with SMTP id j128so8763169ith.0 for ; Sat, 27 Aug 2016 09:37:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:from:date:message-id:subject:to:cc :content-transfer-encoding; bh=IYCIrEpWMqciHy1VW28WxZCl6pEJ7Mu5qZAnzwsDHtY=; b=cWUu+thvF6r2PZM02IL7GMjm8qIb2lQoiXUbTHvFv/tyywD/lsQLvbW9BsYtA+lW8o DabsBJ601wswLIb6/dB0F+NAqKDT2KG0yAU+bXbwHSidzRzgkDZja7IPY4mVOa6Ip55Z Nu07FLcymkfCQokynEBrVOYk3zjhAN2t6iDUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc :content-transfer-encoding; bh=IYCIrEpWMqciHy1VW28WxZCl6pEJ7Mu5qZAnzwsDHtY=; b=Ct+KeqmKC/asZL9M19iyhDLqZiFJdQbltqc7wX+y+cJsRCUsTIn5aU7BHXth8PS7PI Egq7ogrQbGKnztp3ZXHIUSre7uyGQkYfpzFOnE6FsqYKXnoCW8brMXgmBSbdhfWNMUG4 kOjOfZaHmxQmFeWzrniikT/Ftb2pIfkpWereckT+yD5XliapB4dhB2HXFQwFZvdyL/9l U9oqZ/XgcSCdc+CJ/kk4ciCyzyPU3SeWMPFLDDWX1gP9tfjsi7/lC3riHxMX4ei/DgS9 4sjyBSZ5jTzcZuausy+9De+eAjtYeR6aBUyK7+tkGDNaiFW89SiRQpE90dl3QhQ9xy13 3ktA== X-Gm-Message-State: AE9vXwOT52Zju5p+OiqKTOXie8LRtoHFbAeogxKpCp0sQoFb4llGbK7HYcTlHkdh6DCzN5JsVRsOwlp78cvQLAh1 X-Received: by 10.107.40.133 with SMTP id o127mr10236096ioo.183.1472315866212; Sat, 27 Aug 2016 09:37:46 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Sat, 27 Aug 2016 09:37:45 -0700 (PDT) From: Ard Biesheuvel Date: Sat, 27 Aug 2016 17:37:45 +0100 Message-ID: To: edk2-devel-01 , "afish@apple.com" , "Kinney, Michael D" , "Gao, Liming" Cc: Leif Lindholm , Alan Ott , Daniil Egranov Subject: use of EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 27 Aug 2016 16:37:47 -0000 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable The UEFI spec describes the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute as follows: """ EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE=EF=80=A0 This bit may only be used in the Attributes parameter to AllocateBuffer(). If this bit is set, then the PCI controller that is requesting a buffer through AllocateBuffer() is capable of producing PCI Dual Address Cycles, so it is able to access a 64-bit address space. If this bit is not set, then the PCI controller that is requesting a buffer through AllocateBuffer() is not capable of producing PCI Dual Address Cycles, so it is only able to access a 32-bit address space. """ However, both the UEFI driver writer's guide, and the de facto use in Tianocore violate this, i.e., it use the pattern """ // // Enable Command register and Dual Address Cycle // Status =3D PciIo->Attributes ( PciIo, EfiPciIoAttributeOperationEnable, (PciSupports & EFI_PCI_DEVICE_ENABLE) | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, NULL ); """ to enable it in the PCI I/O layer, and the Map/Unmap implementations will switch to 64-bit flavors of the map operation, by the likes of """ if ((PciIoDevice->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) !=3D 0) { Operation =3D (EFI_PCI_IO_PROTOCOL_OPERATION) (Operation + EfiPciOperationBusMasterRead64); } """ So what should we be doing in new code that needs to support 64-bit DMA? --=20 Ard.