From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: Michael Zimmermann <sigmaepsilon92@gmail.com>
Cc: "edk2-devel@lists.01.org" <edk2-devel@ml01.01.org>,
Leif Lindholm <leif.lindholm@linaro.org>
Subject: Re: System hang when using SetMemoryAttributes
Date: Mon, 26 Sep 2016 10:00:07 -0700 [thread overview]
Message-ID: <CAKv+Gu-6XTQBzwN=p3-xEO_OhGwYFaOXC-QqdAyb8QJ+ku-Z9A@mail.gmail.com> (raw)
In-Reply-To: <CAN9vWDJuKuW0vScmOZAOP37OWLCjM+6JPvzk9WejZ8ou3zh_JA@mail.gmail.com>
On 26 September 2016 at 05:52, Michael Zimmermann
<sigmaepsilon92@gmail.com> wrote:
>> Are you saying your framebuffer does work with cached attributes? That
>> would mean the graphics device is DMA coherent, which is actually a
>> good thing. What hardware are we talking about here?
> yes it does but ofc, it causes glitches since the writes aren't always
> synced correctly.
> My edk2 port is cross platorm by using PrePi and a function table provided
> by another bootloader for hardware communication.
>
> The device that's broken is 'Asus Zenfone 2 Laser ZE550KL' which uses a
> 'Qualcomm MSM8939 Snapdragon 615' chipset.
>
I couldn't find the exact info on this particular SoC, but in some
cases, devices are DMA coherent at L2 but not L1.
Does it help if you clean (not invalidate) the cache by virtual
address after each BLT operation? Note that the 'by virtual address'
bit is important in coherent systems, simply cleaning the whole L1 is
*not* guaranteed to work. [use WriteBackDataCacheRange()]
next prev parent reply other threads:[~2016-09-26 17:00 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-25 19:01 System hang when using SetMemoryAttributes Michael Zimmermann
2016-09-26 6:35 ` Ard Biesheuvel
2016-09-26 7:13 ` Michael Zimmermann
2016-09-26 7:44 ` Michael Zimmermann
2016-09-26 10:23 ` Ard Biesheuvel
2016-09-26 12:44 ` Michael Zimmermann
2016-09-26 12:47 ` Ard Biesheuvel
2016-09-26 12:52 ` Michael Zimmermann
2016-09-26 17:00 ` Ard Biesheuvel [this message]
2016-09-26 20:25 ` Michael Zimmermann
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