From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-io0-x236.google.com (mail-io0-x236.google.com [IPv6:2607:f8b0:4001:c06::236]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id C40CA1A1DF3 for ; Mon, 26 Sep 2016 10:00:08 -0700 (PDT) Received: by mail-io0-x236.google.com with SMTP id e66so99059765iod.1 for ; Mon, 26 Sep 2016 10:00:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=xhFgTx+zhO5uSxWEC6thL/ia7fg2gvARRtz5Ee7i3DM=; b=cM8cb5KLRlhpazjsWpo00SKK6Xej1yz815QMrrGsWfZFp0oYmKGXMaOJNcS6Lnz33i Iumgi6J3A4VVcrX+uGPpcZqTP4GyqluDBojJzxrpBzia+eMtnt4bqu8ZJG4GhkHM52Ov Dj/KiE69JMqEvrHqB+NlTjCgEZczZ5cqbf9tk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=xhFgTx+zhO5uSxWEC6thL/ia7fg2gvARRtz5Ee7i3DM=; b=gJ29Qcj9VmoPIdXfLVkB0WkKbBF2eA96wWVz2s1f8pjuQdWhyQxfgidnOjtUN58MYh ZFmI+jfxUJi2HGMyilriGclSOTpkySZ8rYtIV9LRQCEuu1zJlXkchxRJJqNcGTKDp2mQ /JdY6+J7Qyz5BqBs9eoiSBV5U1yRfCnwdo/BfrB7BLeAR3+RlC3rAijbGfR7SGYcysAD oEpTLB4yzIScp8162ssLSr4xFNoWs8peBuVxX2PNtnwKCPD4pLlblyuwzq0JuB2hRAww rXWlgWvFI4DbD++oWNRzPP212H9r0LP2kKk/vXjV9n4zWDxoLGCh/EeFGNMdcKctEnwL 3ppA== X-Gm-Message-State: AA6/9RkAni+tIkWiA1ZyIcw1kOxXEmwnNIJ8HthiQURHiOKeqTnMFs84Q2WL7HS+najXNmWMRxNldRBMNDBjvToh X-Received: by 10.107.35.209 with SMTP id j200mr23284515ioj.26.1474909207975; Mon, 26 Sep 2016 10:00:07 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.204.195 with HTTP; Mon, 26 Sep 2016 10:00:07 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Mon, 26 Sep 2016 10:00:07 -0700 Message-ID: To: Michael Zimmermann Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: System hang when using SetMemoryAttributes X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Sep 2016 17:00:09 -0000 Content-Type: text/plain; charset=UTF-8 On 26 September 2016 at 05:52, Michael Zimmermann wrote: >> Are you saying your framebuffer does work with cached attributes? That >> would mean the graphics device is DMA coherent, which is actually a >> good thing. What hardware are we talking about here? > yes it does but ofc, it causes glitches since the writes aren't always > synced correctly. > My edk2 port is cross platorm by using PrePi and a function table provided > by another bootloader for hardware communication. > > The device that's broken is 'Asus Zenfone 2 Laser ZE550KL' which uses a > 'Qualcomm MSM8939 Snapdragon 615' chipset. > I couldn't find the exact info on this particular SoC, but in some cases, devices are DMA coherent at L2 but not L1. Does it help if you clean (not invalidate) the cache by virtual address after each BLT operation? Note that the 'by virtual address' bit is important in coherent systems, simply cleaning the whole L1 is *not* guaranteed to work. [use WriteBackDataCacheRange()]