From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::22f; helo=mail-it0-x22f.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x22f.google.com (mail-it0-x22f.google.com [IPv6:2607:f8b0:4001:c0b::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AD0FE21144D10 for ; Wed, 19 Sep 2018 16:38:08 -0700 (PDT) Received: by mail-it0-x22f.google.com with SMTP id d10-v6so10728917itj.5 for ; Wed, 19 Sep 2018 16:38:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=UFmJdY0G1lebya7cnOE+KMP9lad37v4y/lmBhl1FnjQ=; b=BWkIRVy+BgaJRbcHy7XxliA20DwvmZhk2bs8f/T+mLBzjRop0QBa8LOtdccMze6Eiz EEQdfaWzkDPGnlfv9V4fxuyXeyU0/1+6b+J9BOEfLSvlWy/PBAcgJrr2rGRV51qzanFH bzehLkhSG14atpjFrg/K0Uo/+1Pw0Lhb3Jxcw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=UFmJdY0G1lebya7cnOE+KMP9lad37v4y/lmBhl1FnjQ=; b=V3upkisFlQsh+clA5vQSKTH2OR6yYiUCpFkvYBn1El9z2OPqSliEq7txgcG3Bsd4GB frJ6SUs26frJFYsbeVR4GnBxF+GQhBGBCxEp0CYVplnmI2aYEAPEc1vJDTKuaqa1YQ39 asgK9Jr2HZVygLMOAP73WICCmtGDLvD+YEOFeDQ1jjQbgenWoaXgqDFL7pjBNBLud8Z/ jtH4Zssu37faH5UkVBldn/yrh1mcMZ3k+FzNv1hRXULcxH1fRLhKmO+tezKsi/V/LPbd XekT+IXxqRrUdG4hztua/jPpvTF7gRd8b3qRY6ZJENfEn9VU6kNb0PszsV/feVIDsw4l TN0g== X-Gm-Message-State: APzg51BwU8rSkxHPSaCHjJceX2kMFPqMlCGrrp9bCz/NRuAO1JBxBCPk l4p/9xOHKrmfCHqObfX6k3ltJwEXL2v+nhRp161AZg== X-Google-Smtp-Source: ANB0Vda4ssSIan9hig8zJtML9XyScLUpiUqrCT8fk09+IJ98CcTOEKRVGplOpGdQiKxwHicLrjTapQ5hvMffGQDKjy8= X-Received: by 2002:a24:52cd:: with SMTP id d196-v6mr252645itb.58.1537400287681; Wed, 19 Sep 2018 16:38:07 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a6b:2848:0:0:0:0:0 with HTTP; Wed, 19 Sep 2018 16:38:06 -0700 (PDT) In-Reply-To: References: From: Ard Biesheuvel Date: Wed, 19 Sep 2018 16:38:06 -0700 Message-ID: To: Vladimir Olovyannikov Cc: "edk2-devel@lists.01.org" X-Content-Filtered-By: Mailman/MimeDel 2.1.29 Subject: Re: Stack issue after warm UEFI reset and MMU enabling on an Armv8 platform X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Sep 2018 23:38:09 -0000 Content-Type: text/plain; charset="UTF-8" On 19 September 2018 at 15:55, Vladimir Olovyannikov < vladimir.olovyannikov@broadcom.com> wrote: > Hi All, > > > > I need UEFI experts help on the problem with Armv8 board on warm UEFI > reset. > > Cold reset works fine. > > > > Here is how I set up a warm reset: > > > > STATIC > > EFI_STATUS > > ShutdownUefiBootServices ( > > VOID > > ) > > { > > EFI_STATUS Status; > > UINTN MemoryMapSize; > > EFI_MEMORY_DESCRIPTOR *MemoryMap; > > UINTN MapKey; > > UINTN DescriptorSize; > > UINT32 DescriptorVersion; > > UINTN Pages; > > > > MemoryMap = NULL; > > MemoryMapSize = 0; > > Pages = 0; > > > > do { > > Status = gBS->GetMemoryMap ( > > &MemoryMapSize, > > MemoryMap, > > &MapKey, > > &DescriptorSize, > > &DescriptorVersion > > ); > > if (Status == EFI_BUFFER_TOO_SMALL) { > > > > Pages = EFI_SIZE_TO_PAGES (MemoryMapSize) + 1; > > MemoryMap = AllocatePages (Pages); > > > > // > > // Get System MemoryMap > > // > > Status = gBS->GetMemoryMap ( > > &MemoryMapSize, > > MemoryMap, > > &MapKey, > > &DescriptorSize, > > &DescriptorVersion > > ); > > } > > > > // Don't do anything between the GetMemoryMap() and ExitBootServices() > > if (!EFI_ERROR(Status)) { > > Status = gBS->ExitBootServices (gImageHandle, MapKey); > > if (EFI_ERROR(Status)) { > > FreePages (MemoryMap, Pages); > > MemoryMap = NULL; > > MemoryMapSize = 0; > > } > > } > > } while (EFI_ERROR(Status)); > > > > return Status; > > } > > > > Then perform > > ArmCleanDataCache (); > > ArmInvalidateDataCache (); > > ArmDisableInstructionCache (); > > ArmInvalidateInstructionCache (); > These don't do anything useful on ARM. You can only reliably perform cache maintenance by virtual address. ArmDisableMmu (); > > > ... so after this call returns, all bets are off with regards to whether what is popped from the stack is actually what we pushed when we entered the function. > Then jump to start of FV: > > > > typedef > > VOID > > (EFIAPI *START_FV)( > > VOID > > ); > > StartOfFv = (START_FV)(UINTN)PcdGet64(PcdFvBaseAddress); > > StartOfFv (); > > > > Now this is what happens on warm reset: > > reset -c warm > > 1. Until ArmEnableMmu() gets called, everything works as expected. > > Here is the stack right before ArmEnableMmu() is called: > > ArmConfigureMmu+0x4f8 > > InitMmu+0x24 > > MemoryPeim+0x440 > > PrePiMain+0x114 > > PrimaryMain+0x68 > > CEntryPoint+0xC4 > > EL2:0x00000000800008BC > > ----- End of stack info ----- > > > > 2. Here is the stack as soon as Mmu is enabled with ArmEnableMmu() : > > ArmConfigureMmu+0x4fc <-- This one is correct, at line 745 in > ArmConfigureMmu() in ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c > (return EFI_SUCCESS) > > _ModuleEntryPoint+0x24 <-- Wrong. This points directly to > ASSERT(FALSE); and to CpuDeadLoop() in DxeCoreEntryPoint.c, lines 59-60. > > El2:0x000000008E5E8300 <-- Absolutely bogus > > --- End of stack info --- > > > > So, as soon as ArmEnableMmu() exits, execution jumps directly to > CpuDeadLoop() in DxeCoreEntryPoint of _ModuleEntryPoint(). > > > > Would be grateful for any advice. > > > > Thank you, > > Vladimir > > >