From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c06::242; helo=mail-io0-x242.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-io0-x242.google.com (mail-io0-x242.google.com [IPv6:2607:f8b0:4001:c06::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id F04F92205B931 for ; Fri, 12 Jan 2018 00:37:44 -0800 (PST) Received: by mail-io0-x242.google.com with SMTP id b198so2338409iof.6 for ; Fri, 12 Jan 2018 00:42:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=S3kVdWTr16EYFjFj0PBJ3sQXVa/KrikpaNgItNdS3nM=; b=hF2XCvPBPNCBH7PyrmjCO82ujwNutETm5KqCQLR19eN+QDd1/HxLKnoRAdKlFq0Jw6 GSU6KdOlFcaTllnO2Cbw+6fPBkWFH8uWIb5nnZxqV9f6k8QJePY+R18nU3vQVWcmsztp Ine3S3R/Hze5XAwBIUEbZ/FFXDu2DMiA7+cwU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=S3kVdWTr16EYFjFj0PBJ3sQXVa/KrikpaNgItNdS3nM=; b=V/GuOPDp7H94N/sG6Qowu3kMbQfJYM/8lfToHaIRfx6JUx+Qktkd0zOwmLI/CHJu1M q/2FfCF8f2XzMMq3diKUtfiQth0C9ih1TUvrRN3mPCfhddoOTvSoPEW+Fs8occVFsv90 +xxzjA7LMkKl2lqyz+kPDWCHWoEJL4Zx+aiG9tbCqXEmJt234LmUeF3XvbAQcEsjBd82 gyGYuS1nBrktNUC/BKdum/p9AZluSzfWRge5Q7GepH+yLCu9HXC2K/tHCXqjc+cYl/mE oYVdvWKIfLKfIX67pQBsNQ9AP7FjyBXNCcE1kZrCnaUp63bd5JPYqrjNrOIvAzl6XcJs ftEQ== X-Gm-Message-State: AKwxytfs6380vhFDtDLobrwR1B60NdwFPPWd2mBbVUEy4juFbAYHV57I YUAQmFpqZiPiUF7/13NQo+x2gvHGS/9Asyor5yfisw== X-Google-Smtp-Source: ACJfBos9CPBOPK/YTwLzC9Oxs5XPo34fUcSIAkI6BdZ9ymUcO5vdPnstCe59bOFx8pQqb7XgHM8YXlahhgTHlo1V+jw= X-Received: by 10.107.9.154 with SMTP id 26mr7152767ioj.52.1515746578679; Fri, 12 Jan 2018 00:42:58 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.37.197 with HTTP; Fri, 12 Jan 2018 00:42:58 -0800 (PST) In-Reply-To: <20180110063823.19911-1-sigmaepsilon92@gmail.com> References: <20180110063823.19911-1-sigmaepsilon92@gmail.com> From: Ard Biesheuvel Date: Fri, 12 Jan 2018 08:42:58 +0000 Message-ID: To: Michael Zimmermann Cc: "edk2-devel@lists.01.org" , Leif Lindholm Subject: Re: [PATCH] ArmPkg/Library/ArmLib: add ArmWriteSctlr X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Jan 2018 08:37:45 -0000 Content-Type: text/plain; charset="UTF-8" On 10 January 2018 at 06:38, Michael Zimmermann wrote: > This currently isn't needed by anything in the edk2 tree but > it's useful for externally maintained platforms which have > to set this register e.g. to disable alignment aborts. > > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Michael Zimmermann Thanks Michael You missed the AArch64 version, could you add it there as well? Otherwise, the libraries get out of sync. > --- > ArmPkg/Include/Library/ArmLib.h | 6 ++++++ > ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 4 ++++ > ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm | 3 +++ > 3 files changed, 13 insertions(+) > > diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h > index 24e84c7a1965..ffda50e9d767 100644 > --- a/ArmPkg/Include/Library/ArmLib.h > +++ b/ArmPkg/Include/Library/ArmLib.h > @@ -558,6 +558,12 @@ ArmReadSctlr ( > VOID > ); > > +VOID > +EFIAPI > +ArmWriteSctlr ( > + IN UINT32 Value > + ); > + > UINTN > EFIAPI > ArmReadHVBar ( > diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S > index a0b5ed500298..149b57e059ee 100644 > --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S > +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S > @@ -153,6 +153,10 @@ ASM_FUNC(ArmReadSctlr) > mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data) > bx lr > > +ASM_FUNC(ArmWriteSctlr) > + mcr p15, 0, r0, c1, c0, 0 > + bx lr > + > ASM_FUNC(ArmReadCpuActlr) > mrc p15, 0, r0, c1, c0, 1 > bx lr > diff --git a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm > index 85b0feee20d4..219140c22b13 100644 > --- a/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm > +++ b/ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm > @@ -155,6 +155,9 @@ > mrc p15, 0, r0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data) > bx lr > > + RVCT_ASM_EXPORT ArmWriteSctlr > + mcr p15, 0, r0, c1, c0, 0 > + bx lr > > RVCT_ASM_EXPORT ArmReadCpuActlr > mrc p15, 0, r0, c1, c0, 1 > -- > 2.15.1 >