From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4001:c0b::244; helo=mail-it0-x244.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it0-x244.google.com (mail-it0-x244.google.com [IPv6:2607:f8b0:4001:c0b::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 392B721CEB148 for ; Wed, 25 Oct 2017 11:06:40 -0700 (PDT) Received: by mail-it0-x244.google.com with SMTP id j140so2083960itj.1 for ; Wed, 25 Oct 2017 11:10:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=SplZ50PpcK6449WJ4+ee77jBn49XWJ/1XawVIujJjUU=; b=kBIUnV3cy+iqyc4ETJDe0tILkpchLhmFeZdKuKVFqKk8qAaYyMaymmEv2AtpEGHEk/ ov4IEtAW2FzcKG7CYuqJYor5qFOdiWd1tiP3CBaGDhbgTwnGltBu56ZKUOsAX/QcpoiX B8fMm9jJcNLuEHuazt6ahm+7KY5m6wBQrDQzk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=SplZ50PpcK6449WJ4+ee77jBn49XWJ/1XawVIujJjUU=; b=lf0gKMbU+8kOFbNBQugZGt0DXvUAnee/eyYWtNd/xDMELegPvuyCA2kHyPlQ/ARmlh 7bWG2CU06Kwqp9GbV+aGUNsGd3WD8vLAkglshHx9Jgv7Z1bIjx/8l892jqCsSknfCIwj Y5tHcsucGXiknNoaOyFRQCtEJWonufw0QDpQy7SUN6KJ/SMdH62jk0nb+ecj0Jd5p8UJ n9u5Nz8bSO3t9073Ho1P6fhYcwLk2ozN416lLNUeCZVOsug1petbTKg9vxt1PltA5qnu 2NhGJUvmzSxmw/7RV+yTwXiIh/yVNcVcO7oPJDziskCAaNXozwu+D/7obwB7R971K4eZ Q9Pw== X-Gm-Message-State: AMCzsaVVflW2dOvPnb4CJ2YABXSrrw/sqQQcpKFtazVgm3+xab6PLEq0 PhkBnINiVDl5OP9TwcM9PwUusXum3B4lQihDhCIhMjVy X-Google-Smtp-Source: ABhQp+RvbMfkGrMz/jBvuu+Zyo77NJnQQbP3R43TXgSOt6X6kBtjT+R1+GPWxb5Yo2yGbt6eUTWBS32XCp5UlG41cRg= X-Received: by 10.36.210.198 with SMTP id z189mr3113572itf.65.1508955025310; Wed, 25 Oct 2017 11:10:25 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.131.167 with HTTP; Wed, 25 Oct 2017 11:10:24 -0700 (PDT) In-Reply-To: <20170926201529.11644-19-evan.lloyd@arm.com> References: <20170926201529.11644-1-evan.lloyd@arm.com> <20170926201529.11644-19-evan.lloyd@arm.com> From: Ard Biesheuvel Date: Wed, 25 Oct 2017 19:10:24 +0100 Message-ID: To: Evan Lloyd Cc: "edk2-devel@lists.01.org" , <"ard.biesheuvel@linaro.org"@arm.com>, <"leif.lindholm@linaro.org"@arm.com>, <"Matteo.Carlini@arm.com"@arm.com>, <"nd@arm.com"@arm.com> Subject: Re: [PATCH 18/19] ArmPlatformPkg: Reserving framebuffer at build X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 25 Oct 2017 18:06:41 -0000 Content-Type: text/plain; charset="UTF-8" On 26 September 2017 at 21:15, wrote: > From: Girish Pathak > > Currently frame buffer memory is either reserved in special VRAM or > dynamically allocated using boot services memory allocation functions. > When allocated using boot services calls the memory has to be allocated > as EfiBootServicesData. Unfortunately failures have been seen with this > case. There is also an unfortunate lack of control on the placement of > the frmae buffer. > > This change introduces two PCDs, PcdArmLcdFrameBufferBase and > PcdArmLcdFrameBufferSize which enable build time reservation of the > frame buffer, avoiding the need to allocate dynamically. This allows > the frame buffer to appear as "I/O memory" outside of the normal RAM > map, which is similar to the "VRAM" case. > > This change has no impact on current code, only enables the option > of build time reservation of frame buffers. > Where is the memory actually being reserved? And if it is reserved, how can the OS reclaim it if it is not interested in using the GOP? > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Girish Pathak > Signed-off-by: Evan Lloyd > --- > ArmPlatformPkg/ArmPlatformPkg.dec | 4 ++++ > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf | 4 +++- > ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c | 21 ++++++++++++++++++-- > 3 files changed, 26 insertions(+), 3 deletions(-) > > diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec > index 77eb789ad8fe4ddcbf25abefad2e7b7d3d5e1722..0174f63e77f5b8430e106289366feb9a6577fb99 100644 > --- a/ArmPlatformPkg/ArmPlatformPkg.dec > +++ b/ArmPlatformPkg/ArmPlatformPkg.dec > @@ -111,6 +111,10 @@ [PcdsFixedAtBuild.common] > gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026 > gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027 > > + ## If set, frame buffer memory will be reserved and mapped in the system RAM > + gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x0|UINT32|0x00000033 > + gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000034 > + > ## PL180 MCI > gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028 > gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029 > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > index 9b16f7f0c4731ab72bfb1008a073e81842bae82b..60789e9b8ff1b936db04953a765fb164b0e85a40 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf > @@ -1,5 +1,5 @@ > #/* @file > -# Copyright (c) 2011-2014, ARM Limited. All rights reserved. > +# Copyright (c) 2011-2017, ARM Limited. All rights reserved. > # > # This program and the accompanying materials > # are licensed and made available under the terms and conditions of the BSD License > @@ -57,6 +57,8 @@ [FixedPcd] > gArmTokenSpaceGuid.PcdArmPrimaryCore > > gArmPlatformTokenSpaceGuid.PcdCoreCount > + gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase > + gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize > > [Ppis] > gArmMpCoreInfoPpiGuid > diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > index 6379e81751fca5e7972c5c30f305be65fd1ae71d..5cd529750a3d2d3b0d381b58d875d378afaba2c2 100644 > --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMMem.c > @@ -1,6 +1,6 @@ > /** @file > * > -* Copyright (c) 2011-2016, ARM Limited. All rights reserved. > +* Copyright (c) 2011-2017, ARM Limited. All rights reserved. > * > * This program and the accompanying materials > * are licensed and made available under the terms and conditions of the BSD License > @@ -20,8 +20,10 @@ > #include > #include > > +#define FRAME_BUFFER_DESCRIPTOR ((FixedPcdGet64 (PcdArmLcdDdrFrameBufferBase) != 0) ? 1 : 0) > + > // Number of Virtual Memory Map Descriptors > -#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 9 > +#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS (9 + FRAME_BUFFER_DESCRIPTOR) > > // DDR attributes > #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK > @@ -142,6 +144,21 @@ ArmPlatformGetVirtualMemoryMap ( > // > VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; > > + // Map region for the frame buffer in the system RAM > +#if (FixedPcdGet32 (PcdArmLcdDdrFrameBufferSize) != 0) > + VirtualMemoryTable[++Index].PhysicalBase = FixedPcdGet64 (PcdArmLcdDdrFrameBufferBase); > + VirtualMemoryTable[Index].VirtualBase = FixedPcdGet64 (PcdArmLcdDdrFrameBufferBase); > + VirtualMemoryTable[Index].Length = FixedPcdGet32 (PcdArmLcdDdrFrameBufferSize); > + /* Map as Normal Non-Cacheable memory, so that we can use the accelerated > + * SetMem/CopyMem routines that may use unaligned accesses or > + * DC ZVA instructions. If mapped as device memory, these routine may cause > + * alignment faults. > + * NOTE: The attribute value is misleading, it indicates memory map type as > + * an un-cached, un-buffered but allows buffering and reordering. > + */ > + VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED; > +#endif > + > // Map sparse memory region if present > if (HasSparseMemory) { > VirtualMemoryTable[++Index].PhysicalBase = SparseMemoryBase; > -- > Guid("CE165669-3EF3-493F-B85D-6190EE5B9759") >