* [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix
@ 2018-01-18 15:01 Ming Huang
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
` (15 more replies)
0 siblings, 16 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
*** BLURB HERE ***
Jason Zhang (4):
Hisilicon/D05: Add PPTT support
Hisilicon D03/D05: Add capsule upgrade support
Hisilicon D03/D05: Open SasPlatform source code
Hisilicon D03/D05: Open SnpPlatform source code
Ming Huang (9):
Hisilicon D03/D05：Switch to Generic BDS driver
Hisilicon D03/D05: Optimize the feature of BMC set boot option
Hisilicon/Smbios: modify type 4
Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
Hisilicon/D05/ACPI: Add ITS PXM
Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
Hisilicon/Library: Add OsBootLib
Hisilicon D03/D05: Update firmware version to 18.02
Yan Zhang (1):
Hisilicon/PCIe: Disable PCIe ASPM
Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++
Platform/Hisilicon/D03/D03.dsc | 51 +-
Platform/Hisilicon/D03/D03.fdf | 84 ++-
Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++
Platform/Hisilicon/D05/D05.dsc | 56 +-
Platform/Hisilicon/D05/D05.fdf | 85 ++-
Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 +++
Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 ++
Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++
Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 +-
Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 +++
Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 ++
Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 ++
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 ++
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 +
Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 +
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 +
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 +-
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +-
Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 +
Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 +++++++++++++
Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 ++++
Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 ++
Silicon/Hisilicon/HisiPkg.dec | 3 +
Silicon/Hisilicon/Hisilicon.dsc.inc | 12 +-
Silicon/Hisilicon/Hisilicon.fdf.inc | 9 +
Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +-
Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 +
Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++
Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++
Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +
Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +
Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 +
Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 +++++++++++++
Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 ++
Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 ++++
Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++
Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 ++
Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 +++++++++++++++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 601 +++++++++++++++++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 91 +++
Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 +++
Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++
Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------
Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +-
51 files changed, 4987 insertions(+), 489 deletions(-)
create mode 100644 Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
create mode 100644 Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
create mode 100644 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
create mode 100644 Silicon/Hisilicon/Include/Library/OemDevicePath.h
create mode 100644 Silicon/Hisilicon/Include/Library/OsBootLib.h
create mode 100644 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
--
1.9.1
^ permalink raw reply [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 10:16 ` Ard Biesheuvel
` (2 more replies)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver Ming Huang
` (14 subsequent siblings)
15 siblings, 3 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
From: Jason Zhang <zhangjinsong2@huawei.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D05/D05.dsc | 1 +
Platform/Hisilicon/D05/D05.fdf | 1 +
Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
7 files changed, 677 insertions(+), 27 deletions(-)
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 77a89fd..710339c 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -506,6 +506,7 @@
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
+ Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
#
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 78ab0c8..97de4d2 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
+ INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
#
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
index 808219a..f1927e8 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
@@ -19,6 +19,7 @@
#ifndef _HI1610_PLATFORM_H_
#define _HI1610_PLATFORM_H_
+#include <IndustryStandard/Acpi.h>
//
// ACPI table information used to initialize tables.
@@ -44,5 +45,31 @@
}
#define HI1616_WATCHDOG_COUNT 2
+#define HI1616_GIC_STRUCTURE_COUNT 64
+
+#define HI1616_MPID_TA_BASE 0x10000
+#define HI1616_MPID_TB_BASE 0x30000
+#define HI1616_MPID_TA_2_BASE 0x50000
+#define HI1616_MPID_TB_2_BASE 0x70000
+
+// Differs from Juno, we have another affinity level beyond cluster and core
+#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
+#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
+#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
+#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
+
+//
+// Multiple APIC Description Table
+//
+#pragma pack (1)
+
+typedef struct {
+ EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
+ EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
+ EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
+ EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
+} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
+
+#pragma pack ()
#endif
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
index 169ee72..33dca03 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
@@ -1,9 +1,9 @@
/** @file
* Multiple APIC Description Table (MADT)
*
-* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
-* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
+* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
*
@@ -19,34 +19,11 @@
*
**/
-
-#include <IndustryStandard/Acpi.h>
+#include "Hi1616Platform.h"
#include <Library/AcpiLib.h>
#include <Library/AcpiNextLib.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
-#include "Hi1616Platform.h"
-
-// Differs from Juno, we have another affinity level beyond cluster and core
-// 0x20000 is only for socket 0
-#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
-#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
-#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
-#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
-
-//
-// Multiple APIC Description Table
-//
-#pragma pack (1)
-
-typedef struct {
- EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
- EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
- EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
- EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
-} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
-#pragma pack ()
EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
{
diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
new file mode 100644
index 0000000..eac4736
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
@@ -0,0 +1,447 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
+*
+**/
+
+#include "Pptt.h"
+
+EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
+EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
+
+EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
+ ARM_ACPI_HEADER (
+ EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
+ EFI_ACPI_DESCRIPTION_HEADER,
+ EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
+ );
+
+EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
+{
+ {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
+};
+
+EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
+{
+ {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
+ {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
+ {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
+ {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
+};
+
+EFI_STATUS
+InitCacheInfo(
+ )
+{
+ UINT8 Index;
+ PPTT_TYPE1_ATTRIBUTES Type1Attributes;
+ CSSELR_DATA CsselrData;
+ CCSIDR_DATA CcsidrData;
+
+ for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
+ CsselrData.Data = 0;
+ CcsidrData.Data = 0;
+ Type1Attributes.Data = 0;
+
+ if (Index == 0) { //L1I
+ CsselrData.Bits.InD = 1;
+ CsselrData.Bits.Level = 0;
+ Type1Attributes.Bits.CacheType = 1;
+ } else if (Index == 1) {
+ Type1Attributes.Bits.CacheType = 0;
+ CsselrData.Bits.Level = Index -1;
+ } else {
+ Type1Attributes.Bits.CacheType = 2;
+ CsselrData.Bits.Level = Index -1;
+ }
+
+ CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
+
+ if (CcsidrData.Bits.Wa == 1) {
+ Type1Attributes.Bits.AllocateType = 1;
+ if (CcsidrData.Bits.Ra == 1) {
+ Type1Attributes.Bits.AllocateType++;
+ }
+ }
+
+ if (CcsidrData.Bits.Wt == 1) {
+ Type1Attributes.Bits.WritePolicy = 1;
+ }
+ DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
+
+ mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
+ mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
+ mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
+ mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
+ mPpttCacheType1[Index].Associativity * \
+ mPpttCacheType1[Index].NumberOfSets;
+ mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
+ mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
+ PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
+ PPTT_TYPE1_LINE_SIZE_VALID;
+
+ }
+
+ // L3
+ mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
+ PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
+ PPTT_TYPE1_LINE_SIZE_VALID;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AddCoreTable(
+ IN VOID *PpttTable,
+ IN OUT VOID *PpttTableLengthRemain,
+ IN UINT32 Flags,
+ IN UINT32 Parent,
+ IN UINT32 ResourceNo,
+ IN UINT32 ProcessorId
+ )
+{
+ EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
+ EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
+ UINT32 *PrivateResource;
+ UINT8 Index;
+
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ PpttType0->Type = 0;
+ PpttType0->Flags = Flags;
+ PpttType0->Parent= Parent;
+ PpttType0->AcpiProcessorId = ProcessorId;
+ PpttType0->PrivateResourceNo = ResourceNo;
+ PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
+
+ *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
+ PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
+
+ // Add cache type structure
+ for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
+ PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
+ *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
+ }
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AddClusterTable (
+ IN VOID *PpttTable,
+ IN OUT VOID *PpttTableLengthRemain,
+ IN UINT32 Flags,
+ IN UINT32 Parent,
+ IN UINT32 ResourceNo
+ )
+{
+ EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
+ EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
+ UINT32 *PrivateResource;
+
+ if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ PpttType0->Type = 0;
+ PpttType0->Flags = Flags;
+ PpttType0->Parent= Parent;
+ PpttType0->PrivateResourceNo = ResourceNo;
+ PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
+
+ *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
+ PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
+
+ // Add cache type structure
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
+ PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
+ *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AddScclTable(
+ IN VOID *PpttTable,
+ IN OUT VOID *PpttTableLengthRemain,
+ IN UINT32 Flags,
+ IN UINT32 Parent,
+ IN UINT32 ResourceNo
+ )
+{
+ EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
+ EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
+ UINT32 *PrivateResource;
+
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ PpttType0->Type = 0;
+ PpttType0->Flags = Flags;
+ PpttType0->Parent= Parent;
+ PpttType0->PrivateResourceNo = ResourceNo;
+ PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
+
+ *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
+ PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
+
+ // Add cache type structure
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
+ PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
+ *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+AddSocketTable(
+ IN VOID *PpttTable,
+ IN OUT VOID *PpttTableLengthRemain,
+ IN UINT32 Flags,
+ IN UINT32 Parent,
+ IN UINT32 ResourceNo
+ )
+{
+ EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
+ EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
+ UINT32 *PrivateResource;
+ UINT8 Index;
+
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ PpttType0->Type = 0;
+ PpttType0->Flags = Flags;
+ PpttType0->Parent= Parent;
+ PpttType0->PrivateResourceNo = ResourceNo;
+ PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
+
+ *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
+ if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
+ DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
+
+ for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
+ if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
+ PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
+ *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
+ }
+
+ return EFI_SUCCESS;
+}
+
+VOID
+GetApic(
+EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
+VOID *PpttTable,
+IN UINT32 PpttTableLengthRemain,
+IN UINT32 Index1
+)
+{
+ UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
+ UINT32 SocketOffset, ScclOffset, ClusterOffset;
+ UINT32 Parent = 0;
+ UINT32 Flags = 0;
+ UINT32 ResourceNo = 0;
+ //Get APIC data
+ for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
+ SocketOffset = 0;
+ for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
+ ScclOffset = 0;
+ for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
+ ClusterOffset = 0;
+ for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
+
+ DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
+
+ if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
+ //This processor is unusable
+ DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
+ return;
+ }
+ if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
+ //This processor is unusable
+ Index1++;
+ continue;
+ }
+
+ if (SocketOffset == 0) {
+ //Add socket0 for type0 table
+ ResourceNo = PPTT_SOCKET_COMPONENT_NO;
+ SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
+ Parent = 0;
+ Flags = PPTT_TYPE0_SOCKET_FLAG;
+ AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
+ }
+ if (ScclOffset == 0) {
+ //Add socket0die0 for type0 table
+ ResourceNo = 1;
+ ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
+ Parent = SocketOffset;
+ Flags = PPTT_TYPE0_DIE_FLAG;
+ AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
+ }
+ if (ClusterOffset == 0) {
+ //Add socket0die0ClusterId for type0 table
+ ResourceNo = 1;
+ ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
+ Parent = ScclOffset;
+ Flags = PPTT_TYPE0_CLUSTER_FLAG;
+ AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
+ }
+
+ //Add socket0die0ClusterIdCoreId for type0 table
+ ResourceNo = 2;
+ Parent = ClusterOffset;
+ Flags = PPTT_TYPE0_CORE_FLAG;
+ AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
+
+ Index1++;
+ }
+ }
+ }
+ }
+ return ;
+}
+
+VOID
+PpttSetAcpiTable(
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ UINTN AcpiTableHandle;
+ EFI_STATUS Status;
+ UINT8 Checksum;
+ EFI_ACPI_SDT_HEADER *Table;
+ EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
+ EFI_ACPI_TABLE_VERSION TableVersion;
+ VOID *PpttTable;
+ UINTN TableKey;
+ UINT32 Index0, Index1;
+ UINT32 PpttTableLengthRemain = 0;
+
+ gBS->CloseEvent (Event);
+
+ InitCacheInfo ();
+
+ PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
+ gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
+ PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
+
+ for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
+ Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
+ if (EFI_ERROR (Status)) {
+ break;
+ }
+ //Find APIC table
+ if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
+ continue;
+ }
+
+ ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
+ Index1 = 0;
+
+ GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
+ break;
+ }
+
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
+ }
+
+ Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
+ ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
+
+ AcpiTableHandle = 0;
+ Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
+
+ FreePool (PpttTable);
+ return ;
+}
+
+EFI_STATUS
+InitPpttTable(
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT ReadyToBootEvent;
+
+ Status = EfiCreateEventReadyToBootEx (
+ TPL_NOTIFY,
+ PpttSetAcpiTable,
+ NULL,
+ &ReadyToBootEvent
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+EFI_STATUS
+EFIAPI
+PpttEntryPoint(
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
+ if (EFI_ERROR (Status)) {
+ return EFI_ABORTED;
+ }
+
+ Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
+ if (EFI_ERROR (Status)) {
+ return EFI_ABORTED;
+ }
+
+ InitPpttTable ();
+
+ DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
new file mode 100644
index 0000000..5dc635f
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
@@ -0,0 +1,142 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
+*
+**/
+
+#ifndef _PPTT_H_
+#define _PPTT_H_
+
+#include <IndustryStandard/Acpi.h>
+#include <Library/ArmLib/ArmLibPrivate.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Protocol/AcpiSystemDescriptionTable.h>
+#include <Protocol/AcpiTable.h>
+#include "../D05AcpiTables/Hi1616Platform.h"
+
+///
+/// "PPTT" Processor Properties Topology Table
+///
+#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
+#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
+#define EFI_ACPI_MAX_NUM_TABLES 20
+
+#define PPTT_TABLE_MAX_LEN 0x6000
+#define PPTT_SOCKET_NO 0x2
+#define PPTT_DIE_NO 0x2
+#define PPTT_CULSTER_NO 0x4
+#define PPTT_CORE_NO 0x4
+#define PPTT_SOCKET_COMPONENT_NO 0x1
+#define PPTT_CACHE_NO 0x4
+
+#define PPTT_TYPE0_PHYSICAL_PKG BIT0
+#define PPTT_TYPE0_PROCESSORID_VALID BIT1
+#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
+#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
+#define PPTT_TYPE0_CLUSTER_FLAG 0
+#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
+
+#define PPTT_TYPE1_SIZE_VALID BIT0
+#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
+#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
+#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
+#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
+#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
+#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
+
+typedef union {
+ struct {
+ UINT32 InD :1;
+ UINT32 Level :3;
+ UINT32 Reserved :28;
+ } Bits;
+ UINT32 Data;
+}CSSELR_DATA;
+
+typedef union {
+ struct {
+ UINT32 LineSize :3;
+ UINT32 Associativity :10;
+ UINT32 NumSets :15;
+ UINT32 Wa :1;
+ UINT32 Ra :1;
+ UINT32 Wb :1;
+ UINT32 Wt :1;
+ } Bits;
+ UINT32 Data;
+}CCSIDR_DATA;
+
+//
+// Processor Hierarchy Node Structure
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 Flags;
+ UINT32 Parent;
+ UINT32 AcpiProcessorId;
+ UINT32 PrivateResourceNo;
+} EFI_ACPI_6_2_PPTT_TYPE0;
+
+//
+// Cache Configuration
+//
+typedef union {
+ struct {
+ UINT8 AllocateType :2;
+ UINT8 CacheType :2;
+ UINT8 WritePolicy :1;
+ UINT8 Reserved :3;
+ } Bits;
+ UINT8 Data;
+}PPTT_TYPE1_ATTRIBUTES;
+
+//
+// Cache Type Structure
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 Flags;
+ UINT32 NextLevelOfCache;
+ UINT32 Size;
+ UINT32 NumberOfSets;
+ UINT8 Associativity;
+ UINT8 Attributes;
+ UINT16 LineSize;
+} EFI_ACPI_6_2_PPTT_TYPE1;
+
+//
+// ID Structure
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Reserved;
+ UINT32 VendorId;
+ UINT64 Level1Id;
+ UINT64 Level2Id;
+ UINT16 MajorRev;
+ UINT16 MinorRev;
+ UINT16 SpinRev;
+} EFI_ACPI_6_2_PPTT_TYPE2;
+
+#endif // _PPTT_H_
+
diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
new file mode 100644
index 0000000..ce26b97
--- /dev/null
+++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
@@ -0,0 +1,55 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
+*
+**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = AcpiPptt
+ FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = PpttEntryPoint
+
+[Sources.common]
+ Pptt.c
+ Pptt.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
+ ArmPkg/ArmPkg.dec
+
+[LibraryClasses]
+ ArmLib
+ HobLib
+ UefiRuntimeServicesTableLib
+ UefiDriverEntryPoint
+ BaseMemoryLib
+ DebugLib
+
+[Guids]
+
+
+[Protocols]
+ gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+ gEfiAcpiSdtProtocolGuid
+
+[Pcd]
+
+
+[Depex]
+ gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
+
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 10:27 ` Ard Biesheuvel
2018-01-22 18:38 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option Ming Huang
` (13 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
---
Platform/Hisilicon/D03/D03.dsc | 24 +
Platform/Hisilicon/D03/D03.fdf | 7 +
Platform/Hisilicon/D05/D05.dsc | 27 +-
Platform/Hisilicon/D05/D05.fdf | 7 +
Silicon/Hisilicon/Hisilicon.dsc.inc | 1 +
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 588 +++++++++++++++++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 89 +++
Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
9 files changed, 1481 insertions(+), 2 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index b434f68..f7efff5 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -28,6 +28,7 @@
BUILD_TARGETS = DEBUG|RELEASE
SKUID_IDENTIFIER = DEFAULT
FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
+ DEFINE GENERIC_BDS = TRUE
!include Silicon/Hisilicon/Hisilicon.dsc.inc
@@ -68,6 +69,14 @@
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+!if $(GENERIC_BDS) == TRUE
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+!endif
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
# USB Requirements
@@ -188,6 +197,9 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
+!if $(GENERIC_BDS) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
+!endif
gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
@@ -405,6 +417,14 @@
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+!if $(GENERIC_BDS) == TRUE
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+!endif
MdeModulePkg/Application/HelloWorld/HelloWorld.inf
#
# Bds
@@ -457,7 +477,11 @@
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+!if $(GENERIC_BDS) == TRUE
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+!else
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+!endif
#
# UEFI application (Shell Embedded Boot Loader)
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 0b38eb4..0d704b5 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -283,6 +283,9 @@ READ_LOCK_STATUS = TRUE
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
!endif #$(INCLUDE_TFTP_COMMAND)
+!if $(GENERIC_BDS) == TRUE
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+!endif
#
# Bds
#
@@ -291,7 +294,11 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+!if $(GENERIC_BDS) == TRUE
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+!else
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+!endif
[FV.FVMAIN_COMPACT]
FvAlignment = 16
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 710339c..57370dc 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -31,7 +31,7 @@
DEFINE EDK2_SKIP_PEICORE=0
DEFINE NETWORK_IP6_ENABLE = FALSE
DEFINE HTTP_BOOT_ENABLE = FALSE
-
+ DEFINE GENERIC_BDS = TRUE
!include Silicon/Hisilicon/Hisilicon.dsc.inc
[LibraryClasses.common]
@@ -84,6 +84,14 @@
CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+!if $(GENERIC_BDS) == TRUE
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+ FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
+!endif
CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
# USB Requirements
@@ -119,6 +127,7 @@
# It could be set FALSE to save size.
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|8
@@ -203,7 +212,9 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
-
+!if $(GENERIC_BDS) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
+!endif
gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
@@ -560,6 +571,14 @@
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+!if $(GENERIC_BDS) == TRUE
+ MdeModulePkg/Application/UiApp/UiApp.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
+ NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
+ NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
+ }
+!endif
#
# Bds
#
@@ -610,7 +629,11 @@
MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+!if $(GENERIC_BDS) == TRUE
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+!else
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+!endif
#
# UEFI application (Shell Embedded Boot Loader)
#
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 97de4d2..d209210 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -305,6 +305,9 @@ READ_LOCK_STATUS = TRUE
INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
!endif #$(INCLUDE_TFTP_COMMAND)
+!if $(GENERIC_BDS) == TRUE
+ INF MdeModulePkg/Application/UiApp/UiApp.inf
+!endif
#
# Bds
#
@@ -313,7 +316,11 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+!if $(GENERIC_BDS) == TRUE
+ INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+!else
INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
+!endif
[FV.FVMAIN_COMPACT]
FvAlignment = 16
diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
index cc23673..308064b 100644
--- a/Silicon/Hisilicon/Hisilicon.dsc.inc
+++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
@@ -263,6 +263,7 @@
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
# DEBUG_ASSERT_ENABLED 0x01
# DEBUG_PRINT_ENABLED 0x02
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
new file mode 100644
index 0000000..5d8d58e
--- /dev/null
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
@@ -0,0 +1,588 @@
+/** @file
+ Implementation for PlatformBootManagerLib library class interfaces.
+
+ Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <IndustryStandard/Pci22.h>
+#include <Library/DevicePathLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/UefiLib.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/EsrtManagement.h>
+#include <Protocol/GenericMemoryTest.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/LoadedImage.h>
+#include <Protocol/PciIo.h>
+#include <Protocol/PciRootBridgeIo.h>
+#include <Guid/EventGroup.h>
+#include <Guid/TtyTerm.h>
+
+#include "PlatformBm.h"
+
+#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
+
+
+#pragma pack (1)
+typedef struct {
+ VENDOR_DEVICE_PATH SerialDxe;
+ UART_DEVICE_PATH Uart;
+ VENDOR_DEFINED_DEVICE_PATH TermType;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} PLATFORM_SERIAL_CONSOLE;
+#pragma pack ()
+
+#define SERIAL_DXE_FILE_GUID { \
+ 0xD3987D4B, 0x971A, 0x435F, \
+ { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
+ }
+
+EFI_GUID EblAppGuid2 = {0x3CEF354A,0x3B7A,0x4519,{0xAD,0x70,0x72,0xA1,0x34,0x69,0x83,0x11}};
+
+STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
+ //
+ // VENDOR_DEVICE_PATH SerialDxe
+ //
+ {
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
+ SERIAL_DXE_FILE_GUID
+ },
+
+ //
+ // UART_DEVICE_PATH Uart
+ //
+ {
+ { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
+ 0, // Reserved
+ FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
+ FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
+ FixedPcdGet8 (PcdUartDefaultParity), // Parity
+ FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
+ },
+
+ //
+ // VENDOR_DEFINED_DEVICE_PATH TermType
+ //
+ {
+ {
+ MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
+ DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
+ }
+ //
+ // Guid to be filled in dynamically
+ //
+ },
+
+ //
+ // EFI_DEVICE_PATH_PROTOCOL End
+ //
+ {
+ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+ }
+};
+
+
+#pragma pack (1)
+typedef struct {
+ USB_CLASS_DEVICE_PATH Keyboard;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} PLATFORM_USB_KEYBOARD;
+#pragma pack ()
+
+STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
+ //
+ // USB_CLASS_DEVICE_PATH Keyboard
+ //
+ {
+ {
+ MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
+ DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
+ },
+ 0xFFFF, // VendorId: any
+ 0xFFFF, // ProductId: any
+ 3, // DeviceClass: HID
+ 1, // DeviceSubClass: boot
+ 1 // DeviceProtocol: keyboard
+ },
+
+ //
+ // EFI_DEVICE_PATH_PROTOCOL End
+ //
+ {
+ END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
+ DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
+ }
+};
+
+
+/**
+ Check if the handle satisfies a particular condition.
+
+ @param[in] Handle The handle to check.
+ @param[in] ReportText A caller-allocated string passed in for reporting
+ purposes. It must never be NULL.
+
+ @retval TRUE The condition is satisfied.
+ @retval FALSE Otherwise. This includes the case when the condition could not
+ be fully evaluated due to an error.
+**/
+typedef
+BOOLEAN
+(EFIAPI *FILTER_FUNCTION) (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ );
+
+
+/**
+ Process a handle.
+
+ @param[in] Handle The handle to process.
+ @param[in] ReportText A caller-allocated string passed in for reporting
+ purposes. It must never be NULL.
+**/
+typedef
+VOID
+(EFIAPI *CALLBACK_FUNCTION) (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ );
+
+/**
+ Locate all handles that carry the specified protocol, filter them with a
+ callback function, and pass each handle that passes the filter to another
+ callback.
+
+ @param[in] ProtocolGuid The protocol to look for.
+
+ @param[in] Filter The filter function to pass each handle to. If this
+ parameter is NULL, then all handles are processed.
+
+ @param[in] Process The callback function to pass each handle to that
+ clears the filter.
+**/
+STATIC
+VOID
+FilterAndProcess (
+ IN EFI_GUID *ProtocolGuid,
+ IN FILTER_FUNCTION Filter OPTIONAL,
+ IN CALLBACK_FUNCTION Process
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *Handles;
+ UINTN NoHandles;
+ UINTN Idx;
+
+ Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
+ NULL /* SearchKey */, &NoHandles, &Handles);
+ if (EFI_ERROR (Status)) {
+ //
+ // This is not an error, just an informative condition.
+ //
+ DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
+ Status));
+ return;
+ }
+
+ ASSERT (NoHandles > 0);
+ for (Idx = 0; Idx < NoHandles; ++Idx) {
+ CHAR16 *DevicePathText;
+ STATIC CHAR16 Fallback[] = L"<device path unavailable>";
+
+ //
+ // The ConvertDevicePathToText() function handles NULL input transparently.
+ //
+ DevicePathText = ConvertDevicePathToText (
+ DevicePathFromHandle (Handles[Idx]),
+ FALSE, // DisplayOnly
+ FALSE // AllowShortcuts
+ );
+ if (DevicePathText == NULL) {
+ DevicePathText = Fallback;
+ }
+
+ if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
+ Process (Handles[Idx], DevicePathText);
+ }
+
+ if (DevicePathText != Fallback) {
+ FreePool (DevicePathText);
+ }
+ }
+ gBS->FreePool (Handles);
+}
+
+
+/**
+ This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
+**/
+STATIC
+BOOLEAN
+EFIAPI
+IsPciDisplay (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ EFI_STATUS Status;
+ EFI_PCI_IO_PROTOCOL *PciIo;
+ PCI_TYPE00 Pci;
+
+ Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
+ (VOID**)&PciIo);
+ if (EFI_ERROR (Status)) {
+ //
+ // This is not an error worth reporting.
+ //
+ return FALSE;
+ }
+
+ Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
+ sizeof Pci / sizeof (UINT32), &Pci);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
+ return FALSE;
+ }
+
+ return IS_PCI_DISPLAY (&Pci);
+}
+
+
+/**
+ This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
+ the matching driver to produce all first-level child handles.
+**/
+STATIC
+VOID
+EFIAPI
+Connect (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ EFI_STATUS Status;
+
+ Status = gBS->ConnectController (
+ Handle, // ControllerHandle
+ NULL, // DriverImageHandle
+ NULL, // RemainingDevicePath -- produce all children
+ FALSE // Recursive
+ );
+ DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n",
+ __FUNCTION__, ReportText, Status));
+}
+
+
+/**
+ This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
+ handle, and adds it to ConOut and ErrOut.
+**/
+STATIC
+VOID
+EFIAPI
+AddOutput (
+ IN EFI_HANDLE Handle,
+ IN CONST CHAR16 *ReportText
+ )
+{
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ DevicePath = DevicePathFromHandle (Handle);
+ if (DevicePath == NULL) {
+ DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n",
+ __FUNCTION__, ReportText, Handle));
+ return;
+ }
+
+ Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
+ ReportText, Status));
+ return;
+ }
+
+ Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
+ ReportText, Status));
+ return;
+ }
+
+ DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
+ ReportText));
+}
+
+STATIC
+VOID
+PlatformRegisterFvBootOption (
+ EFI_GUID *FileGuid,
+ CHAR16 *Description,
+ UINT32 Attributes
+ )
+{
+ EFI_STATUS Status;
+ INTN OptionIndex;
+ EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ UINTN BootOptionCount;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ Status = gBS->HandleProtocol (
+ gImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **) &LoadedImage
+ );
+ ASSERT_EFI_ERROR (Status);
+
+ EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
+ DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
+ ASSERT (DevicePath != NULL);
+ DevicePath = AppendDevicePathNode (
+ DevicePath,
+ (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
+ );
+ ASSERT (DevicePath != NULL);
+
+ Status = EfiBootManagerInitializeLoadOption (
+ &NewOption,
+ LoadOptionNumberUnassigned,
+ LoadOptionTypeBoot,
+ Attributes,
+ Description,
+ DevicePath,
+ NULL,
+ 0
+ );
+ ASSERT_EFI_ERROR (Status);
+ FreePool (DevicePath);
+
+ BootOptions = EfiBootManagerGetLoadOptions (
+ &BootOptionCount, LoadOptionTypeBoot
+ );
+
+ OptionIndex = EfiBootManagerFindLoadOption (
+ &NewOption, BootOptions, BootOptionCount
+ );
+
+ if (OptionIndex == -1) {
+ Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
+ ASSERT_EFI_ERROR (Status);
+ }
+ EfiBootManagerFreeLoadOption (&NewOption);
+ EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
+}
+
+
+STATIC
+VOID
+PlatformRegisterOptionsAndKeys (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_INPUT_KEY Enter;
+ EFI_INPUT_KEY F2;
+ EFI_INPUT_KEY Esc;
+ EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
+
+ //
+ // Register ENTER as CONTINUE key
+ //
+ Enter.ScanCode = SCAN_NULL;
+ Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
+ Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
+ ASSERT_EFI_ERROR (Status);
+
+ //
+ // Map F2 and ESC to Boot Manager Menu
+ //
+ F2.ScanCode = SCAN_F2;
+ F2.UnicodeChar = CHAR_NULL;
+ Esc.ScanCode = SCAN_ESC;
+ Esc.UnicodeChar = CHAR_NULL;
+
+ Status = EfiBootManagerGetBootManagerMenu (&BootOption);
+ ASSERT_EFI_ERROR (Status);
+ Status = EfiBootManagerAddKeyOptionVariable (
+ NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
+ );
+ ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
+ Status = EfiBootManagerAddKeyOptionVariable (
+ NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
+ );
+ ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
+}
+
+VOID
+UpdateMemory (
+ )
+{
+ EFI_STATUS Status;
+ EFI_GENERIC_MEMORY_TEST_PROTOCOL* MemoryTest;
+ BOOLEAN RequireSoftECCInit = FALSE;
+
+ //Add MemoryTest for memmap add above 4G memory.
+ Status = gBS->LocateProtocol (&gEfiGenericMemTestProtocolGuid, NULL, (VOID**)&MemoryTest);
+ if (!EFI_ERROR (Status)) {
+ (VOID)MemoryTest->MemoryTestInit (MemoryTest, IGNORE, &RequireSoftECCInit);
+ } else {
+ DEBUG ((DEBUG_ERROR, "LocateProtocol for GenericMemTestProtocol fail(%r)\n", Status));
+ }
+
+ return;
+}
+
+//
+// BDS Platform Functions
+//
+/**
+ Do the platform init, can be customized by OEM/IBV
+ Possible things that can be done in PlatformBootManagerBeforeConsole:
+ > Update console variable: 1. include hot-plug devices;
+ > 2. Clear ConIn and add SOL for AMT
+ > Register new Driver#### or Boot####
+ > Register new Key####: e.g.: F12
+ > Signal ReadyToLock event
+ > Authentication action: 1. connect Auth devices;
+ > 2. Identify auto logon user.
+**/
+VOID
+EFIAPI
+PlatformBootManagerBeforeConsole (
+ VOID
+ )
+{
+ //
+ // Signal EndOfDxe PI Event
+ //
+ EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
+
+ UpdateMemory ();
+
+ //
+ // Locate the PCI root bridges and make the PCI bus driver connect each,
+ // non-recursively. This will produce a number of child handles with PciIo on
+ // them.
+ //
+ FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
+
+ //
+ // Find all display class PCI devices (using the handles from the previous
+ // step), and connect them non-recursively. This should produce a number of
+ // child handles with GOPs on them.
+ //
+ FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
+
+ //
+ // Now add the device path of all handles with GOP on them to ConOut and
+ // ErrOut.
+ //
+ FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
+
+ //
+ // Add the hardcoded short-form USB keyboard device path to ConIn.
+ //
+ EfiBootManagerUpdateConsoleVariable (ConIn,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
+
+ //
+ // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
+ //
+ ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4);
+ CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
+
+ EfiBootManagerUpdateConsoleVariable (ConIn,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+ EfiBootManagerUpdateConsoleVariable (ConOut,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+ EfiBootManagerUpdateConsoleVariable (ErrOut,
+ (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
+
+ //
+ // Register platform-specific boot options and keyboard shortcuts.
+ //
+ PlatformRegisterOptionsAndKeys ();
+}
+
+/**
+ Do the platform specific action after the console is ready
+ Possible things that can be done in PlatformBootManagerAfterConsole:
+ > Console post action:
+ > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
+ > Signal console ready platform customized event
+ > Run diagnostics like memory testing
+ > Connect certain devices
+ > Dispatch aditional option roms
+ > Special boot: e.g.: USB boot, enter UI
+**/
+VOID
+EFIAPI
+PlatformBootManagerAfterConsole (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ ESRT_MANAGEMENT_PROTOCOL *EsrtManagement = NULL;
+
+ //
+ // Show the splash screen.
+ //
+ EnableQuietBoot (PcdGetPtr (PcdLogoFile));
+
+ //
+ // Connect the rest of the devices.
+ //
+ EfiBootManagerConnectAll ();
+
+ //
+ // Enumerate all possible boot options.
+ //
+ EfiBootManagerRefreshAllBootOption ();
+
+ //
+ //Sync Esrt Table
+ //
+ Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL, (VOID **)&EsrtManagement);
+ if (!EFI_ERROR (Status)) {
+ Status = EsrtManagement->SyncEsrtFmp ();
+ }
+
+ //
+ // Register UEFI Shell
+ //
+ PlatformRegisterFvBootOption (
+ PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
+ );
+}
+
+/**
+ This function is called each second during the boot manager waits the
+ timeout.
+
+ @param TimeoutRemain The remaining timeout.
+**/
+VOID
+EFIAPI
+PlatformBootManagerWaitCallback (
+ UINT16 TimeoutRemain
+ )
+{
+ Print(L"\r%-2d seconds left, Press Esc or F2 to enter Setup.", TimeoutRemain);
+}
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
new file mode 100644
index 0000000..0a3c626
--- /dev/null
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
@@ -0,0 +1,59 @@
+/** @file
+ Head file for BDS Platform specific code
+
+ Copyright (C) 2015-2016, Red Hat, Inc.
+ Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
+ WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PLATFORM_BM_H_
+#define _PLATFORM_BM_H_
+
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+
+/**
+ Use SystemTable Conout to stop video based Simple Text Out consoles from
+ going to the video device. Put up LogoFile on every video device that is a
+ console.
+
+ @param[in] LogoFile File name of logo to display on the center of the
+ screen.
+
+ @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo
+ displayed.
+ @retval EFI_UNSUPPORTED Logo not found
+**/
+EFI_STATUS
+EnableQuietBoot (
+ IN EFI_GUID *LogoFile
+ );
+
+/**
+ Use SystemTable Conout to turn on video based Simple Text Out consoles. The
+ Simple Text Out screens will now be synced up with all non video output
+ devices
+
+ @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
+**/
+EFI_STATUS
+DisableQuietBoot (
+ VOID
+ );
+
+#endif // _PLATFORM_BM_H_
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
new file mode 100644
index 0000000..ae274f3
--- /dev/null
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -0,0 +1,89 @@
+## @file
+# Implementation for PlatformBootManagerLib library class interfaces.
+#
+# Copyright (C) 2015-2016, Red Hat, Inc.
+# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
+# IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PlatformBootManagerLib
+ FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = ARM AARCH64
+#
+
+[Sources]
+ PlatformBm.c
+ QuietBoot.c
+
+[Packages]
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ DevicePathLib
+ DxeServicesLib
+ MemoryAllocationLib
+ PcdLib
+ PrintLib
+ UefiBootManagerLib
+ UefiBootServicesTableLib
+ UefiLib
+
+[FeaturePcd]
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable
+ gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
+
+[FixedPcd]
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
+ gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
+
+[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
+
+[Guids]
+ gEfiFileInfoGuid
+ gEfiFileSystemInfoGuid
+ gEfiFileSystemVolumeLabelInfoIdGuid
+ gEfiEndOfDxeEventGroupGuid
+ gEfiTtyTermGuid
+
+[Protocols]
+ gEfiDevicePathProtocolGuid
+ gEfiFirmwareVolume2ProtocolGuid
+ gEfiGenericMemTestProtocolGuid
+ gEfiGraphicsOutputProtocolGuid
+ gEfiLoadedImageProtocolGuid
+ gEfiOEMBadgingProtocolGuid
+ gEfiPciRootBridgeIoProtocolGuid
+ gEfiSimpleFileSystemProtocolGuid
+ gEsrtManagementProtocolGuid
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
new file mode 100644
index 0000000..0bd15da
--- /dev/null
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
@@ -0,0 +1,681 @@
+/** @file
+Platform BDS function for quiet boot support.
+
+Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
+Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <IndustryStandard/Bmp.h>
+#include <Library/DxeServicesLib.h>
+#include <Protocol/BootLogo.h>
+#include <Protocol/OEMBadging.h>
+#include <Protocol/UgaDraw.h>
+
+#include "PlatformBm.h"
+
+/**
+ Convert a *.BMP graphics image to a GOP blt buffer. If a NULL Blt buffer
+ is passed in a GopBlt buffer will be allocated by this routine. If a GopBlt
+ buffer is passed in it will be used if it is big enough.
+
+ @param BmpImage Pointer to BMP file
+ @param BmpImageSize Number of bytes in BmpImage
+ @param GopBlt Buffer containing GOP version of BmpImage.
+ @param GopBltSize Size of GopBlt in bytes.
+ @param PixelHeight Height of GopBlt/BmpImage in pixels
+ @param PixelWidth Width of GopBlt/BmpImage in pixels
+
+ @retval EFI_SUCCESS GopBlt and GopBltSize are returned.
+ @retval EFI_UNSUPPORTED BmpImage is not a valid *.BMP image
+ @retval EFI_BUFFER_TOO_SMALL The passed in GopBlt buffer is not big enough.
+ GopBltSize will contain the required size.
+ @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate.
+
+**/
+STATIC
+EFI_STATUS
+ConvertBmpToGopBlt (
+ IN VOID *BmpImage,
+ IN UINTN BmpImageSize,
+ IN OUT VOID **GopBlt,
+ IN OUT UINTN *GopBltSize,
+ OUT UINTN *PixelHeight,
+ OUT UINTN *PixelWidth
+ )
+{
+ UINT8 *Image;
+ UINT8 *ImageHeader;
+ BMP_IMAGE_HEADER *BmpHeader;
+ BMP_COLOR_MAP *BmpColorMap;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
+ UINT64 BltBufferSize;
+ UINTN Index;
+ UINTN Height;
+ UINTN Width;
+ UINTN ImageIndex;
+ UINT32 DataSizePerLine;
+ BOOLEAN IsAllocated;
+ UINT32 ColorMapNum;
+
+ if (sizeof (BMP_IMAGE_HEADER) > BmpImageSize) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ BmpHeader = (BMP_IMAGE_HEADER *) BmpImage;
+
+ if (BmpHeader->CharB != 'B' || BmpHeader->CharM != 'M') {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Doesn't support compress.
+ //
+ if (BmpHeader->CompressionType != 0) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Only support BITMAPINFOHEADER format.
+ // BITMAPFILEHEADER + BITMAPINFOHEADER = BMP_IMAGE_HEADER
+ //
+ if (BmpHeader->HeaderSize != sizeof (BMP_IMAGE_HEADER) - OFFSET_OF(BMP_IMAGE_HEADER, HeaderSize)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // The data size in each line must be 4 byte alignment.
+ //
+ DataSizePerLine = ((BmpHeader->PixelWidth * BmpHeader->BitPerPixel + 31) >> 3) & (~0x3);
+ BltBufferSize = MultU64x32 (DataSizePerLine, BmpHeader->PixelHeight);
+ if (BltBufferSize > (UINT32) ~0) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if ((BmpHeader->Size != BmpImageSize) ||
+ (BmpHeader->Size < BmpHeader->ImageOffset) ||
+ (BmpHeader->Size - BmpHeader->ImageOffset != BmpHeader->PixelHeight * DataSizePerLine)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ //
+ // Calculate Color Map offset in the image.
+ //
+ Image = BmpImage;
+ BmpColorMap = (BMP_COLOR_MAP *) (Image + sizeof (BMP_IMAGE_HEADER));
+ if (BmpHeader->ImageOffset < sizeof (BMP_IMAGE_HEADER)) {
+ return EFI_INVALID_PARAMETER;
+ }
+
+ if (BmpHeader->ImageOffset > sizeof (BMP_IMAGE_HEADER)) {
+ switch (BmpHeader->BitPerPixel) {
+ case 1:
+ ColorMapNum = 2;
+ break;
+ case 4:
+ ColorMapNum = 16;
+ break;
+ case 8:
+ ColorMapNum = 256;
+ break;
+ default:
+ ColorMapNum = 0;
+ break;
+ }
+ //
+ // BMP file may has padding data between the bmp header section and the bmp data section.
+ //
+ if (BmpHeader->ImageOffset - sizeof (BMP_IMAGE_HEADER) < sizeof (BMP_COLOR_MAP) * ColorMapNum) {
+ return EFI_INVALID_PARAMETER;
+ }
+ }
+
+ //
+ // Calculate graphics image data address in the image
+ //
+ Image = ((UINT8 *) BmpImage) + BmpHeader->ImageOffset;
+ ImageHeader = Image;
+
+ //
+ // Calculate the BltBuffer needed size.
+ //
+ BltBufferSize = MultU64x32 ((UINT64) BmpHeader->PixelWidth, BmpHeader->PixelHeight);
+ //
+ // Ensure the BltBufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
+ //
+ if (BltBufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
+ return EFI_UNSUPPORTED;
+ }
+ BltBufferSize = MultU64x32 (BltBufferSize, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+
+ IsAllocated = FALSE;
+ if (*GopBlt == NULL) {
+ //
+ // GopBlt is not allocated by caller.
+ //
+ *GopBltSize = (UINTN) BltBufferSize;
+ *GopBlt = AllocatePool (*GopBltSize);
+ IsAllocated = TRUE;
+ if (*GopBlt == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ } else {
+ //
+ // GopBlt has been allocated by caller.
+ //
+ if (*GopBltSize < (UINTN) BltBufferSize) {
+ *GopBltSize = (UINTN) BltBufferSize;
+ return EFI_BUFFER_TOO_SMALL;
+ }
+ }
+
+ *PixelWidth = BmpHeader->PixelWidth;
+ *PixelHeight = BmpHeader->PixelHeight;
+
+ //
+ // Convert image from BMP to Blt buffer format
+ //
+ BltBuffer = *GopBlt;
+ for (Height = 0; Height < BmpHeader->PixelHeight; Height++) {
+ Blt = &BltBuffer[(BmpHeader->PixelHeight - Height - 1) * BmpHeader->PixelWidth];
+ for (Width = 0; Width < BmpHeader->PixelWidth; Width++, Image++, Blt++) {
+ switch (BmpHeader->BitPerPixel) {
+ case 1:
+ //
+ // Convert 1-bit (2 colors) BMP to 24-bit color
+ //
+ for (Index = 0; Index < 8 && Width < BmpHeader->PixelWidth; Index++) {
+ Blt->Red = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Red;
+ Blt->Green = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Green;
+ Blt->Blue = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Blue;
+ Blt++;
+ Width++;
+ }
+
+ Blt--;
+ Width--;
+ break;
+
+ case 4:
+ //
+ // Convert 4-bit (16 colors) BMP Palette to 24-bit color
+ //
+ Index = (*Image) >> 4;
+ Blt->Red = BmpColorMap[Index].Red;
+ Blt->Green = BmpColorMap[Index].Green;
+ Blt->Blue = BmpColorMap[Index].Blue;
+ if (Width < (BmpHeader->PixelWidth - 1)) {
+ Blt++;
+ Width++;
+ Index = (*Image) & 0x0f;
+ Blt->Red = BmpColorMap[Index].Red;
+ Blt->Green = BmpColorMap[Index].Green;
+ Blt->Blue = BmpColorMap[Index].Blue;
+ }
+ break;
+
+ case 8:
+ //
+ // Convert 8-bit (256 colors) BMP Palette to 24-bit color
+ //
+ Blt->Red = BmpColorMap[*Image].Red;
+ Blt->Green = BmpColorMap[*Image].Green;
+ Blt->Blue = BmpColorMap[*Image].Blue;
+ break;
+
+ case 24:
+ //
+ // It is 24-bit BMP.
+ //
+ Blt->Blue = *Image++;
+ Blt->Green = *Image++;
+ Blt->Red = *Image;
+ break;
+
+ default:
+ //
+ // Other bit format BMP is not supported.
+ //
+ if (IsAllocated) {
+ FreePool (*GopBlt);
+ *GopBlt = NULL;
+ }
+ return EFI_UNSUPPORTED;
+ };
+
+ }
+
+ ImageIndex = (UINTN) (Image - ImageHeader);
+ if ((ImageIndex % 4) != 0) {
+ //
+ // Bmp Image starts each row on a 32-bit boundary!
+ //
+ Image = Image + (4 - (ImageIndex % 4));
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+/**
+ Use SystemTable Conout to stop video based Simple Text Out consoles from going
+ to the video device. Put up LogoFile on every video device that is a console.
+
+ @param[in] LogoFile File name of logo to display on the center of the screen.
+
+ @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed.
+ @retval EFI_UNSUPPORTED Logo not found
+
+**/
+EFI_STATUS
+EnableQuietBoot (
+ IN EFI_GUID *LogoFile
+ )
+{
+ EFI_STATUS Status;
+ EFI_OEM_BADGING_PROTOCOL *Badging;
+ UINT32 SizeOfX;
+ UINT32 SizeOfY;
+ INTN DestX;
+ INTN DestY;
+ UINT8 *ImageData;
+ UINTN ImageSize;
+ UINTN BltSize;
+ UINT32 Instance;
+ EFI_BADGING_FORMAT Format;
+ EFI_BADGING_DISPLAY_ATTRIBUTE Attribute;
+ UINTN CoordinateX;
+ UINTN CoordinateY;
+ UINTN Height;
+ UINTN Width;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
+ EFI_UGA_DRAW_PROTOCOL *UgaDraw;
+ UINT32 ColorDepth;
+ UINT32 RefreshRate;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
+ EFI_BOOT_LOGO_PROTOCOL *BootLogo;
+ UINTN NumberOfLogos;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LogoBlt;
+ UINTN LogoDestX;
+ UINTN LogoDestY;
+ UINTN LogoHeight;
+ UINTN LogoWidth;
+ UINTN NewDestX;
+ UINTN NewDestY;
+ UINTN NewHeight;
+ UINTN NewWidth;
+ UINT64 BufferSize;
+
+ UgaDraw = NULL;
+ //
+ // Try to open GOP first
+ //
+ Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutputProtocolGuid, (VOID **) &GraphicsOutput);
+ if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) {
+ GraphicsOutput = NULL;
+ //
+ // Open GOP failed, try to open UGA
+ //
+ Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiUgaDrawProtocolGuid, (VOID **) &UgaDraw);
+ }
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ //
+ // Try to open Boot Logo Protocol.
+ //
+ BootLogo = NULL;
+ gBS->LocateProtocol (&gEfiBootLogoProtocolGuid, NULL, (VOID **) &BootLogo);
+
+ //
+ // Erase Cursor from screen
+ //
+ gST->ConOut->EnableCursor (gST->ConOut, FALSE);
+
+ Badging = NULL;
+ Status = gBS->LocateProtocol (&gEfiOEMBadgingProtocolGuid, NULL, (VOID **) &Badging);
+
+ if (GraphicsOutput != NULL) {
+ SizeOfX = GraphicsOutput->Mode->Info->HorizontalResolution;
+ SizeOfY = GraphicsOutput->Mode->Info->VerticalResolution;
+
+ } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
+ Status = UgaDraw->GetMode (UgaDraw, &SizeOfX, &SizeOfY, &ColorDepth, &RefreshRate);
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+
+ Blt = NULL;
+ NumberOfLogos = 0;
+ LogoDestX = 0;
+ LogoDestY = 0;
+ LogoHeight = 0;
+ LogoWidth = 0;
+ NewDestX = 0;
+ NewDestY = 0;
+ NewHeight = 0;
+ NewWidth = 0;
+ Instance = 0;
+ Height = 0;
+ Width = 0;
+ while (1) {
+ ImageData = NULL;
+ ImageSize = 0;
+
+ if (Badging != NULL) {
+ //
+ // Get image from OEMBadging protocol.
+ //
+ Status = Badging->GetImage (
+ Badging,
+ &Instance,
+ &Format,
+ &ImageData,
+ &ImageSize,
+ &Attribute,
+ &CoordinateX,
+ &CoordinateY
+ );
+ if (EFI_ERROR (Status)) {
+ goto Done;
+ }
+
+ //
+ // Currently only support BMP format.
+ //
+ if (Format != EfiBadgingFormatBMP) {
+ if (ImageData != NULL) {
+ FreePool (ImageData);
+ }
+ continue;
+ }
+ } else {
+ //
+ // Get the specified image from FV.
+ //
+ Status = GetSectionFromAnyFv (LogoFile, EFI_SECTION_RAW, 0, (VOID **) &ImageData, &ImageSize);
+ if (EFI_ERROR (Status)) {
+ return EFI_UNSUPPORTED;
+ }
+
+ CoordinateX = 0;
+ CoordinateY = 0;
+ if (!FeaturePcdGet(PcdBootlogoOnlyEnable)) {
+ Attribute = EfiBadgingDisplayAttributeCenter;
+ } else {
+ Attribute = EfiBadgingDisplayAttributeCustomized;
+ }
+ }
+
+ if (Blt != NULL) {
+ FreePool (Blt);
+ }
+ Blt = NULL;
+ Status = ConvertBmpToGopBlt (
+ ImageData,
+ ImageSize,
+ (VOID **) &Blt,
+ &BltSize,
+ &Height,
+ &Width
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (ImageData);
+
+ if (Badging == NULL) {
+ return Status;
+ } else {
+ continue;
+ }
+ }
+
+ //
+ // Calculate the display position according to Attribute.
+ //
+ switch (Attribute) {
+ case EfiBadgingDisplayAttributeLeftTop:
+ DestX = CoordinateX;
+ DestY = CoordinateY;
+ break;
+
+ case EfiBadgingDisplayAttributeCenterTop:
+ DestX = (SizeOfX - Width) / 2;
+ DestY = CoordinateY;
+ break;
+
+ case EfiBadgingDisplayAttributeRightTop:
+ DestX = (SizeOfX - Width - CoordinateX);
+ DestY = CoordinateY;;
+ break;
+
+ case EfiBadgingDisplayAttributeCenterRight:
+ DestX = (SizeOfX - Width - CoordinateX);
+ DestY = (SizeOfY - Height) / 2;
+ break;
+
+ case EfiBadgingDisplayAttributeRightBottom:
+ DestX = (SizeOfX - Width - CoordinateX);
+ DestY = (SizeOfY - Height - CoordinateY);
+ break;
+
+ case EfiBadgingDisplayAttributeCenterBottom:
+ DestX = (SizeOfX - Width) / 2;
+ DestY = (SizeOfY - Height - CoordinateY);
+ break;
+
+ case EfiBadgingDisplayAttributeLeftBottom:
+ DestX = CoordinateX;
+ DestY = (SizeOfY - Height - CoordinateY);
+ break;
+
+ case EfiBadgingDisplayAttributeCenterLeft:
+ DestX = CoordinateX;
+ DestY = (SizeOfY - Height) / 2;
+ break;
+
+ case EfiBadgingDisplayAttributeCenter:
+ DestX = (SizeOfX - Width) / 2;
+ DestY = (SizeOfY - Height) / 2;
+ break;
+
+ case EfiBadgingDisplayAttributeCustomized:
+ DestX = (SizeOfX - Width) / 2;
+ DestY = ((SizeOfY * 382) / 1000) - Height / 2;
+ break;
+
+ default:
+ DestX = CoordinateX;
+ DestY = CoordinateY;
+ break;
+ }
+
+ if ((DestX >= 0) && (DestY >= 0)) {
+ if (GraphicsOutput != NULL) {
+ Status = GraphicsOutput->Blt (
+ GraphicsOutput,
+ Blt,
+ EfiBltBufferToVideo,
+ 0,
+ 0,
+ (UINTN) DestX,
+ (UINTN) DestY,
+ Width,
+ Height,
+ Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
+ );
+ } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
+ Status = UgaDraw->Blt (
+ UgaDraw,
+ (EFI_UGA_PIXEL *) Blt,
+ EfiUgaBltBufferToVideo,
+ 0,
+ 0,
+ (UINTN) DestX,
+ (UINTN) DestY,
+ Width,
+ Height,
+ Width * sizeof (EFI_UGA_PIXEL)
+ );
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+
+ //
+ // Report displayed Logo information.
+ //
+ if (!EFI_ERROR (Status)) {
+ NumberOfLogos++;
+
+ if (LogoWidth == 0) {
+ //
+ // The first Logo.
+ //
+ LogoDestX = (UINTN) DestX;
+ LogoDestY = (UINTN) DestY;
+ LogoWidth = Width;
+ LogoHeight = Height;
+ } else {
+ //
+ // Merge new logo with old one.
+ //
+ NewDestX = MIN ((UINTN) DestX, LogoDestX);
+ NewDestY = MIN ((UINTN) DestY, LogoDestY);
+ NewWidth = MAX ((UINTN) DestX + Width, LogoDestX + LogoWidth) - NewDestX;
+ NewHeight = MAX ((UINTN) DestY + Height, LogoDestY + LogoHeight) - NewDestY;
+
+ LogoDestX = NewDestX;
+ LogoDestY = NewDestY;
+ LogoWidth = NewWidth;
+ LogoHeight = NewHeight;
+ }
+ }
+ }
+
+ FreePool (ImageData);
+
+ if (Badging == NULL) {
+ break;
+ }
+ }
+
+Done:
+ if (BootLogo == NULL || NumberOfLogos == 0) {
+ //
+ // No logo displayed.
+ //
+ if (Blt != NULL) {
+ FreePool (Blt);
+ }
+
+ return Status;
+ }
+
+ //
+ // Advertise displayed Logo information.
+ //
+ if (NumberOfLogos == 1) {
+ //
+ // Only one logo displayed, use its Blt buffer directly for BootLogo protocol.
+ //
+ LogoBlt = Blt;
+ Status = EFI_SUCCESS;
+ } else {
+ //
+ // More than one Logo displayed, get merged BltBuffer using VideoToBuffer operation.
+ //
+ if (Blt != NULL) {
+ FreePool (Blt);
+ }
+
+ //
+ // Ensure the LogoHeight * LogoWidth doesn't overflow
+ //
+ if (LogoHeight > DivU64x64Remainder ((UINTN) ~0, LogoWidth, NULL)) {
+ return EFI_UNSUPPORTED;
+ }
+ BufferSize = MultU64x64 (LogoWidth, LogoHeight);
+
+ //
+ // Ensure the BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
+ //
+ if (BufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
+ return EFI_UNSUPPORTED;
+ }
+
+ LogoBlt = AllocateZeroPool ((UINTN)BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
+ if (LogoBlt == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ if (GraphicsOutput != NULL) {
+ Status = GraphicsOutput->Blt (
+ GraphicsOutput,
+ LogoBlt,
+ EfiBltVideoToBltBuffer,
+ LogoDestX,
+ LogoDestY,
+ 0,
+ 0,
+ LogoWidth,
+ LogoHeight,
+ LogoWidth * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
+ );
+ } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
+ Status = UgaDraw->Blt (
+ UgaDraw,
+ (EFI_UGA_PIXEL *) LogoBlt,
+ EfiUgaVideoToBltBuffer,
+ LogoDestX,
+ LogoDestY,
+ 0,
+ 0,
+ LogoWidth,
+ LogoHeight,
+ LogoWidth * sizeof (EFI_UGA_PIXEL)
+ );
+ } else {
+ Status = EFI_UNSUPPORTED;
+ }
+ }
+
+ if (!EFI_ERROR (Status)) {
+ BootLogo->SetBootLogo (BootLogo, LogoBlt, LogoDestX, LogoDestY, LogoWidth, LogoHeight);
+ }
+ FreePool (LogoBlt);
+
+ return Status;
+}
+
+/**
+ Use SystemTable Conout to turn on video based Simple Text Out consoles. The
+ Simple Text Out screens will now be synced up with all non video output devices
+
+ @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
+
+**/
+EFI_STATUS
+DisableQuietBoot (
+ VOID
+ )
+{
+
+ //
+ // Enable Cursor on Screen
+ //
+ gST->ConOut->EnableCursor (gST->ConOut, TRUE);
+ return EFI_SUCCESS;
+}
+
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
2018-01-18 15:01 ` [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 10:41 ` Ard Biesheuvel
2018-01-23 10:28 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support Ming Huang
` (12 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
Modify the feature of BMC set boot option as switching generic
BDS. Move main functions to BmcConfigBootLib.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D03/D03.dsc | 1 +
Platform/Hisilicon/D05/D05.dsc | 1 +
Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 ++
Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 ++++++++++++++++++++
Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 +++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 7 +
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 +
Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------------
Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +-
9 files changed, 548 insertions(+), 436 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index f7efff5..b2eae7d 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -70,6 +70,7 @@
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
!if $(GENERIC_BDS) == TRUE
+ BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 57370dc..b89cea3 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -85,6 +85,7 @@
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
!if $(GENERIC_BDS) == TRUE
+ BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
diff --git a/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
new file mode 100644
index 0000000..d937234
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
@@ -0,0 +1,31 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _BMC_CONFIG_BOOT_LIB_H_
+#define _BMC_CONFIG_BOOT_LIB_H_
+
+VOID
+EFIAPI
+RestoreBootOrder (
+ VOID
+ );
+
+VOID
+EFIAPI
+HandleBmcBootType (
+ VOID
+ );
+
+#endif
diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
new file mode 100644
index 0000000..c446f93
--- /dev/null
+++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
@@ -0,0 +1,454 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+#include <Uefi.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/IpmiCmdLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Guid/GlobalVariable.h>
+#include <Protocol/DevicePathToText.h>
+
+GUID gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99,
+ 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} };
+
+STATIC
+UINT16
+GetBBSTypeFromFileSysPath (
+ IN CHAR16 *UsbPathTxt,
+ IN CHAR16 *FileSysPathTxt,
+ IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *Node;
+
+ if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
+ Node = FileSysPath;
+ while (!IsDevicePathEnd (Node)) {
+ if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
+ (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
+ return BBS_TYPE_CDROM;
+ }
+ Node = NextDevicePathNode (Node);
+ }
+ }
+
+ return BBS_TYPE_UNKNOWN;
+}
+
+STATIC
+UINT16
+GetBBSTypeFromUsbPath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *FileSystemHandles;
+ UINTN NumberFileSystemHandles;
+ UINTN Index;
+ EFI_DEVICE_PATH_PROTOCOL *FileSysPath;
+ EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText;
+ CHAR16 *UsbPathTxt;
+ CHAR16 *FileSysPathTxt;
+ UINT16 Result;
+
+ Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status));
+ return BBS_TYPE_UNKNOWN;
+ }
+
+ Result = BBS_TYPE_UNKNOWN;
+ UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
+ if (UsbPathTxt == NULL) {
+ return Result;
+ }
+
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiSimpleFileSystemProtocolGuid,
+ NULL,
+ &NumberFileSystemHandles,
+ &FileSystemHandles
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
+ FreePool (UsbPathTxt);
+ return BBS_TYPE_UNKNOWN;
+ }
+
+ for (Index = 0; Index < NumberFileSystemHandles; Index++) {
+ FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
+ FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
+
+ if (FileSysPathTxt == NULL) {
+ continue;
+ }
+
+ Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
+ FreePool (FileSysPathTxt);
+
+ if (Result != BBS_TYPE_UNKNOWN) {
+ break;
+ }
+ }
+
+ if (NumberFileSystemHandles != 0) {
+ FreePool (FileSystemHandles);
+ }
+
+ FreePool (UsbPathTxt);
+
+ return Result;
+}
+
+STATIC
+UINT16
+GetBBSTypeFromMessagingDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN EFI_DEVICE_PATH_PROTOCOL *Node
+ )
+{
+ VENDOR_DEVICE_PATH *Vendor;
+ UINT16 Result;
+
+ Result = BBS_TYPE_UNKNOWN;
+
+ switch (DevicePathSubType (Node)) {
+ case MSG_MAC_ADDR_DP:
+ Result = BBS_TYPE_EMBEDDED_NETWORK;
+ break;
+
+ case MSG_USB_DP:
+ Result = GetBBSTypeFromUsbPath (DevicePath);
+ if (Result == BBS_TYPE_UNKNOWN) {
+ Result = BBS_TYPE_USB;
+ }
+ break;
+
+ case MSG_SATA_DP:
+ Result = BBS_TYPE_HARDDRIVE;
+ break;
+
+ case MSG_VENDOR_DP:
+ Vendor = (VENDOR_DEVICE_PATH *) (Node);
+ if ((&Vendor->Guid) != NULL) {
+ if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
+ Result = BBS_TYPE_HARDDRIVE;
+ }
+ }
+ break;
+
+ default:
+ Result = BBS_TYPE_UNKNOWN;
+ break;
+ }
+
+ return Result;
+}
+
+STATIC
+UINT16
+GetBBSTypeByDevicePath (
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ EFI_DEVICE_PATH_PROTOCOL *Node;
+ UINT16 Result;
+
+ Result = BBS_TYPE_UNKNOWN;
+ if (DevicePath == NULL) {
+ return Result;
+ }
+
+ Node = DevicePath;
+ while (!IsDevicePathEnd (Node)) {
+ switch (DevicePathType (Node)) {
+ case MEDIA_DEVICE_PATH:
+ if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
+ Result = BBS_TYPE_CDROM;
+ }
+ break;
+
+ case MESSAGING_DEVICE_PATH:
+ Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
+ break;
+
+ default:
+ Result = BBS_TYPE_UNKNOWN;
+ break;
+ }
+
+ if (Result != BBS_TYPE_UNKNOWN) {
+ break;
+ }
+
+ Node = NextDevicePathNode (Node);
+ }
+
+ return Result;
+}
+
+STATIC
+EFI_STATUS
+GetBmcBootOptionsSetting (
+ OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
+ )
+{
+ EFI_STATUS Status;
+
+ Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
+ return Status;
+ }
+
+ if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
+ return EFI_NOT_FOUND;
+ }
+
+ if (BmcBootOpt->Persistent) {
+ BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
+ } else {
+ BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
+ }
+
+ Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
+ }
+
+ return Status;
+}
+
+VOID
+RestoreBootOrder (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINT16 *BootOrder;
+ UINTN BootOrderSize;
+
+ GetVariable2 (L"BootOrderBackup", &gOemBootVariableGuid, (VOID **) &BootOrder, &BootOrderSize);
+ if (BootOrder == NULL) {
+ return ;
+ }
+
+ Print (L"\nRestore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
+
+ Status = gRT->SetVariable (
+ L"BootOrder",
+ &gEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ BootOrderSize,
+ BootOrder
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
+ }
+
+ Status = gRT->SetVariable (
+ L"BootOrderBackup",
+ &gOemBootVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ 0,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
+ }
+
+ FreePool (BootOrder);
+
+ return;
+}
+
+
+VOID
+RestoreBootOrderOnReadyToBoot (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ // restore BootOrder variable in normal condition.
+ RestoreBootOrder ();
+}
+
+STATIC
+VOID
+UpdateBootOrder (
+ IN UINT16 *NewOrder,
+ IN UINT16 *BootOrder,
+ IN UINTN BootOrderSize
+ )
+{
+ EFI_STATUS Status;
+ EFI_EVENT Event;
+
+ Status = gRT->SetVariable (
+ L"BootOrderBackup",
+ &gOemBootVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ BootOrderSize,
+ BootOrder
+ );
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ Status = gRT->SetVariable (
+ L"BootOrder",
+ &gEfiGlobalVariableGuid,
+ EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
+ BootOrderSize,
+ NewOrder
+ );
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ // Register notify function to restore BootOrder variable on ReadyToBoot Event.
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ RestoreBootOrderOnReadyToBoot,
+ NULL,
+ &gEfiEventReadyToBootGuid,
+ &Event
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
+ }
+
+ return;
+}
+
+STATIC
+VOID
+SetBootOrder (
+ IN UINT16 BootType
+ )
+{
+ EFI_STATUS Status;
+ UINT16 *NewOrder;
+ UINT16 *RemainBoots;
+ UINT16 *BootOrder;
+ UINTN BootOrderSize;
+ EFI_BOOT_MANAGER_LOAD_OPTION Option;
+ CHAR16 OptionName[sizeof ("Boot####")];
+ UINTN Index;
+ UINTN SelectCnt;
+ UINTN RemainCnt;
+
+ GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
+ if (BootOrder == NULL) {
+ return ;
+ }
+
+ NewOrder = AllocatePool (BootOrderSize);
+ RemainBoots = AllocatePool (BootOrderSize);
+ if ((NewOrder == NULL) || (RemainBoots == NULL)) {
+ DEBUG ((DEBUG_ERROR, "Out of resources."));
+ goto Exit;
+ }
+
+ SelectCnt = 0;
+ RemainCnt = 0;
+
+ for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
+ UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
+ Status = EfiBootManagerVariableToLoadOption (OptionName, &Option);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
+ continue;
+ }
+
+ if (GetBBSTypeByDevicePath (Option.FilePath) == BootType) {
+ NewOrder[SelectCnt++] = BootOrder[Index];
+ } else {
+ RemainBoots[RemainCnt++] = BootOrder[Index];
+ }
+ }
+
+ if (SelectCnt != 0) {
+ // append RemainBoots to NewOrder
+ for (Index = 0; Index < RemainCnt; Index++) {
+ NewOrder[SelectCnt + Index] = RemainBoots[Index];
+ }
+
+ if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
+ UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
+ }
+ }
+
+Exit:
+ FreePool (BootOrder);
+ if (NewOrder != NULL) {
+ FreePool (NewOrder);
+ }
+ if (RemainBoots != NULL) {
+ FreePool (RemainBoots);
+ }
+
+ return ;
+}
+
+VOID
+HandleBmcBootType (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ IPMI_GET_BOOT_OPTION BmcBootOpt;
+ UINT16 BootType;
+
+ Status = GetBmcBootOptionsSetting (&BmcBootOpt);
+ if (EFI_ERROR (Status)) {
+ return;
+ }
+
+ Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
+
+ switch (BmcBootOpt.BootDeviceSelector) {
+ case ForcePxe:
+ BootType = BBS_TYPE_EMBEDDED_NETWORK;
+ break;
+
+ case ForcePrimaryRemovableMedia:
+ BootType = BBS_TYPE_USB;
+ break;
+
+ case ForceDefaultHardDisk:
+ BootType = BBS_TYPE_HARDDRIVE;
+ break;
+
+ case ForceDefaultCD:
+ BootType = BBS_TYPE_CDROM;
+ break;
+
+ default:
+ return;
+ }
+
+ SetBootOrder (BootType);
+}
+
diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
new file mode 100644
index 0000000..7e407b4
--- /dev/null
+++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
@@ -0,0 +1,51 @@
+#/** @file
+#
+# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2015, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BmcConfigBootLib
+ FILE_GUID = f174d192-7208-46c1-b9d1-65b2db06ad3b
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = BmcConfigBootLib
+
+[Sources.common]
+ BmcConfigBootLib.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ DevicePathLib
+ IpmiCmdLib
+ PcdLib
+ PrintLib
+ UefiBootManagerLib
+
+[BuildOptions]
+
+[Pcd]
+
+[Guids]
+ gEfiEventReadyToBootGuid
+
+[Protocols]
+ gEfiDevicePathToTextProtocolGuid ## CONSUMES
+ gEfiSimpleFileSystemProtocolGuid ## CONSUMES
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
index 5d8d58e..845519f 100644
--- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
@@ -16,6 +16,7 @@
**/
#include <IndustryStandard/Pci22.h>
+#include <Library/BmcConfigBootLib.h>
#include <Library/DevicePathLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootManagerLib.h>
@@ -474,6 +475,10 @@ PlatformBootManagerBeforeConsole (
//
EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
+ // restore BootOrder variable if previous BMC boot override attempt
+ // left it in a modified state
+ RestoreBootOrder ();
+
UpdateMemory ();
//
@@ -570,6 +575,8 @@ PlatformBootManagerAfterConsole (
PlatformRegisterFvBootOption (
PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
);
+
+ HandleBmcBootType ();
}
/**
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index ae274f3..7b151a9 100644
--- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -44,6 +44,7 @@
[LibraryClasses]
BaseLib
BaseMemoryLib
+ BmcConfigBootLib
DebugLib
DevicePathLib
DxeServicesLib
diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
index dc23e46..20015da 100644
--- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
+++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
@@ -20,25 +20,19 @@
**/
#include <IndustryStandard/Pci22.h>
+#include <Library/BmcConfigBootLib.h>
#include <Library/DevicePathLib.h>
-#include <Library/GenericBdsLib.h>
-#include <Library/IpmiCmdLib.h>
#include <Library/PcdLib.h>
#include <Library/PlatformBdsLib.h>
#include <Library/PrintLib.h>
#include <Library/UefiLib.h>
#include <Protocol/DevicePath.h>
-#include <Protocol/DevicePathToText.h>
#include <Protocol/GraphicsOutput.h>
#include <Protocol/PciIo.h>
#include <Protocol/PciRootBridgeIo.h>
-#include <Guid/GlobalVariable.h>
#include "IntelBdsPlatform.h"
-GUID gOemBootVaraibleGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99,
- 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} };
-
//3CEF354A-3B7A-4519-AD70-72A134698311
GUID gEblFileGuid = {0x3CEF354A, 0x3B7A, 0x4519, {0xAD, 0x70,
0x72, 0xA1, 0x34, 0x69, 0x83, 0x11} };
@@ -149,432 +143,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
}
};
-STATIC
-UINT16
-GetBBSTypeFromFileSysPath (
- IN CHAR16 *UsbPathTxt,
- IN CHAR16 *FileSysPathTxt,
- IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
- )
-{
- EFI_DEVICE_PATH_PROTOCOL *Node;
-
- if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
- Node = FileSysPath;
- while (!IsDevicePathEnd (Node)) {
- if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
- (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
- return BBS_TYPE_CDROM;
- }
- Node = NextDevicePathNode (Node);
- }
- }
-
- return BBS_TYPE_UNKNOWN;
-}
-
-STATIC
-UINT16
-GetBBSTypeFromUsbPath (
- IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
- )
-{
- EFI_STATUS Status;
- EFI_HANDLE *FileSystemHandles;
- UINTN NumberFileSystemHandles;
- UINTN Index;
- EFI_DEVICE_PATH_PROTOCOL *FileSysPath;
- EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText;
- CHAR16 *UsbPathTxt;
- CHAR16 *FileSysPathTxt;
- UINT16 Result;
-
- Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status));
- return BBS_TYPE_UNKNOWN;
- }
-
- Result = BBS_TYPE_UNKNOWN;
- UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
- if (UsbPathTxt == NULL) {
- return Result;
- }
-
- Status = gBS->LocateHandleBuffer (
- ByProtocol,
- &gEfiSimpleFileSystemProtocolGuid,
- NULL,
- &NumberFileSystemHandles,
- &FileSystemHandles
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
- FreePool (UsbPathTxt);
- return BBS_TYPE_UNKNOWN;
- }
-
- for (Index = 0; Index < NumberFileSystemHandles; Index++) {
- FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
- FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
-
- if (FileSysPathTxt == NULL) {
- continue;
- }
-
- Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
- FreePool (FileSysPathTxt);
-
- if (Result != BBS_TYPE_UNKNOWN) {
- break;
- }
- }
-
- if (NumberFileSystemHandles != 0) {
- FreePool (FileSystemHandles);
- }
-
- FreePool (UsbPathTxt);
-
- return Result;
-}
-
-STATIC
-UINT16
-GetBBSTypeFromMessagingDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
- IN EFI_DEVICE_PATH_PROTOCOL *Node
- )
-{
- VENDOR_DEVICE_PATH *Vendor;
- UINT16 Result;
-
- Result = BBS_TYPE_UNKNOWN;
-
- switch (DevicePathSubType (Node)) {
- case MSG_MAC_ADDR_DP:
- Result = BBS_TYPE_EMBEDDED_NETWORK;
- break;
-
- case MSG_USB_DP:
- Result = GetBBSTypeFromUsbPath (DevicePath);
- if (Result == BBS_TYPE_UNKNOWN) {
- Result = BBS_TYPE_USB;
- }
- break;
-
- case MSG_SATA_DP:
- Result = BBS_TYPE_HARDDRIVE;
- break;
-
- case MSG_VENDOR_DP:
- Vendor = (VENDOR_DEVICE_PATH *) (Node);
- if ((&Vendor->Guid) != NULL) {
- if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
- Result = BBS_TYPE_HARDDRIVE;
- }
- }
- break;
-
- default:
- Result = BBS_TYPE_UNKNOWN;
- break;
- }
-
- return Result;
-}
-
-STATIC
-UINT16
-GetBBSTypeByDevicePath (
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
- )
-{
- EFI_DEVICE_PATH_PROTOCOL *Node;
- UINT16 Result;
-
- Result = BBS_TYPE_UNKNOWN;
- if (DevicePath == NULL) {
- return Result;
- }
-
- Node = DevicePath;
- while (!IsDevicePathEnd (Node)) {
- switch (DevicePathType (Node)) {
- case MEDIA_DEVICE_PATH:
- if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
- Result = BBS_TYPE_CDROM;
- }
- break;
-
- case MESSAGING_DEVICE_PATH:
- Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
- break;
-
- default:
- Result = BBS_TYPE_UNKNOWN;
- break;
- }
-
- if (Result != BBS_TYPE_UNKNOWN) {
- break;
- }
-
- Node = NextDevicePathNode (Node);
- }
-
- return Result;
-}
-
-STATIC
-EFI_STATUS
-GetBmcBootOptionsSetting (
- OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
- )
-{
- EFI_STATUS Status;
-
- Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
- return Status;
- }
-
- if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
- return EFI_NOT_FOUND;
- }
-
- if (BmcBootOpt->Persistent) {
- BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
- } else {
- BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
- }
-
- Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
- }
-
- return Status;
-}
-
-STATIC
-VOID
-RestoreBootOrder (
- VOID
- )
-{
- EFI_STATUS Status;
- UINT16 *BootOrder;
- UINTN BootOrderSize;
-
- GetVariable2 (L"BootOrderBackup", &gOemBootVaraibleGuid, (VOID **) &BootOrder, &BootOrderSize);
- if (BootOrder == NULL) {
- return ;
- }
-
- Print (L"Restore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
-
- Status = gRT->SetVariable (
- L"BootOrder",
- &gEfiGlobalVariableGuid,
- EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
- BootOrderSize,
- BootOrder
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
- }
-
- Status = gRT->SetVariable (
- L"BootOrderBackup",
- &gOemBootVaraibleGuid,
- EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
- 0,
- NULL
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
- }
-
- FreePool (BootOrder);
-
- return;
-}
-
-
-VOID
-RestoreBootOrderOnReadyToBoot (
- IN EFI_EVENT Event,
- IN VOID *Context
- )
-{
- // restore BootOrder variable in normal condition.
- RestoreBootOrder ();
-}
-
-STATIC
-VOID
-UpdateBootOrder (
- IN UINT16 *NewOrder,
- IN UINT16 *BootOrder,
- IN UINTN BootOrderSize
- )
-{
- EFI_STATUS Status;
- EFI_EVENT Event;
-
- Status = gRT->SetVariable (
- L"BootOrderBackup",
- &gOemBootVaraibleGuid,
- EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
- BootOrderSize,
- BootOrder
- );
- if (EFI_ERROR (Status)) {
- return;
- }
-
- Status = gRT->SetVariable (
- L"BootOrder",
- &gEfiGlobalVariableGuid,
- EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
- BootOrderSize,
- NewOrder
- );
- if (EFI_ERROR (Status)) {
- return;
- }
-
- // Register notify function to restore BootOrder variable on ReadyToBoot Event.
- Status = gBS->CreateEventEx (
- EVT_NOTIFY_SIGNAL,
- TPL_CALLBACK,
- RestoreBootOrderOnReadyToBoot,
- NULL,
- &gEfiEventReadyToBootGuid,
- &Event
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
- }
-
- return;
-}
-
-STATIC
-VOID
-SetBootOrder (
- IN UINT16 BootType
- )
-{
- UINT16 *NewOrder;
- UINT16 *RemainBoots;
- UINT16 *BootOrder;
- UINTN BootOrderSize;
- CHAR16 OptionName[sizeof ("Boot####")];
- UINTN Index;
- LIST_ENTRY BootOptionList;
- BDS_COMMON_OPTION *Option;
- UINTN SelectCnt;
- UINTN RemainCnt;
-
- InitializeListHead (&BootOptionList);
-
- GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
- if (BootOrder == NULL) {
- return ;
- }
-
- NewOrder = AllocatePool (BootOrderSize);
- RemainBoots = AllocatePool (BootOrderSize);
- if ((NewOrder == NULL) || (RemainBoots == NULL)) {
- DEBUG ((DEBUG_ERROR, "Out of resources."));
- goto Exit;
- }
-
- SelectCnt = 0;
- RemainCnt = 0;
-
- for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
- UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
- Option = BdsLibVariableToOption (&BootOptionList, OptionName);
- if (Option == NULL) {
- DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
- continue;
- }
-
- if (GetBBSTypeByDevicePath (Option->DevicePath) == BootType) {
- NewOrder[SelectCnt++] = BootOrder[Index];
- } else {
- RemainBoots[RemainCnt++] = BootOrder[Index];
- }
- }
-
- if (SelectCnt != 0) {
- // append RemainBoots to NewOrder
- for (Index = 0; Index < RemainCnt; Index++) {
- NewOrder[SelectCnt + Index] = RemainBoots[Index];
- }
-
- if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
- UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
- }
- }
-
-Exit:
- FreePool (BootOrder);
- if (NewOrder != NULL) {
- FreePool (NewOrder);
- }
- if (RemainBoots != NULL) {
- FreePool (RemainBoots);
- }
-
- return ;
-}
-
-STATIC
-VOID
-HandleBmcBootType (
- VOID
- )
-{
- EFI_STATUS Status;
- IPMI_GET_BOOT_OPTION BmcBootOpt;
- UINT16 BootType;
-
- Status = GetBmcBootOptionsSetting (&BmcBootOpt);
- if (EFI_ERROR (Status)) {
- return;
- }
-
- Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
-
- switch (BmcBootOpt.BootDeviceSelector) {
- case ForcePxe:
- BootType = BBS_TYPE_EMBEDDED_NETWORK;
- break;
-
- case ForcePrimaryRemovableMedia:
- BootType = BBS_TYPE_USB;
- break;
-
- case ForceDefaultHardDisk:
- BootType = BBS_TYPE_HARDDRIVE;
- break;
-
- case ForceDefaultCD:
- BootType = BBS_TYPE_CDROM;
- break;
-
- default:
- return;
- }
-
- SetBootOrder (BootType);
-}
-
//
// BDS Platform Functions
//
diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
index 0feec06..793c7dc 100644
--- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
+++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
@@ -47,10 +47,10 @@
[LibraryClasses]
BaseLib
BaseMemoryLib
+ BmcConfigBootLib
DebugLib
DevicePathLib
GenericBdsLib
- IpmiCmdLib
MemoryAllocationLib
PcdLib
PrintLib
@@ -70,14 +70,12 @@
[Guids]
gEfiEndOfDxeEventGroupGuid
- gEfiEventReadyToBootGuid
gEfiFileInfoGuid
gEfiFileSystemInfoGuid
gEfiFileSystemVolumeLabelInfoIdGuid
[Protocols]
gEfiDevicePathProtocolGuid
- gEfiDevicePathToTextProtocolGuid
gEfiGraphicsOutputProtocolGuid
gEfiLoadedImageProtocolGuid
gEfiPciRootBridgeIoProtocolGuid
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (2 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 10:50 ` Ard Biesheuvel
2018-01-23 14:06 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code Ming Huang
` (11 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
From: Jason Zhang <zhangjinsong2@huawei.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
Platform/Hisilicon/D03/D03.dsc | 17 +++-
Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
Platform/Hisilicon/D05/D05.dsc | 19 +++-
Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
13 files changed, 641 insertions(+), 3 deletions(-)
diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
new file mode 100644
index 0000000..fc834d9
--- /dev/null
+++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
@@ -0,0 +1,45 @@
+#
+# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Head]
+NumOfUpdate = 3
+NumOfRecovery = 0
+Update0 = SysFvMain
+Update1 = SysCustom
+Update2 = SysNvRam
+
+[SysFvMain]
+FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
+AddressType = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress = 0x00000000 # Base address offset on flash
+Length = 0x002D0000 # Length
+ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
+FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
+
+[SysCustom]
+FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
+AddressType = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress = 0x002F0000 # Base address offset on flash
+Length = 0x00010000 # Length
+ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
+FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
+
+[SysNvRam]
+FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
+AddressType = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress = 0x002D0000 # Base address offset on flash
+Length = 0x00020000 # Length
+ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
+FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index b2eae7d..69bc7b4 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -66,7 +66,6 @@
OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
- CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
!if $(GENERIC_BDS) == TRUE
@@ -117,6 +116,11 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
+[PcdsDynamicExDefault.common.DEFAULT]
+ gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
+ gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
+
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|8
@@ -310,6 +314,8 @@
Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
+ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
+
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
<LibraryClasses>
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
@@ -410,6 +416,9 @@
Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
+ SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
+ MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
+
#
# FAT filesystem + GPT/MBR partitioning
#
@@ -483,6 +492,12 @@
!else
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
!endif
+ SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
+ <LibraryClasses>
+ FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
+ }
+
+ MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
#
# UEFI application (Shell Embedded Boot Loader)
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 0d704b5..ffddd2d 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE
INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
+ INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
+ INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
#
# Build Shell from latest source code instead of prebuilt binary
#
@@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+ INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
+
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
+[FV.CapsuleDispatchFv]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
+
+[FV.SystemFirmwareUpdateCargo]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
+ FD = D03
+ }
+
+ FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
+ FV = CapsuleDispatchFv
+ }
+
+ FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
+ Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
+ }
+
+[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
+IMAGE_HEADER_INIT_VERSION = 0x02
+IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
+IMAGE_INDEX = 0x1
+HARDWARE_INSTANCE = 0x0
+MONOTONIC_COUNT = 0x1
+CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
+
+ FV = SystemFirmwareUpdateCargo
+
+[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
+CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
+CAPSULE_HEADER_SIZE = 0x20
+CAPSULE_HEADER_INIT_VERSION = 0x1
+
+ FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
!include Silicon/Hisilicon/Hisilicon.fdf.inc
diff --git a/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
new file mode 100644
index 0000000..fc834d9
--- /dev/null
+++ b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
@@ -0,0 +1,45 @@
+#
+# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Head]
+NumOfUpdate = 3
+NumOfRecovery = 0
+Update0 = SysFvMain
+Update1 = SysCustom
+Update2 = SysNvRam
+
+[SysFvMain]
+FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
+AddressType = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress = 0x00000000 # Base address offset on flash
+Length = 0x002D0000 # Length
+ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
+FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
+
+[SysCustom]
+FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
+AddressType = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress = 0x002F0000 # Base address offset on flash
+Length = 0x00010000 # Length
+ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
+FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
+
+[SysNvRam]
+FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
+AddressType = 0 # 0 - relative address, 1 - absolute address.
+BaseAddress = 0x002D0000 # Base address offset on flash
+Length = 0x00020000 # Length
+ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
+FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index b89cea3..b99cda5 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -81,7 +81,6 @@
OemAddressMapLib|Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
PlatformSysCtrlLib|Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.inf
- CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
!if $(GENERIC_BDS) == TRUE
@@ -130,6 +129,11 @@
gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
+[PcdsDynamicExDefault.common.DEFAULT]
+ gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
+ gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
+
[PcdsFixedAtBuild.common]
gArmPlatformTokenSpaceGuid.PcdCoreCount|8
@@ -448,6 +452,8 @@
Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
+ Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
+
MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
<LibraryClasses>
NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
@@ -564,6 +570,9 @@
Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
+ SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
+ MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
+
#
# FAT filesystem + GPT/MBR partitioning
#
@@ -635,6 +644,14 @@
!else
IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
!endif
+
+ SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
+ <LibraryClasses>
+ FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
+ }
+
+ MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
+
#
# UEFI application (Shell Embedded Boot Loader)
#
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index d209210..9a61c52 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -297,6 +297,8 @@ READ_LOCK_STATUS = TRUE
INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
+ INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
+ INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
#
# Build Shell from latest source code instead of prebuilt binary
#
@@ -361,12 +363,80 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+ INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
+
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
SECTION FV_IMAGE = FVMAIN
}
}
+[FV.CapsuleDispatchFv]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
+
+[FV.SystemFirmwareUpdateCargo]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+ FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
+ FD = D05
+ }
+
+ FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
+ FV = CapsuleDispatchFv
+ }
+
+ FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
+ Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
+ }
+
+[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
+IMAGE_HEADER_INIT_VERSION = 0x02
+IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
+IMAGE_INDEX = 0x1
+HARDWARE_INSTANCE = 0x0
+MONOTONIC_COUNT = 0x1
+CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
+
+ FV = SystemFirmwareUpdateCargo
+
+[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
+CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
+CAPSULE_HEADER_SIZE = 0x20
+CAPSULE_HEADER_INIT_VERSION = 0x1
+
+ FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
!include Silicon/Hisilicon/Hisilicon.fdf.inc
diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
new file mode 100644
index 0000000..465535e
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
@@ -0,0 +1,81 @@
+/** @file
+ System Firmware descriptor.
+
+ Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2018, Linaro Limited. All rights reserved.
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Guid/EdkiiSystemFmpCapsule.h>
+#include <Protocol/FirmwareManagement.h>
+
+#define PACKAGE_VERSION 0xFFFFFFFF
+#define PACKAGE_VERSION_STRING L"Unknown"
+
+#define CURRENT_FIRMWARE_VERSION 0x00000002
+#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002"
+#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001
+
+#define IMAGE_ID SIGNATURE_64('H','W','A', 'R', 'M', '_', 'F', 'd')
+#define IMAGE_ID_STRING L"ARMPlatformFd"
+
+// PcdSystemFmpCapsuleImageTypeIdGuid
+#define IMAGE_TYPE_ID_GUID { 0xd34b3d29, 0x0085, 0x4ab3, { 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89 } }
+
+typedef struct {
+ EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor;
+ // real string data
+ CHAR16 ImageIdNameStr[sizeof(IMAGE_ID_STRING) / sizeof(CHAR16)];
+ CHAR16 VersionNameStr[sizeof(CURRENT_FIRMWARE_VERSION_STRING) / sizeof(CHAR16)];
+ CHAR16 PackageVersionNameStr[sizeof(PACKAGE_VERSION_STRING) / sizeof(CHAR16)];
+} IMAGE_DESCRIPTOR;
+
+IMAGE_DESCRIPTOR mImageDescriptor =
+{
+ {
+ EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE,
+ sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR),
+ sizeof (IMAGE_DESCRIPTOR),
+ PACKAGE_VERSION, // PackageVersion
+ OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersionName
+ 1, // ImageIndex;
+ {0x0}, // Reserved
+ IMAGE_TYPE_ID_GUID, // ImageTypeId;
+ IMAGE_ID, // ImageId;
+ OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName;
+ CURRENT_FIRMWARE_VERSION, // Version;
+ OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName;
+ {0x0}, // Reserved2
+ FixedPcdGet32 (PcdFdSize), // Size;
+ IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
+ IMAGE_ATTRIBUTE_RESET_REQUIRED |
+ IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
+ IMAGE_ATTRIBUTE_IN_USE, // AttributesSupported;
+ IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
+ IMAGE_ATTRIBUTE_RESET_REQUIRED |
+ IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
+ IMAGE_ATTRIBUTE_IN_USE, // AttributesSetting;
+ 0x0, // Compatibilities;
+ LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSupportedImageVersion;
+ 0x00000000, // LastAttemptVersion;
+ 0, // LastAttemptStatus;
+ {0x0}, // Reserved3
+ 0, // HardwareInstance;
+ },
+ // real string data
+ {IMAGE_ID_STRING},
+ {CURRENT_FIRMWARE_VERSION_STRING},
+ {PACKAGE_VERSION_STRING},
+};
+
+VOID* CONST ReferenceAcpiTable = &mImageDescriptor;
diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
new file mode 100644
index 0000000..c38a809
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
@@ -0,0 +1,50 @@
+## @file
+# System Firmware descriptor.
+#
+# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SystemFirmwareDescriptor
+ FILE_GUID = 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SystemFirmwareDescriptorPeimEntry
+
+[Sources]
+ SystemFirmwareDescriptorPei.c
+ SystemFirmwareDescriptor.aslc
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ SignedCapsulePkg/SignedCapsulePkg.dec
+
+[LibraryClasses]
+ DebugLib
+ PcdLib
+ PeimEntryPoint
+ PeiServicesLib
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdFdSize
+
+[Pcd]
+ gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor
+
+[Depex]
+ TRUE
diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
new file mode 100644
index 0000000..27c0a71
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
@@ -0,0 +1,70 @@
+/** @file
+ System Firmware descriptor producer.
+
+ Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2018, Linaro Limited. All rights reserved.
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Guid/EdkiiSystemFmpCapsule.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Protocol/FirmwareManagement.h>
+
+/**
+ Entrypoint for SystemFirmwareDescriptor PEIM.
+
+ @param[in] FileHandle Handle of the file being invoked.
+ @param[in] PeiServices Describes the list of possible PEI Services.
+
+ @retval EFI_SUCCESS PPI successfully installed.
+**/
+EFI_STATUS
+EFIAPI
+SystemFirmwareDescriptorPeimEntry (
+ IN EFI_PEI_FILE_HANDLE FileHandle,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor;
+ UINTN Size;
+ UINTN Index;
+ UINT32 AuthenticationStatus;
+
+ //
+ // Search RAW section.
+ //
+
+ Index = 0;
+ while (TRUE) {
+ Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Index, FileHandle, (VOID **)&Descriptor, &AuthenticationStatus);
+ if (EFI_ERROR (Status)) {
+ // Should not happen, must something wrong in FDF.
+ DEBUG ((DEBUG_ERROR, "Not found SystemFirmwareDescriptor in fdf !\n"));
+ return EFI_NOT_FOUND;
+ }
+ if (Descriptor->Signature == EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE) {
+ break;
+ }
+ Index++;
+ }
+
+ DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\n", Descriptor->Length));
+
+ Size = Descriptor->Length;
+ PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor);
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
index 308064b..dfa11d1 100644
--- a/Silicon/Hisilicon/Hisilicon.dsc.inc
+++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
@@ -104,6 +104,15 @@
ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
+ EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
+ IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
+ PlatformFlashAccessLib|Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
+
#
# It is not possible to prevent the ARM compiler for generic intrinsic functions.
# This library provides the instrinsic functions generate by a given compiler.
@@ -198,7 +207,7 @@
HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
- CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortRuntimeLib/Dw8250SerialPortRuntimeLib.inf
DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
diff --git a/Silicon/Hisilicon/Hisilicon.fdf.inc b/Silicon/Hisilicon/Hisilicon.fdf.inc
index ee87cd1..986dd75 100644
--- a/Silicon/Hisilicon/Hisilicon.fdf.inc
+++ b/Silicon/Hisilicon/Hisilicon.fdf.inc
@@ -76,6 +76,15 @@
}
}
+[Rule.Common.PEIM.FMP_IMAGE_DESC]
+ FILE PEIM = $(NAMED_GUID) {
+ RAW BIN |.acpi
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
[Rule.Common.DXE_CORE]
FILE DXE_CORE = $(NAMED_GUID) {
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
new file mode 100644
index 0000000..db5725d
--- /dev/null
+++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
@@ -0,0 +1,106 @@
+/** @file
+ Platform Flash Access library.
+
+ Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+ Copyright (c) 2018, Linaro Limited. All rights reserved.
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/PcdLib.h>
+#include <Library/PlatformFlashAccessLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Protocol/HisiSpiFlashProtocol.h>
+
+STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress;
+STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress;
+
+HISI_SPI_FLASH_PROTOCOL *mSpiProtocol;
+
+/**
+ Perform flash write opreation.
+
+ @param[in] FirmwareType The type of firmware.
+ @param[in] FlashAddress The address of flash device to be accessed.
+ @param[in] FlashAddressType The type of flash device address.
+ @param[in] Buffer The pointer to the data buffer.
+ @param[in] Length The length of data buffer in bytes.
+
+ @retval EFI_SUCCESS The operation returns successfully.
+ @retval EFI_WRITE_PROTECTED The flash device is read only.
+ @retval EFI_UNSUPPORTED The flash device access is unsupported.
+ @retval EFI_INVALID_PARAMETER The input parameter is not valid.
+**/
+EFI_STATUS
+EFIAPI
+PerformFlashWrite (
+ IN PLATFORM_FIRMWARE_TYPE FirmwareType,
+ IN EFI_PHYSICAL_ADDRESS FlashAddress,
+ IN FLASH_ADDRESS_TYPE FlashAddressType,
+ IN VOID *Buffer,
+ IN UINTN Length
+ )
+{
+ UINT32 RomAddress;
+ EFI_STATUS Status;
+
+ DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
+
+ if (FlashAddressType == FlashAddressTypeAbsoluteAddress) {
+ FlashAddress = FlashAddress - mInternalFdAddress;
+ }
+
+ RomAddress = (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0BaseAddress);
+
+ DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n"));
+
+ Status = mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, (UINT8 *)Buffer, (UINT32) Length);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Erase and Write Status = %r \n", Status));
+ }
+
+ return Status;
+}
+
+/**
+ Platform Flash Access Lib Constructor.
+
+ @param[in] ImageHandle The firmware allocated handle for the EFI image.
+ @param[in] SystemTable A pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS Constructor returns successfully.
+**/
+EFI_STATUS
+EFIAPI
+PerformFlashAccessLibConstructor (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+
+ mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBaseAddress);
+
+ mSFCMEM0BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCMEM0BaseAddress);
+
+ DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddress - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress));
+
+ Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID **)&mSpiProtocol);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = %r \n", Status));
+ }
+
+ return Status;
+}
diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
new file mode 100644
index 0000000..f4533ac
--- /dev/null
+++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
@@ -0,0 +1,51 @@
+## @file
+# Platform Flash Access library.
+#
+# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2018, Linaro Limited. All rights reserved.
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PlatformFlashAccessLibDxe
+ FILE_GUID = 9168384A-5F66-4CF7-AEB6-845BDEBD3012
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER
+ CONSTRUCTOR = PerformFlashAccessLibConstructor
+
+[Sources]
+ PlatformFlashAccessLibDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ SignedCapsulePkg/SignedCapsulePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ DebugLib
+ PcdLib
+ UefiBootServicesTableLib
+
+[Protocols]
+ gHisiSpiFlashProtocolGuid
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdFdBaseAddress
+ gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress
+
+[Depex]
+ gHisiSpiFlashProtocolGuid
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (3 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 10:57 ` Ard Biesheuvel
2018-01-23 14:04 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform " Ming Huang
` (10 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
From: Jason Zhang <zhangjinsong2@huawei.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D03/D03.dsc | 2 +-
Platform/Hisilicon/D03/D03.fdf | 3 +-
Platform/Hisilicon/D05/D05.dsc | 1 +
Platform/Hisilicon/D05/D05.fdf | 2 +-
Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 ++++++++++++++++++++
Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 +++++++++++
Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++++++++++++++
Silicon/Hisilicon/HisiPkg.dec | 2 +
Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++++++++++++
Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +++
10 files changed, 270 insertions(+), 4 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 69bc7b4..370e17b 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -474,7 +474,7 @@
Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
-
+ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index ffddd2d..6e43228 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -271,8 +271,7 @@ READ_LOCK_STATUS = TRUE
# VGA Driver
#
INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
-
- INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
+ INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index b99cda5..0d19909 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -627,6 +627,7 @@
Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
+ Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 9a61c52..9edc679 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -294,7 +294,7 @@ READ_LOCK_STATUS = TRUE
#
INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
- INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
+ INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
new file mode 100644
index 0000000..d57905e
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
@@ -0,0 +1,89 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+#include "SasPlatform.h"
+#include <Library/OemDevicePath.h>
+#include <Library/DevicePathLib.h>
+
+#define SAS0BusAddr 0xc3000000
+#define SAS1BusAddr 0xa2000000
+#define SAS2BusAddr 0xa3000000
+
+#define SAS0ResetAddr 0xc0000000
+#define SAS1ResetAddr 0xa0000000
+#define SAS2ResetAddr 0xa0000000
+
+HISI_PLATFORM_SAS_PROTOCOL mSasPlatformProtocol[] = {
+ {
+ 0,
+ FALSE,
+ SAS0BusAddr,
+ SAS0ResetAddr
+ },
+ {
+ 1,
+ TRUE,
+ SAS1BusAddr,
+ SAS1ResetAddr
+ },
+ {
+ 2,
+ FALSE,
+ SAS2BusAddr,
+ SAS2ResetAddr
+ }
+};
+#define SAS_CONTROLLER_NUMBER sizeof (mSasPlatformProtocol) / sizeof (HISI_PLATFORM_SAS_PROTOCOL)
+
+EFI_STATUS
+EFIAPI
+SasPlatformInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ UINTN Loop;
+ SAS_PLATFORM_INSTANCE *PrivateData;
+ EFI_STATUS Status;
+
+ for (Loop = 0; Loop < SAS_CONTROLLER_NUMBER; Loop++) {
+ if (mSasPlatformProtocol[Loop].Enable != TRUE) {
+ continue;
+ }
+ PrivateData = AllocateZeroPool (sizeof(SAS_PLATFORM_INSTANCE));
+ if (PrivateData == NULL) {
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ PrivateData->SasPlatformProtocol = mSasPlatformProtocol[Loop];
+
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &PrivateData->Handle,
+ &gHisiPlatformSasProtocolGuid,
+ &PrivateData->SasPlatformProtocol,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (PrivateData);
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status));
+ return Status;
+ }
+ }
+
+ DEBUG ((DEBUG_INFO, "sas platform init dirver Ok!!!\n"));
+ return EFI_SUCCESS;
+}
+
diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
new file mode 100644
index 0000000..a3e99dd
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
@@ -0,0 +1,49 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+
+#ifndef _SAS_PLATFORM_H_
+#define _SAS_PLATFORM_H_
+
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Guid/EventGroup.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/BaseLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/IoLib.h>
+#include <Library/ArmLib.h>
+#include <Library/DxeServicesTableLib.h>
+
+#include <Library/ReportStatusCodeLib.h>
+#include <Protocol/PlatformSasProtocol.h>
+
+
+
+typedef struct {
+ UINTN Signature;
+ EFI_HANDLE Handle;
+ HISI_PLATFORM_SAS_PROTOCOL SasPlatformProtocol;
+} SAS_PLATFORM_INSTANCE;
+
+
+#endif // _SAS_PLATFORM_H_
+
diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
new file mode 100644
index 0000000..6237f50
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
@@ -0,0 +1,61 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SasPlatform
+ FILE_GUID = 67B9CDE8-257D-44f9-9DE7-39DE866E3539
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SasPlatformInitialize
+
+[Sources]
+ SasPlatform.h
+ SasPlatform.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[FeaturePcd]
+
+
+[LibraryClasses]
+ ArmLib
+ BaseLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+ DebugLib
+ DxeServicesTableLib
+ IoLib
+ MemoryAllocationLib
+ PcdLib
+ PlatformSysCtrlLib
+ ReportStatusCodeLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+ UefiLib
+
+[Guids]
+ gEfiHisiSocControllerGuid
+
+[Protocols]
+ gHisiPlatformSasProtocolGuid
+ gEfiDevicePathProtocolGuid
+
+[Depex]
+ TRUE
diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
index 81ba3be..9fa94fd 100644
--- a/Silicon/Hisilicon/HisiPkg.dec
+++ b/Silicon/Hisilicon/HisiPkg.dec
@@ -37,12 +37,14 @@
gBmcInfoProtocolGuid = {0x43fa6ffd, 0x35e4, 0x479e, {0xab, 0xec, 0x5, 0x3, 0xf6, 0x48, 0x0, 0xf5}}
gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}}
gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
+ gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
[Guids]
gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 0x56, 0xda, 0x91, 0xc0, 0x7f}}
gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 0xe1, 0x42, 0x12, 0xbf}}
+ gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}}
[LibraryClasses]
PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h
diff --git a/Silicon/Hisilicon/Include/Library/OemDevicePath.h b/Silicon/Hisilicon/Include/Library/OemDevicePath.h
new file mode 100644
index 0000000..ec8cd02
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/OemDevicePath.h
@@ -0,0 +1,54 @@
+/** @file
+*
+* Copyright (c) 2015 - 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2015 - 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _OEM_DEVICE_PATH_H_
+#define _OEM_DEVICE_PATH_H_
+#include <Protocol/DevicePath.h>
+
+typedef enum
+{
+ C_NIC = 1,
+ C_SATA = 2,
+ C_SAS = 3,
+ C_USB = 4,
+} CONTROLLER_TYPE;
+
+typedef struct{
+ VENDOR_DEVICE_PATH Vender;
+ UINT8 ControllerType;
+ UINT8 Socket;
+ UINT8 Port;
+} EXT_VENDOR_DEVICE_PATH;
+
+typedef struct{
+ UINT16 BootIndex;
+ UINT16 Port;
+}SATADES;
+
+typedef struct{
+ UINT16 BootIndex;
+ UINT16 ParentPortNumber;
+ UINT16 InterfaceNumber;
+}USBDES;
+
+typedef struct{
+ UINT16 BootIndex;
+ UINT16 Port;
+}PXEDES;
+
+extern EFI_GUID gEfiHisiSocControllerGuid;
+
+#endif
+
diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
index 1e1892b..dbd215a 100644
--- a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
+++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
@@ -34,4 +34,15 @@ struct _PLATFORM_SAS_PROTOCOL {
SAS_INIT Init;
};
+typedef struct _HISI_PLATFORM_SAS_PROTOCOL HISI_PLATFORM_SAS_PROTOCOL;
+
+struct _HISI_PLATFORM_SAS_PROTOCOL {
+ UINT32 ControllerId;
+ BOOLEAN Enable;
+ UINT64 BaseAddr;
+ UINT64 ResetAddr;
+};
+
+extern EFI_GUID gHisiPlatformSasProtocolGuid;
+
#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (4 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:00 ` Ard Biesheuvel
2018-01-23 14:07 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 Ming Huang
` (9 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
From: Jason Zhang <zhangjinsong2@huawei.com>
1. Open driver source code.
2. This code includes network sequence correction
solution.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D03/D03.dsc | 2 +
Platform/Hisilicon/D03/D03.fdf | 2 +-
Platform/Hisilicon/D05/D05.dsc | 2 +
Platform/Hisilicon/D05/D05.fdf | 3 +-
Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 ++++++++++++++++++++
Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 +++++++++
Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++++++++++++
Silicon/Hisilicon/HisiPkg.dec | 1 +
Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +++++++
9 files changed, 241 insertions(+), 3 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 370e17b..b22afe3 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -404,6 +404,8 @@
Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf
+ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
+
MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index 6e43228..e93985b 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -242,7 +242,7 @@ READ_LOCK_STATUS = TRUE
#Network
#
- INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
+ INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 0d19909..4e19de2 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -541,6 +541,8 @@
Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
+ Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
+
MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 9edc679..9873677 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -247,8 +247,7 @@ READ_LOCK_STATUS = TRUE
#
#Network
#
-
- INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
+ INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
new file mode 100644
index 0000000..385c04a
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
@@ -0,0 +1,99 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+#include "SnpPlatform.h"
+
+ HISI_PLATFORM_SNP_PROTOCOL mSnpPlatformProtocol[] = {
+ {
+ 4,
+ 1
+ },
+ {
+ 5,
+ 1
+ },
+ {
+ 2,
+ 0
+ },
+ {
+ 3,
+ 0
+ },
+ {
+ 0,
+ 1
+ },
+ {
+ 1,
+ 1
+ },
+ {
+ 6,
+ 0
+ },
+ {
+ 7,
+ 0
+ }
+};
+
+#define SNP_CONTROLLER_NUMBER sizeof (mSnpPlatformProtocol) / sizeof (HISI_PLATFORM_SNP_PROTOCOL)
+
+EFI_STATUS
+EFIAPI
+SnpPlatformInitialize (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ UINTN Loop;
+ SNP_PLATFORM_INSTANCE *PrivateData;
+ EFI_STATUS Status;
+
+ for (Loop = 0; Loop < SNP_CONTROLLER_NUMBER; Loop++) {
+ if(mSnpPlatformProtocol[Loop].Enable != 1) {
+ continue;
+ }
+ PrivateData = AllocateZeroPool (sizeof(SNP_PLATFORM_INSTANCE));
+ if (PrivateData == NULL) {
+ DEBUG ((DEBUG_INFO,"SnpPlatformInitialize error 1\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+
+ PrivateData->SnpPlatformProtocol = mSnpPlatformProtocol[Loop];
+
+ //
+ // Install the snp protocol, device path protocol
+ //
+ Status = gBS->InstallMultipleProtocolInterfaces (
+ &PrivateData->Handle,
+ &gHisiSnpPlatformProtocolGuid,
+ &PrivateData->SnpPlatformProtocol,
+ NULL
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (PrivateData);
+ DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status));
+ return Status;
+ }
+ }
+
+ DEBUG ((DEBUG_INFO,"SnpPlatformInitialize succes!\n"));
+
+ return EFI_SUCCESS;
+}
diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
new file mode 100644
index 0000000..031c8d3
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
@@ -0,0 +1,43 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+
+
+#ifndef _SNP_PLATFORM_H_
+#define _SNP_PLATFORM_H_
+
+#include <Uefi.h>
+#include <PiDxe.h>
+#include <Protocol/SnpPlatformProtocol.h>
+#include <Guid/EventGroup.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DxeServicesTableLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/ReportStatusCodeLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiDriverEntryPoint.h>
+#include <Library/UefiLib.h>
+
+typedef struct {
+ UINTN Signature;
+ EFI_HANDLE Handle;
+ HISI_PLATFORM_SNP_PROTOCOL SnpPlatformProtocol;
+} SNP_PLATFORM_INSTANCE;
+#endif
diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
new file mode 100644
index 0000000..804224b
--- /dev/null
+++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
@@ -0,0 +1,60 @@
+#/** @file
+#
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010019
+ BASE_NAME = SnpPlatform
+ FILE_GUID = 102D8FC9-20A4-42eb-AC14-1C98BA5B17A8
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SnpPlatformInitialize
+
+[Sources]
+ SnpPlatform.h
+ SnpPlatform.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[FeaturePcd]
+
+
+[LibraryClasses]
+ ArmLib
+ BaseLib
+ BaseMemoryLib
+ CacheMaintenanceLib
+ DebugLib
+ DxeServicesTableLib
+ IoLib
+ MemoryAllocationLib
+ PlatformSysCtrlLib
+ PcdLib
+ ReportStatusCodeLib
+ UefiLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Guids]
+
+[Protocols]
+ gHisiSnpPlatformProtocolGuid
+
+[Depex]
+ TRUE
+
diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
index 9fa94fd..2bb6518 100644
--- a/Silicon/Hisilicon/HisiPkg.dec
+++ b/Silicon/Hisilicon/HisiPkg.dec
@@ -38,6 +38,7 @@
gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}}
gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
+ gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
[Guids]
gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
diff --git a/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
new file mode 100644
index 0000000..0d9f0b4
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
@@ -0,0 +1,32 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _SNP_PLATFORM_PROTOCOL_H_
+#define _SNP_PLATFORM_PROTOCOL_H_
+#define HISI_SNP_PLATFORM_PROTOCOL_GUID \
+ { \
+ 0x81321f27, 0xff58, 0x4a1d, 0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f \
+ }
+
+typedef struct _HISI_PLATFORM_SNP_PROTOCOL HISI_PLATFORM_SNP_PROTOCOL;
+
+struct _HISI_PLATFORM_SNP_PROTOCOL {
+ UINT32 ControllerId;
+ UINT32 Enable;
+};
+
+extern EFI_GUID gHisiSnpPlatformProtocolGuid;
+
+#endif
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (5 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform " Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:01 ` Ard Biesheuvel
2018-01-23 14:15 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM Ming Huang
` (8 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2,
indicator to obtain the processor family from the Processor Family 2 field.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
index 61473e8..c9903ba 100644
--- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
+++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
@@ -125,7 +125,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = {
},
1, //Socket
CentralProcessor, //ProcessorType
- ProcessorFamilyOther, //ProcessorFamily
+ ProcessorFamilyIndicatorFamily2, //ProcessorFamily
2, //ProcessorManufacture
{ //ProcessorId
{ //Signature
@@ -172,7 +172,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = {
},
1, //Socket
CentralProcessor, //ProcessorType
- ProcessorFamilyOther, //ProcessorFamily
+ ProcessorFamilyIndicatorFamily2, //ProcessorFamily
2, //ProcessorManufacture
{ //ProcessorId
{ //Signature
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (6 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:04 ` Ard Biesheuvel
2018-01-18 15:01 ` [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver Ming Huang
` (7 subsequent siblings)
15 siblings, 1 reply; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Yan Zhang, Heyi Guo
From: Yan Zhang <zhangyan81@huawei.com>
In order to replace command line parameter pcie_aspm=off, BIOS needs to
disable Pcie Aspm support during Pcie initilization.
D03 and D05 do not support PCIe ASPM, so we disable it in BIOS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: Yan Zhang <zhangyan81@huawei.com>
---
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++++++++++++++++++++
Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 +
Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 +
3 files changed, 75 insertions(+)
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
index f420c91..ca3b2f8 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
@@ -1033,6 +1033,74 @@ DisableRcOptionRom (
return;
}
+VOID
+PcieDbiCs2Enable(
+ IN UINT32 HostBridgeNum,
+ IN UINT32 Port,
+ IN BOOLEAN Val
+ )
+{
+ UINT32 RegVal;
+ RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21, RegVal);
+ if (Val) {
+ RegVal = RegVal | BIT2;
+ /*BIT2: DBI Chip Select indicator. 0 indicates CS, 1 indicates CS2.*/
+ } else {
+ RegVal = RegVal & (~BIT2);
+ }
+ RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21, RegVal);
+}
+
+BOOLEAN
+PcieDBIReadOnlyWriteEnable(
+ IN UINT32 HostBridgeNum,
+ IN UINT32 Port
+ )
+{
+ UINT32 Val;
+ RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, Val);
+ if (Val == 0x1) {
+ return TRUE;
+ } else {
+ RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, 0x1);
+ /*Delay 10us to make sure the PCIE device have enouph time to response. */
+ MicroSecondDelay(10);
+ RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, Val);
+ if (Val == 0x1) {
+ return TRUE;
+ }
+ }
+ DEBUG ((DEBUG_ERROR,"PcieDBIReadOnlyWriteEnable Fail!!!\n"));
+ return FALSE;
+}
+VOID
+SwitchPcieASPMSupport (
+ IN UINT32 HostBridgeNum,
+ IN UINT32 Port,
+ IN UINT8 Val
+ )
+{
+ PCIE_EP_PCIE_CAP3_U pcie_cap3;
+
+ if (Port >= PCIE_MAX_ROOTBRIDGE) {
+ DEBUG ((DEBUG_ERROR, "Port is not valid\n"));
+ return;
+ }
+ if (!PcieDBIReadOnlyWriteEnable (HostBridgeNum, Port)) {
+ DEBUG ((DEBUG_INFO, "PcieDeEmphasisLevelSet ReadOnly Reg do not Enable!!!\n"));
+ return;
+ }
+ PcieDbiCs2Enable (HostBridgeNum, Port, FALSE);
+
+ RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32);
+ pcie_cap3.Bits.active_state_power_management = Val;
+ RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32);
+ RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32);
+ DEBUG ((DEBUG_INFO, "ASPI active state power management: %d\n", pcie_cap3.Bits.active_state_power_management));
+
+ PcieDbiCs2Enable (HostBridgeNum, Port, TRUE);
+}
+
EFI_STATUS
EFIAPI
PciePortInit (
@@ -1090,6 +1158,9 @@ PciePortInit (
/* disable link up interrupt */
(VOID)PcieMaskLinkUpInit(soctype, HostBridgeNum, PortIndex);
+ //disable ASPM
+ SwitchPcieASPMSupport (HostBridgeNum, PortIndex, PCIE_ASPM_DISABLE);
+
/* Pcie Equalization*/
(VOID)PcieEqualization(soctype ,HostBridgeNum, PortIndex);
diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
index 9a0f636..e96c53c 100644
--- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
+++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
@@ -77,6 +77,8 @@
#define RegWrite(addr,data) MmioWrite32((addr), (data))
#define RegRead(addr,data) ((data) = MmioRead32 (addr))
+#define PCIE_ASPM_DISABLE 0x0
+#define PCIE_ASPM_ENABLE 0x1
typedef struct tagPcieDebugInfo
{
diff --git a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
index bf57652..c8b9781 100644
--- a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
+++ b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
@@ -135,6 +135,7 @@
#define PCIE_EEP_PORTLOGIC53_REG (0x888)
#define PCIE_EEP_GEN3_CONTRL_REG (0x890)
#define PCIE_EEP_PIPE_LOOPBACK_REG (0x8B8)
+#define PCIE_DBI_READ_ONLY_WRITE_ENABLE (0x8BC)
#define PCIE_EEP_PORTLOGIC54_REG (0x900)
#define PCIE_EEP_PORTLOGIC55_REG (0x904)
#define PCIE_EEP_PORTLOGIC56_REG (0x908)
@@ -12556,6 +12557,7 @@ typedef union tagPortlogic93
#define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY5_REG (PCIE_SUBCTRL_BASE + 0x1018)
#define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY6_REG (PCIE_SUBCTRL_BASE + 0x101C)
#define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY7_REG (PCIE_SUBCTRL_BASE + 0x1020)
+#define PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21 (PCIE_SUBCTRL_BASE + 0x1024)
#define PCIE_SUBCTRL_SC_DISPATCH_RETRY_CONTROL_REG (PCIE_SUBCTRL_BASE + 0x1030)
#define PCIE_SUBCTRL_SC_DISPATCH_INTMASK_REG (PCIE_SUBCTRL_BASE + 0x1100)
#define PCIE_SUBCTRL_SC_DISPATCH_RAWINT_REG (PCIE_SUBCTRL_BASE + 0x1104)
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (7 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:05 ` Ard Biesheuvel
2018-01-23 14:21 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 10/14] Hisilicon/D03: " Ming Huang
` (6 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo, GongChengYa
In SCT test,we find SP805 watchdog driver can't reset when timeout
so we use another driver in MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: GongChengYa <gongchengya1@huawei.com>
---
Platform/Hisilicon/D05/D05.dsc | 2 +-
Platform/Hisilicon/D05/D05.fdf | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 4e19de2..79890ef 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -515,7 +515,7 @@
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
#
#ACPI
diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
index 9873677..d05e227 100644
--- a/Platform/Hisilicon/D05/D05.fdf
+++ b/Platform/Hisilicon/D05/D05.fdf
@@ -193,7 +193,7 @@ READ_LOCK_STATUS = TRUE
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
#
# FAT filesystem + GPT/MBR partitioning
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 10/14] Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (8 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:05 ` Ard Biesheuvel
2018-01-23 14:21 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM Ming Huang
` (5 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo, GongChengYa
In SCT test,we find SP805 watchdog driver can't reset when timeout
so we use another driver in MdeModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: GongChengYa <gongchengya1@huawei.com>
---
Platform/Hisilicon/D03/D03.dsc | 2 +-
Platform/Hisilicon/D03/D03.fdf | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index b22afe3..88c08dd 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -379,7 +379,7 @@
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
#
#ACPI
diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
index e93985b..5b7bb1d 100644
--- a/Platform/Hisilicon/D03/D03.fdf
+++ b/Platform/Hisilicon/D03/D03.fdf
@@ -189,7 +189,7 @@ READ_LOCK_STATUS = TRUE
INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
- INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
+ INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
#
# FAT filesystem + GPT/MBR partitioning
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (9 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 10/14] Hisilicon/D03: " Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:06 ` Ard Biesheuvel
2018-01-18 15:01 ` [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM Ming Huang
` (4 subsequent siblings)
15 siblings, 1 reply; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
Add ITS affinity structure in SRAT.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 ++++++++++
Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +++++++++-
2 files changed, 19 insertions(+), 1 deletion(-)
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
index b448a29..8ea0c4b 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
@@ -121,6 +121,16 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62
EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x00000001,0x00000000) //GICC Affinity Processor 63
},
+ {
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000001),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000002),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000003),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000004),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000005),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000006),
+ EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000007)
+ },
};
//
diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
index 60f9925..fd05a3b 100644
--- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
+++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
@@ -39,6 +39,13 @@
ACPIProcessorUID, Flags, ClockDomain \
}
+#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \
+ ProximityDomain, ItsId) \
+ { \
+ 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \
+ {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \
+ }
+
#define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \
ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, Flags) \
{ \
@@ -70,12 +77,13 @@
//
#define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64
#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10
-
+#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8
typedef struct {
EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;
EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT];
EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
+ EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
} EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
#pragma pack()
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (10 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:08 ` Ard Biesheuvel
2018-01-18 15:01 ` [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib Ming Huang
` (3 subsequent siblings)
15 siblings, 1 reply; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
Add PXM method for Pcie device, HNS device and SAS device.
Add STA method for HNS.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: hensonwang <wanghuiqiang@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 ++++++
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 ++++++++++++++++++--
Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +++++++++--
3 files changed, 57 insertions(+), 5 deletions(-)
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
index 11c28ba..7aa04af 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
@@ -233,6 +233,15 @@ Scope(_SB)
}
})
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
+ Method (_STA, 0, NotSerialized)
+ {
+ Return(0x0F)
+ }
+
//reset XGE port
//Arg0 : XGE port index in dsaf
//Arg1 : 0 reset, 1 cancle reset
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
index 55c7f50..122e4f0 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
@@ -141,7 +141,10 @@ Scope(_SB)
{
Return (0xf)
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
} // Device(PCI2)
Device (RES2)
@@ -240,7 +243,10 @@ Scope(_SB)
{
Return (RBYV())
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI4)
Device (RES4)
{
@@ -338,6 +344,10 @@ Scope(_SB)
{
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI5)
Device (RES5)
{
@@ -435,6 +445,10 @@ Scope(_SB)
{
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI6)
Device (RES6)
{
@@ -531,6 +545,10 @@ Scope(_SB)
{
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x01)
+ }
} // Device(PCI7)
Device (RES7)
{
@@ -690,6 +708,10 @@ Scope(_SB)
{
Return (0xf)
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x02)
+ }
} // Device(PCIa)
Device (RESa)
{
@@ -810,6 +832,10 @@ Scope(_SB)
{
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x03)
+ }
} // Device(PCIc)
Device (RESc)
@@ -907,6 +933,10 @@ Scope(_SB)
{
Return (RBYV())
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x03)
+ }
} // Device(PCId)
Device (RESd)
{
diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
index 6455130..d5b7e2f 100644
--- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
+++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
@@ -88,7 +88,10 @@ Scope(_SB)
Store(0x7ffff, CLK)
Sleep(1)
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
Method (_STA, 0, NotSerialized)
{
Return (0x0)
@@ -169,8 +172,15 @@ Scope(_SB)
Store(0x7ffff, CLK)
Sleep(1)
}
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
+ Method (_STA, 0, NotSerialized)
+ {
+ Return(0x0F)
+ }
}
-
Device(SAS2) {
Name(_HID, "HISI0162")
Name(_CCA, 1)
@@ -244,7 +254,10 @@ Scope(_SB)
Store(0x7ffff, CLK)
Sleep(1)
}
-
+ Method (_PXM, 0, NotSerialized)
+ {
+ Return(0x00)
+ }
Method (_STA, 0, NotSerialized)
{
Return (0x0)
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (11 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:11 ` Ard Biesheuvel
2018-01-23 10:23 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 Ming Huang
` (2 subsequent siblings)
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
OsBootLib can create OS option after upgrade firmware.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D03/D03.dsc | 1 +
Platform/Hisilicon/D05/D05.dsc | 1 +
Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++
Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 +++++
Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++++
Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 +++
Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 ++++++++++++++++++++
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 6 +
Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 +
9 files changed, 970 insertions(+)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 88c08dd..6f1164e 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -47,6 +47,7 @@
UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+ OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 79890ef..52ffad5 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -55,6 +55,7 @@
FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
!if $(NETWORK_IP6_ENABLE) == TRUE
TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
diff --git a/Silicon/Hisilicon/Include/Library/OsBootLib.h b/Silicon/Hisilicon/Include/Library/OsBootLib.h
new file mode 100644
index 0000000..f5cbc4a
--- /dev/null
+++ b/Silicon/Hisilicon/Include/Library/OsBootLib.h
@@ -0,0 +1,47 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _OS_BOOT_LIB_H_
+#define _OS_BOOT_LIB_H_
+
+
+/**
+ Remove invalid OS boot options, and then add new ones.
+
+*/
+EFI_STATUS
+AdjustOsBootOrder (
+ VOID
+ );
+
+/**
+ Try to find UEFI OSs and create the boot options which haven't been listed in BootOrder.
+
+*/
+EFI_STATUS
+CreateOsBootOptions (
+ VOID
+ );
+
+/**
+ Remove UEFI OS boot options when it is disappeared in system.
+
+*/
+EFI_STATUS
+RemoveInvalidOsBootOptions (
+ VOID
+ );
+
+#endif
diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
new file mode 100644
index 0000000..1991471
--- /dev/null
+++ b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
@@ -0,0 +1,124 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#ifndef _OS_BOOT_H_
+#define _OS_BOOT_H_
+
+#include <PiDxe.h>
+#include <PlatformArch.h>
+#include <Uefi.h>
+#include <Guid/FileInfo.h>
+#include <Guid/GlobalVariable.h>
+#include <IndustryStandard/PeImage.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/OsBootLib.h>
+#include <Library/PrintLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/UefiBootManagerLib.h>
+
+#include <Protocol/BlockIo.h>
+#include <Protocol/DevicePath.h>
+#include <Protocol/DevicePathFromText.h>
+#include <Protocol/DevicePathToText.h>
+#include <Protocol/FirmwareVolume2.h>
+#include <Protocol/SimpleFileSystem.h>
+
+
+typedef struct {
+ CHAR16 *FilePathString;
+ CHAR16 *Description;
+ }UEFI_OS_BOOT_FILE;
+
+/**
+ Check same boot option by device path.
+
+*/
+BOOLEAN
+BeHaveSameBootOptionByDP (
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ CHAR16 *FileName
+ );
+
+/**
+ Remove UEFI OS boot options when it is disappeared in system.
+
+*/
+EFI_STATUS
+RemoveInvalidOsBootOptions (
+ VOID
+ );
+
+
+/**
+ Check Os Boot Option if exist in current system.
+
+*/
+BOOLEAN
+BeInvalidOsBootOption (
+ EFI_DEVICE_PATH_PROTOCOL *OptionDp
+ );
+
+/**
+ Get the headers (dos, image, optional header) from an image
+
+ @param Device SimpleFileSystem device handle
+ @param FileName File name for the image
+ @param DosHeader Pointer to dos header
+ @param Hdr The buffer in which to return the PE32, PE32+, or TE header.
+
+ @retval EFI_SUCCESS Successfully get the machine type.
+ @retval EFI_NOT_FOUND The file is not found.
+ @retval EFI_LOAD_ERROR File is not a valid image file.
+
+**/
+EFI_STATUS
+EFIAPI
+OsBootGetImageHeader (
+ IN EFI_HANDLE Device,
+ IN CHAR16 *FileName,
+ OUT EFI_IMAGE_DOS_HEADER *DosHeader,
+ OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr
+ );
+
+UINTN
+GetOptionPositionWithoutGpt (
+ VOID
+ );
+
+VOID
+PrintDevicePath (
+ CHAR16 *PreStr,
+ EFI_DEVICE_PATH_PROTOCOL *Path
+ );
+
+VOID
+RemoveSuperfluousOption (
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions,
+ UINT16 *OptionFlags,
+ UINTN BootOptionCount
+ );
+
+BOOLEAN
+IsOptionAddedByOsBootLib (
+ UINT16 *OptionDescription
+ );
+
+#endif
diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
new file mode 100644
index 0000000..29b6b62
--- /dev/null
+++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
@@ -0,0 +1,217 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "OsBoot.h"
+
+UEFI_OS_BOOT_FILE mUefiOsBootFiles[] = {
+ {EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, L"Uefi Default Boot"},
+ {L"\\BOOT\\EFI\\EFI\\CENTOS\\grubaa64.efi", L"Uefi CENTOS Boot"},
+ {L"\\EFI\\centos\\grubaa64.efi", L"Uefi CentOS Grub Boot"},
+ {L"\\EFI\\debian\\grubaa64.efi", L"Uefi Debian Grub Boot"},
+ {L"\\EFI\\GRUB2\\GRUBAA64.EFI", L"Hisilicon Linux Boot"},
+ {L"\\EFI\\Microsoft\\Boot\\bootmgfw.efi", L"Uefi Windows Boot"},
+ {L"\\EFI\\redhat\\grub.efi", L"Uefi Redhat Boot"},
+ {L"\\EFI\\SuSE\\elilo.efi", L"Uefi SuSE Boot"},
+ {L"\\EFI\\ubuntu\\grubaa64.efi", L"Uefi Ubuntu Grub Boot"},
+ {L"\\EFI\\ubuntu\\shimx64.efi", L"Uefi Ubuntu Shimx64 Boot"},
+ {L"\\EFI\\ubuntu\\grubx64.efi", L"Uefi Ubuntu Grubx64 Boot"},
+ {L"\\EFI\\ubuntu\\shim.efi", L"Uefi Ubuntu Shim Boot"},
+ {L"\\EFI\\ubuntu\\grub.efi", L"Uefi Ubuntu Grub Boot"},
+ {L"\\EFI\\fedora\\shim.efi", L"Uefi Fedora Shim Boot"}
+};
+
+BOOLEAN
+IsOptionAddedByOsBootLib (
+ UINT16 *OptionDescription
+ )
+{
+ UINTN Index;
+
+ for (Index = 0; Index < (sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE)); Index++) {
+ if (StrCmp (mUefiOsBootFiles[Index].Description, OptionDescription) == 0) {
+ return TRUE;
+ }
+ }
+
+ return FALSE;
+}
+
+/**
+ Remove invalid OS boot options, and then add new ones.
+
+*/
+EFI_STATUS
+AdjustOsBootOrder (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+
+ Status = RemoveInvalidOsBootOptions ();
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = CreateOsBootOptions ();
+ return Status;
+}
+
+
+/**
+ Remove UEFI OS boot options when it is disappeared in system.
+
+*/
+EFI_STATUS
+RemoveInvalidOsBootOptions (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+ UINT16 *OptionDelFlags;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ UINTN BootOptionCount;
+
+ BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);
+ OptionDelFlags = AllocateZeroPool (BootOptionCount * sizeof(UINT16));
+ if (OptionDelFlags == NULL) {
+ goto exit;
+ }
+
+ for (Index = 0; Index < BootOptionCount; Index++) {
+ if (OptionDelFlags[Index] == 0) {
+ if (BeInvalidOsBootOption (BootOptions[Index].FilePath)) {
+ Status = EfiBootManagerDeleteLoadOptionVariable (BootOptions[Index].OptionNumber, LoadOptionTypeBoot);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status));
+ continue;
+ }
+ PrintDevicePath (L"Del Option,", BootOptions[Index].FilePath);
+ } else {
+ RemoveSuperfluousOption (&BootOptions[Index], OptionDelFlags, BootOptionCount - Index);
+ }
+ }
+ }
+
+ exit:
+ if (OptionDelFlags != NULL) {
+ FreePool (OptionDelFlags);
+ }
+ EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Try to find UEFI OSs and create the boot options which haven't been listed in BootOrder.
+
+*/
+EFI_STATUS
+CreateOsBootOptions (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *FileSystemHandles;
+ UINTN NumberFileSystemHandles;
+ UINTN Index, Count;
+ EFI_DEVICE_PATH_PROTOCOL *OsFileDP;
+ EFI_BLOCK_IO_PROTOCOL *BlkIo;
+ UINTN MaxFiles;
+ EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData;
+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
+ EFI_IMAGE_DOS_HEADER DosHeader;
+ EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
+
+ //
+ //Look for file system to find default Os boot load.
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiSimpleFileSystemProtocolGuid,
+ NULL,
+ &NumberFileSystemHandles,
+ &FileSystemHandles
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ MaxFiles = sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE);
+ for (Index = 0; Index < NumberFileSystemHandles; Index++) {
+ Status = gBS->HandleProtocol (
+ FileSystemHandles[Index],
+ &gEfiBlockIoProtocolGuid,
+ (VOID **) &BlkIo
+ );
+ if (EFI_ERROR (Status)) {
+ continue;
+ }
+
+ Hdr.Union = &HdrData;
+ for (Count = 0; Count < MaxFiles; Count++) {
+ //
+ //Read Boot File Path to check validation.
+ //
+ Status = OsBootGetImageHeader (
+ FileSystemHandles[Index],
+ mUefiOsBootFiles[Count].FilePathString,
+ &DosHeader,
+ Hdr
+ );
+ if (!EFI_ERROR (Status) &&
+ EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) &&
+ Hdr.Pe32->OptionalHeader.Subsystem == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION) {
+
+ OsFileDP = NULL;
+ OsFileDP = FileDevicePath (FileSystemHandles[Index], mUefiOsBootFiles[Count].FilePathString);
+ PrintDevicePath (L"Exist", OsFileDP);
+ if (!BeHaveSameBootOptionByDP (OsFileDP, mUefiOsBootFiles[Count].FilePathString)) {
+ //
+ // Create new BootOption if it is not present.
+ //
+ DEBUG ((DEBUG_INFO, "CreateOsBootOptions (), Make New Boot Option :%s.\n", mUefiOsBootFiles[Count].Description));
+ Status = EfiBootManagerInitializeLoadOption (
+ &NewOption,
+ LoadOptionNumberUnassigned,
+ LoadOptionTypeBoot,
+ LOAD_OPTION_ACTIVE,
+ mUefiOsBootFiles[Count].Description,
+ OsFileDP,
+ NULL,
+ 0
+ );
+ ASSERT_EFI_ERROR (Status);
+ Status = EfiBootManagerAddLoadOptionVariable (&NewOption, GetOptionPositionWithoutGpt ());
+ ASSERT_EFI_ERROR (Status);
+ EfiBootManagerFreeLoadOption (&NewOption);
+ }
+
+ if(OsFileDP != NULL) {
+ FreePool (OsFileDP);
+ OsFileDP = NULL;
+ }
+ }
+ }
+ }
+
+ if (NumberFileSystemHandles != 0) {
+ FreePool (FileSystemHandles);
+ }
+
+ return EFI_SUCCESS;
+}
+
diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
new file mode 100644
index 0000000..12e6d49
--- /dev/null
+++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
@@ -0,0 +1,59 @@
+## @file
+# Manager Os Boot option.
+# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+# Copyright (c) 2017, Linaro Limited. All rights reserved.
+#
+# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = OsBootLib
+ FILE_GUID = e406c654-ccde-4d32-8362-0aec01725139
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = OsBootLib
+
+[Sources]
+ OsBootLib.c
+ OsBootLibMisc.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Silicon/Hisilicon/HisiPkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ BaseLib
+ DxeServicesLib
+ DebugLib
+ DxeServicesTableLib
+ DevicePathLib
+ MemoryAllocationLib
+ PrintLib
+ UefiRuntimeServicesTableLib
+ UefiLib
+ UefiBootServicesTableLib
+ UefiBootManagerLib
+
+[Guids]
+ gEfiGlobalVariableGuid
+ gEfiFileInfoGuid ## SOMETIMES_CONSUMES ## GUID
+
+[Protocols]
+ gEfiSimpleFileSystemProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiBlockIoProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiFirmwareVolume2ProtocolGuid ## SOMETIMES_CONSUMES
+ gEfiDevicePathProtocolGuid ## CONSUMES
+ gEfiDevicePathToTextProtocolGuid
+
+[Pcd]
diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
new file mode 100644
index 0000000..4e6d895
--- /dev/null
+++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
@@ -0,0 +1,514 @@
+/** @file
+*
+* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
+* Copyright (c) 2017, Linaro Limited. All rights reserved.
+*
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include "OsBoot.h"
+
+extern UEFI_OS_BOOT_FILE mUefiOsBootFiles[];
+
+/**
+ Read file the headers of dos, image, optional header.
+
+ @param Device SimpleFileSystem device handle
+ @param FileSize File size
+ @param DosHeader Pointer to dos header
+ @param Hdr The buffer in which to return the PE32, PE32+, or TE header.
+
+ @retval EFI_SUCCESS Successfully get the File.
+ @retval EFI_LOAD_ERROR File is not a valid image file.
+
+**/
+EFI_STATUS
+ReadDosHeader (
+ EFI_FILE_HANDLE ThisFile,
+ UINT64 FileSize,
+ EFI_IMAGE_DOS_HEADER *DosHeader,
+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION *Hdr
+ )
+{
+ EFI_STATUS Status;
+ UINTN BufferSize;
+ //
+ // Read dos header
+ //
+ BufferSize = sizeof (EFI_IMAGE_DOS_HEADER);
+ Status = ThisFile->Read (ThisFile, &BufferSize, DosHeader);
+ if (EFI_ERROR (Status) ||
+ BufferSize < sizeof (EFI_IMAGE_DOS_HEADER) ||
+ FileSize <= DosHeader->e_lfanew ||
+ DosHeader->e_magic != EFI_IMAGE_DOS_SIGNATURE) {
+ Status = EFI_LOAD_ERROR;
+ DEBUG ((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__));
+ goto ErrReadDos;
+ }
+
+ //
+ // Move to PE signature
+ //
+ Status = ThisFile->SetPosition (ThisFile, DosHeader->e_lfanew);
+ if (EFI_ERROR (Status)) {
+ Status = EFI_LOAD_ERROR;
+ DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__));
+ goto ErrReadDos;
+ }
+
+ //
+ // Read and check PE signature
+ //
+ BufferSize = sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION);
+ Status = ThisFile->Read (ThisFile, &BufferSize, (VOID*)(Hdr->Pe32));
+ if (EFI_ERROR (Status) ||
+ BufferSize < sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION) ||
+ Hdr->Pe32->Signature != EFI_IMAGE_NT_SIGNATURE) {
+ Status = EFI_LOAD_ERROR;
+ DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__));
+ goto ErrReadDos;
+ }
+
+ErrReadDos:
+ return Status;
+}
+
+/**
+ Get the headers (dos, image, optional header) from an image
+
+ @param Device SimpleFileSystem device handle
+ @param FileName File name for the image
+ @param DosHeader Pointer to dos header
+ @param Hdr The buffer in which to return the PE32, PE32+, or TE header.
+
+ @retval EFI_SUCCESS Successfully get the machine type.
+ @retval EFI_NOT_FOUND The file is not found.
+ @retval EFI_LOAD_ERROR File is not a valid image file.
+
+**/
+EFI_STATUS
+EFIAPI
+OsBootGetImageHeader (
+ IN EFI_HANDLE Device,
+ IN CHAR16 *FileName,
+ OUT EFI_IMAGE_DOS_HEADER *DosHeader,
+ OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr
+ )
+{
+ EFI_STATUS Status;
+ EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *Volume;
+ EFI_FILE_HANDLE Root;
+ EFI_FILE_HANDLE ThisFile;
+ UINTN BufferSize;
+ UINT64 FileSize;
+ EFI_FILE_INFO *Info;
+ BOOLEAN Condition = TRUE;//pclint
+
+ Root = NULL;
+ ThisFile = NULL;
+ //
+ // Handle the file system interface to the device
+ //
+ Status = gBS->HandleProtocol (
+ Device,
+ &gEfiSimpleFileSystemProtocolGuid,
+ (VOID *) &Volume
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ goto Done;
+ }
+
+ Status = Volume->OpenVolume (
+ Volume,
+ &Root
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ Root = NULL;
+ goto Done;
+ }
+
+ if (Root == NULL) {
+ Status = EFI_LOAD_ERROR;
+ DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ goto Done;
+ }
+ Status = Root->Open (Root, &ThisFile, FileName, EFI_FILE_MODE_READ, 0);
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "%a(%d):file not found ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ goto Done;
+ }
+
+ if (ThisFile == NULL) {
+ DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ Status = EFI_LOAD_ERROR;
+ goto Done;
+ }
+ //
+ // Get file size
+ //
+ BufferSize = SIZE_OF_EFI_FILE_INFO + 200;
+ do {
+ Info = NULL;
+ Status = gBS->AllocatePool (EfiBootServicesData, BufferSize, (VOID **) &Info);
+ if (EFI_ERROR (Status)) {
+ goto Done;
+ }
+ Status = ThisFile->GetInfo (
+ ThisFile,
+ &gEfiFileInfoGuid,
+ &BufferSize,
+ Info
+ );
+ if (!EFI_ERROR (Status)) {
+ break;
+ }
+ if (Status != EFI_BUFFER_TOO_SMALL) {
+ FreePool (Info);
+ goto Done;
+ }
+ FreePool (Info);
+ } while (Condition);
+
+ FileSize = Info->FileSize;
+ FreePool (Info);
+
+ Status = ReadDosHeader(ThisFile, FileSize, DosHeader, &Hdr);
+ if (EFI_ERROR (Status)) {
+ DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ goto Done;
+ }
+ //
+ // Check PE32 or PE32+ magic
+ //
+ if (Hdr.Pe32->OptionalHeader.Magic != EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC &&
+ Hdr.Pe32->OptionalHeader.Magic != EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) {
+ Status = EFI_LOAD_ERROR;
+ DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
+ goto Done;
+ }
+
+ Done:
+ if (ThisFile != NULL) {
+ ThisFile->Close (ThisFile);
+ }
+ if (Root != NULL) {
+ Root->Close (Root);
+ }
+ return Status;
+}
+
+
+VOID
+PrintDevicePath (
+ CHAR16 *PreStr,
+ EFI_DEVICE_PATH_PROTOCOL *Path
+ )
+{
+ CHAR16 *DevicePathTxt;
+ EFI_STATUS Status;
+ EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevicePathToTextProtocol;
+
+ DevicePathTxt = NULL;
+ Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **)&DevicePathToTextProtocol);
+ if (!EFI_ERROR (Status)) {
+ DevicePathTxt = DevicePathToTextProtocol->ConvertDevicePathToText (Path, FALSE, TRUE);
+ DEBUG ((DEBUG_ERROR, "%s DevPath:[%s]\n", PreStr, DevicePathTxt));
+ }
+
+ if (DevicePathTxt != NULL) {
+ FreePool (DevicePathTxt);
+ }
+
+ return ;
+}
+
+CHAR16 *
+GetGptNodeText (
+ EFI_DEVICE_PATH_PROTOCOL *Path
+ )
+{
+ CHAR16 *NodeText;
+
+ while (!IsDevicePathEnd (Path)) {
+ NodeText = ConvertDeviceNodeToText (Path, TRUE, TRUE);
+ if (StrStr (NodeText, L"GPT") != NULL) {
+ return NodeText;
+ }
+
+ if (NodeText != NULL) {
+ FreePool (NodeText);
+ }
+
+ Path = NextDevicePathNode (Path);
+ }
+
+ return NULL;
+}
+
+BOOLEAN
+IsPartitionGuidEqual (
+ EFI_DEVICE_PATH_PROTOCOL *OptionPath,
+ EFI_DEVICE_PATH_PROTOCOL *FilePath
+ )
+{
+ CHAR16 *OptionGptText;
+ CHAR16 *FileGptText;
+
+ OptionGptText = GetGptNodeText (OptionPath);
+ FileGptText = GetGptNodeText (FilePath);
+ if ((OptionGptText != NULL) && (FileGptText != NULL) && (StrCmp (OptionGptText, FileGptText) == 0)) {
+ return TRUE;
+ }
+
+ if (OptionGptText != NULL) {
+ FreePool (OptionGptText);
+ }
+ if (FileGptText != NULL) {
+ FreePool (FileGptText);
+ }
+
+ return FALSE;
+}
+
+/* If a partition exist a valid grub, OsBootLib will create a Option after bios firmware upgraded,
+ * and then installing the same OS on the same partition will create anothor Option. the two Options
+ * are superfluous, the Option added by OsBootLib should be remove.
+ *
+ * It's allowed of creating several Option in the same GPT by installing OS.
+ */
+VOID
+RemoveSuperfluousOption (
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions,
+ UINT16 *OptionDelFlags,
+ UINTN BootOptionCount
+ )
+{
+ EFI_STATUS Status;
+ UINTN Index;
+
+ for (Index = 1; Index < BootOptionCount; Index++) {
+ if (OptionDelFlags[Index] == 0) {
+ if ((IsPartitionGuidEqual (BootOptions[0].FilePath, BootOptions[Index].FilePath)) &&
+ (IsOptionAddedByOsBootLib (BootOptions[Index].Description))) {
+ OptionDelFlags[Index] = 1;
+
+ Status = EfiBootManagerDeleteLoadOptionVariable (BootOptions[Index].OptionNumber, LoadOptionTypeBoot);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status));
+ continue;
+ }
+
+ PrintDevicePath (L"Del Option(du),", BootOptions[Index].FilePath);
+ }
+ }
+ }
+
+ return;
+}
+
+UINTN
+GetOptionPositionWithoutGpt (
+ VOID
+ )
+{
+ UINTN Index;
+ UINTN BootOptionCount;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+
+ BootOptions = EfiBootManagerGetLoadOptions (
+ &BootOptionCount, LoadOptionTypeBoot
+ );
+ for (Index = 0; Index < BootOptionCount; Index++) {
+ if (GetGptNodeText (BootOptions[Index].FilePath) == NULL) {
+ return Index;
+ }
+ }
+
+ return 0;
+}
+
+CHAR16 *
+GetFileTextByDevicePath (
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+{
+ CHAR16 *FileString;
+
+ FileString = NULL;
+
+ while (!IsDevicePathEnd (DevicePath)) {
+ if (MEDIA_DEVICE_PATH == DevicePathType (DevicePath) &&
+ MEDIA_FILEPATH_DP == DevicePathSubType (DevicePath)) {
+ FileString = ConvertDeviceNodeToText (DevicePath, TRUE, TRUE);
+ break;
+ }
+ DevicePath = NextDevicePathNode (DevicePath);
+ }
+
+ return FileString;
+}
+
+
+/**
+ Check same boot option by device path.
+
+*/
+BOOLEAN
+BeHaveSameBootOptionByDP (
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ CHAR16 *FileName
+ )
+{
+ UINTN Index;
+ UINTN ValidPathSize;
+ BOOLEAN Found;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ UINTN BootOptionCount;
+
+ if (NULL == DevicePath) {
+ return FALSE;
+ }
+
+ BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);
+
+ Found = FALSE;
+ for (Index = 0; Index < BootOptionCount; Index++) {
+ /* If a partition exist a valid Option, then the new Option should not be added.
+ * After installation, some iso will create several valid grub file, like
+ * \EFI\centos\shimaa64.efi, \EFI\BOOT\BOOTAA64.EFI.
+ */
+ if(IsPartitionGuidEqual (BootOptions[Index].FilePath, DevicePath)) {
+ DEBUG ((DEBUG_ERROR, "Get the same Option(GPT).\n"));
+ Found = TRUE;
+ break;
+ }
+
+ /* If DevicePath of new Option is matched in exist Option and file name of
+ * new Option is EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, then the new Option should be ignored.
+ */
+ ValidPathSize = GetDevicePathSize (BootOptions[Index].FilePath) - END_DEVICE_PATH_LENGTH;
+ if ((CompareMem (BootOptions[Index].FilePath, DevicePath, ValidPathSize) == 0) &&
+ (StrCmp (FileName, EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64) == 0))
+ {
+ DEBUG ((DEBUG_ERROR, "Get the same Option.\n"));
+ Found = TRUE;
+ break;
+ }
+ }
+
+ EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
+
+ return Found;
+}
+
+/**
+ Check Os Boot Option if exist in current system.
+
+*/
+BOOLEAN
+BeInvalidOsBootOption (
+ EFI_DEVICE_PATH_PROTOCOL *OptionDp
+ )
+{
+ EFI_STATUS Status;
+ EFI_HANDLE *FileSystemHandles;
+ UINTN NumberFileSystemHandles;
+ UINTN Index;
+ EFI_DEVICE_PATH_PROTOCOL *FileSystemDP;
+ UINTN OptionDpSize;
+ EFI_BLOCK_IO_PROTOCOL *BlkIo;
+ EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData;
+ EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
+ EFI_IMAGE_DOS_HEADER DosHeader;
+ BOOLEAN Invalid;
+ EFI_DEVICE_PATH_PROTOCOL* DevicePathNode;
+ CHAR16 *FileString;
+
+ Invalid = TRUE;
+ if (NULL == OptionDp) {
+ return FALSE;
+ }
+
+ OptionDpSize = GetDevicePathSize (OptionDp);
+ if (OptionDpSize == 0) {
+ return FALSE;
+ }
+
+ //
+ // Os BootOption should be File Device Path.
+ //
+ DevicePathNode = OptionDp;
+ FileString = GetFileTextByDevicePath (DevicePathNode);
+ if (FileString == NULL) {
+ return FALSE;
+ }
+
+ //
+ // File should be exsiting in system.
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiSimpleFileSystemProtocolGuid,
+ NULL,
+ &NumberFileSystemHandles,
+ &FileSystemHandles
+ );
+ if (EFI_ERROR (Status)) {
+ FreePool (FileString);
+ return FALSE;
+ }
+
+ for (Index = 0; Index < NumberFileSystemHandles; Index++) {
+ Status = gBS->HandleProtocol (
+ FileSystemHandles[Index],
+ &gEfiBlockIoProtocolGuid,
+ (VOID **) &BlkIo
+ );
+ if (EFI_ERROR (Status)) {
+ continue;
+ }
+
+ FileSystemDP = FileDevicePath (FileSystemHandles[Index], FileString);
+ /* If Partition is existed and the grub file is existed, then the Option is valid. */
+ if ((CompareMem ((VOID *) OptionDp, (VOID *) FileSystemDP, OptionDpSize) == 0) ||
+ (IsPartitionGuidEqual (OptionDp, FileSystemDP))) {
+ Hdr.Union = &HdrData;
+ Status = OsBootGetImageHeader (
+ FileSystemHandles[Index],
+ FileString,
+ &DosHeader,
+ Hdr
+ );
+ if (!EFI_ERROR (Status) &&
+ EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) &&
+ Hdr.Pe32->OptionalHeader.Subsystem == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION) {
+ DEBUG ((DEBUG_ERROR, "BeValidOsBootOption (),Get Bootable file :%s.\n", FileString));
+ Invalid = FALSE;
+ break;
+ }
+ }
+
+ if (FileSystemDP != NULL) {
+ FreePool (FileSystemDP);
+ }
+ }
+
+ if (NumberFileSystemHandles != 0) {
+ FreePool (FileSystemHandles);
+ }
+ if (FileString != NULL) {
+ FreePool (FileString);
+ }
+
+ return Invalid;
+}
+
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
index 845519f..1c6e8bf 100644
--- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
@@ -18,6 +18,7 @@
#include <IndustryStandard/Pci22.h>
#include <Library/BmcConfigBootLib.h>
#include <Library/DevicePathLib.h>
+#include <Library/OsBootLib.h>
#include <Library/PcdLib.h>
#include <Library/UefiBootManagerLib.h>
#include <Library/UefiLib.h>
@@ -576,6 +577,11 @@ PlatformBootManagerAfterConsole (
PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
);
+ Status = AdjustOsBootOrder ();
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status));
+ }
+
HandleBmcBootType ();
}
diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
index 7b151a9..a6d597d 100644
--- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -49,6 +49,7 @@
DevicePathLib
DxeServicesLib
MemoryAllocationLib
+ OsBootLib
PcdLib
PrintLib
UefiBootManagerLib
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (12 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib Ming Huang
@ 2018-01-18 15:01 ` Ming Huang
2018-01-20 11:11 ` Ard Biesheuvel
2018-01-23 10:18 ` Leif Lindholm
2018-01-22 13:26 ` [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Leif Lindholm
2018-01-23 14:24 ` Leif Lindholm
15 siblings, 2 replies; 72+ messages in thread
From: Ming Huang @ 2018-01-18 15:01 UTC (permalink / raw)
To: leif.lindholm, linaro-uefi, edk2-devel, graeme.gregory
Cc: ard.biesheuvel, guoheyi, wanghuiqiang, huangming23, zhangjinsong2,
mengfanrong, waip23, Heyi Guo
Replace the old string with short one. The old one is
too long that can not be show integrallty in Setup nemu.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
Platform/Hisilicon/D03/D03.dsc | 2 +-
Platform/Hisilicon/D05/D05.dsc | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
index 6f1164e..b6b8086 100644
--- a/Platform/Hisilicon/D03/D03.dsc
+++ b/Platform/Hisilicon/D03/D03.dsc
@@ -171,7 +171,7 @@
!ifdef $(FIRMWARE_VER)
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
!else
- gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D03"
!endif
gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
index 52ffad5..a599c08 100644
--- a/Platform/Hisilicon/D05/D05.dsc
+++ b/Platform/Hisilicon/D05/D05.dsc
@@ -190,7 +190,7 @@
!ifdef $(FIRMWARE_VER)
gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
!else
- gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release"
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D05"
!endif
gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
--
1.9.1
^ permalink raw reply related [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
@ 2018-01-20 10:16 ` Ard Biesheuvel
2018-01-22 9:16 ` Huangming (Mark)
2018-01-23 6:00 ` Huangming (Mark)
2018-01-22 13:53 ` Leif Lindholm
2018-01-23 21:29 ` Jeremy Linton
2 siblings, 2 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 10:16 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 1 +
> Platform/Hisilicon/D05/D05.fdf | 1 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
> 7 files changed, 677 insertions(+), 27 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 77a89fd..710339c 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -506,6 +506,7 @@
> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>
> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>
> #
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 78ab0c8..97de4d2 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>
> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>
> #
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> index 808219a..f1927e8 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> @@ -19,6 +19,7 @@
>
> #ifndef _HI1610_PLATFORM_H_
> #define _HI1610_PLATFORM_H_
> +#include <IndustryStandard/Acpi.h>
>
Empty line before ^^^ please
> //
> // ACPI table information used to initialize tables.
> @@ -44,5 +45,31 @@
> }
>
> #define HI1616_WATCHDOG_COUNT 2
> +#define HI1616_GIC_STRUCTURE_COUNT 64
> +
> +#define HI1616_MPID_TA_BASE 0x10000
> +#define HI1616_MPID_TB_BASE 0x30000
> +#define HI1616_MPID_TA_2_BASE 0x50000
> +#define HI1616_MPID_TB_2_BASE 0x70000
> +
> +// Differs from Juno, we have another affinity level beyond cluster and core
> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +typedef struct {
> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> +
> +#pragma pack ()
>
> #endif
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> index 169ee72..33dca03 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> @@ -1,9 +1,9 @@
> /** @file
> * Multiple APIC Description Table (MADT)
> *
> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
Please don't touch the copyright statements belonging to other companies
> *
> * This program and the accompanying materials
> *
> @@ -19,34 +19,11 @@
> *
> **/
>
> -
> -#include <IndustryStandard/Acpi.h>
> +#include "Hi1616Platform.h"
> #include <Library/AcpiLib.h>
> #include <Library/AcpiNextLib.h>
> #include <Library/ArmLib.h>
> #include <Library/PcdLib.h>
> -#include "Hi1616Platform.h"
> -
> -// Differs from Juno, we have another affinity level beyond cluster and core
> -// 0x20000 is only for socket 0
> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
> -
> -//
> -// Multiple APIC Description Table
> -//
> -#pragma pack (1)
> -
> -typedef struct {
> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> -
> -#pragma pack ()
>
> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> {
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> new file mode 100644
> index 0000000..eac4736
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> @@ -0,0 +1,447 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> +*
> +**/
> +
> +#include "Pptt.h"
> +
> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
> +
> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
> + ARM_ACPI_HEADER (
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
> + EFI_ACPI_DESCRIPTION_HEADER,
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
> + );
> +
> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
> +{
> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
> +};
> +
> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
> +{
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
> +};
> +
Please make all of these STATIC ^^^
And functions below as well
> +EFI_STATUS
> +InitCacheInfo(
> + )
> +{
> + UINT8 Index;
> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
> + CSSELR_DATA CsselrData;
> + CCSIDR_DATA CcsidrData;
> +
> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
> + CsselrData.Data = 0;
> + CcsidrData.Data = 0;
> + Type1Attributes.Data = 0;
> +
> + if (Index == 0) { //L1I
space after //
> + CsselrData.Bits.InD = 1;
> + CsselrData.Bits.Level = 0;
> + Type1Attributes.Bits.CacheType = 1;
> + } else if (Index == 1) {
> + Type1Attributes.Bits.CacheType = 0;
> + CsselrData.Bits.Level = Index -1;
space after -
> + } else {
> + Type1Attributes.Bits.CacheType = 2;
> + CsselrData.Bits.Level = Index -1;
and here
> + }
> +
> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
> +
> + if (CcsidrData.Bits.Wa == 1) {
> + Type1Attributes.Bits.AllocateType = 1;
> + if (CcsidrData.Bits.Ra == 1) {
> + Type1Attributes.Bits.AllocateType++;
Just assign '2' here. BTW don't we have #defines for these constants?
> + }
> + }
> +
> + if (CcsidrData.Bits.Wt == 1) {
> + Type1Attributes.Bits.WritePolicy = 1;
> + }
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
> +
> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
> + mPpttCacheType1[Index].Associativity * \
> + mPpttCacheType1[Index].NumberOfSets;
> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> + PPTT_TYPE1_LINE_SIZE_VALID;
> +
> + }
> +
> + // L3
> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> + PPTT_TYPE1_LINE_SIZE_VALID;
> +
Where do you assign mPpttCacheType1[3].Size/Attributes/... ?
> + return EFI_SUCCESS;
> +}
> +
STATIC
> +EFI_STATUS
> +AddCoreTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo,
> + IN UINT32 ProcessorId
Please align like
IN VOID *PpttTable,
IN OUT VOID *PpttTableLengthRemain,
IN UINT32 Flags,
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> + UINT8 Index;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
If *PpttTableLengthRemain is a UINT32 then use a UINT32* as the
function parameter not VOID*, and drop the cast here.
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
Please cast PpttTable to UINT8* before adding to it.
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->AcpiProcessorId = ProcessorId;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
Space after sizeof
> +
> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
space after sizeof
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
STATIC
> +EFI_STATUS
> +AddClusterTable (
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
Alignment as above
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> +
> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
Use a UINT32* type for PpttTableLengthRemain
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
Use UINT8* cast for PpttTable
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> +
> + return EFI_SUCCESS;
> +}
> +
Same comments apply to AddScclTable()
> +EFI_STATUS
> +AddScclTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddSocketTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
> + UINT32 *PrivateResource;
> + UINT8 Index;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
> +
> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
The functions above look very similar. Would it be possible to merge them?
STATIC
> +VOID
> +GetApic(
> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
> +VOID *PpttTable,
> +IN UINT32 PpttTableLengthRemain,
> +IN UINT32 Index1
> +)
> +{
> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
cluster not culster
> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
> + UINT32 Parent = 0;
> + UINT32 Flags = 0;
> + UINT32 ResourceNo = 0;
Empty line
> + //Get APIC data
Space after //
> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
> + SocketOffset = 0;
> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
> + ScclOffset = 0;
> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
> + ClusterOffset = 0;
> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
> +
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
> +
> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
> + //This processor is unusable
Space after //
> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
> + return;
> + }
> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
> + //This processor is unusable
and here
> + Index1++;
> + continue;
> + }
> +
> + if (SocketOffset == 0) {
> + //Add socket0 for type0 table
and here, plus indentation
> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + Parent = 0;
> + Flags = PPTT_TYPE0_SOCKET_FLAG;
> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> + if (ScclOffset == 0) {
> + //Add socket0die0 for type0 table
and here
> + ResourceNo = 1;
> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
No space before ;
> + Parent = SocketOffset;
> + Flags = PPTT_TYPE0_DIE_FLAG;
> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> + if (ClusterOffset == 0) {
> + //Add socket0die0ClusterId for type0 table
Space after // and indentation
> + ResourceNo = 1;
> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> + Parent = ScclOffset;
> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> +
> + //Add socket0die0ClusterIdCoreId for type0 table
and here
> + ResourceNo = 2;
> + Parent = ClusterOffset;
> + Flags = PPTT_TYPE0_CORE_FLAG;
> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
> +
> + Index1++;
> + }
> + }
> + }
> + }
> + return ;
> +}
> +
STATIC
> +VOID
> +PpttSetAcpiTable(
> + IN EFI_EVENT Event,
> + IN VOID *Context
> + )
> +{
> + UINTN AcpiTableHandle;
> + EFI_STATUS Status;
> + UINT8 Checksum;
> + EFI_ACPI_SDT_HEADER *Table;
> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
> + EFI_ACPI_TABLE_VERSION TableVersion;
> + VOID *PpttTable;
> + UINTN TableKey;
> + UINT32 Index0, Index1;
> + UINT32 PpttTableLengthRemain = 0;
> +
> + gBS->CloseEvent (Event);
> +
> + InitCacheInfo ();
> +
> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
> +
> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
> + if (EFI_ERROR (Status)) {
> + break;
> + }
> + //Find APIC table
Space after //
> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
> + continue;
> + }
> +
> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
> + Index1 = 0;
> +
> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
> + break;
> + }
> +
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
Does it make sense to proceed here?
> + }
> +
> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
No () around PpttTable
Line length (please check throughout)
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
Space before =
> +
> + AcpiTableHandle = 0;
> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
> +
Line length?
> + FreePool (PpttTable);
> + return ;
> +}
> +
STATIC
> +EFI_STATUS
> +InitPpttTable(
Space before (
Missing VOID
> + )
> +{
> + EFI_STATUS Status;
> + EFI_EVENT ReadyToBootEvent;
> +
> + Status = EfiCreateEventReadyToBootEx (
> + TPL_NOTIFY,
> + PpttSetAcpiTable,
> + NULL,
> + &ReadyToBootEvent
> + );
Indentation
Also, can you just move this call to EfiCreateEventReadyToBootEx()
into the function below?
> + ASSERT_EFI_ERROR (Status);
> +
> + return Status;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +PpttEntryPoint(
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
Space between VOID and **
Line length
> + if (EFI_ERROR (Status)) {
> + return EFI_ABORTED;
> + }
> +
> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
No space after (VOID **)
Also, you have a DEPEX on both protocols, so it is sufficient to use
ASSERT_EFI_ERROR() here
> + if (EFI_ERROR (Status)) {
> + return EFI_ABORTED;
> + }
> +
> + InitPpttTable ();
> +
> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> new file mode 100644
> index 0000000..5dc635f
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> @@ -0,0 +1,142 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> +*
> +**/
> +
> +#ifndef _PPTT_H_
> +#define _PPTT_H_
> +
> +#include <IndustryStandard/Acpi.h>
> +#include <Library/ArmLib/ArmLibPrivate.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Protocol/AcpiSystemDescriptionTable.h>
> +#include <Protocol/AcpiTable.h>
> +#include "../D05AcpiTables/Hi1616Platform.h"
> +
> +///
> +/// "PPTT" Processor Properties Topology Table
> +///
> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
> +#define EFI_ACPI_MAX_NUM_TABLES 20
> +
> +#define PPTT_TABLE_MAX_LEN 0x6000
> +#define PPTT_SOCKET_NO 0x2
> +#define PPTT_DIE_NO 0x2
> +#define PPTT_CULSTER_NO 0x4
> +#define PPTT_CORE_NO 0x4
> +#define PPTT_SOCKET_COMPONENT_NO 0x1
> +#define PPTT_CACHE_NO 0x4
> +
> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
> +#define PPTT_TYPE0_CLUSTER_FLAG 0
> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
> +
> +#define PPTT_TYPE1_SIZE_VALID BIT0
> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
> +
> +typedef union {
> + struct {
> + UINT32 InD :1;
> + UINT32 Level :3;
> + UINT32 Reserved :28;
> + } Bits;
> + UINT32 Data;
> +}CSSELR_DATA;
Space after }
> +
> +typedef union {
> + struct {
> + UINT32 LineSize :3;
> + UINT32 Associativity :10;
> + UINT32 NumSets :15;
> + UINT32 Wa :1;
> + UINT32 Ra :1;
> + UINT32 Wb :1;
> + UINT32 Wt :1;
> + } Bits;
> + UINT32 Data;
> +}CCSIDR_DATA;
and here
> +
> +//
> +// Processor Hierarchy Node Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 Flags;
> + UINT32 Parent;
> + UINT32 AcpiProcessorId;
> + UINT32 PrivateResourceNo;
> +} EFI_ACPI_6_2_PPTT_TYPE0;
> +
> +//
> +// Cache Configuration
> +//
> +typedef union {
> + struct {
> + UINT8 AllocateType :2;
> + UINT8 CacheType :2;
> + UINT8 WritePolicy :1;
> + UINT8 Reserved :3;
> + } Bits;
> + UINT8 Data;
> +}PPTT_TYPE1_ATTRIBUTES;
and here
> +
> +//
> +// Cache Type Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 Flags;
> + UINT32 NextLevelOfCache;
> + UINT32 Size;
> + UINT32 NumberOfSets;
> + UINT8 Associativity;
> + UINT8 Attributes;
> + UINT16 LineSize;
> +} EFI_ACPI_6_2_PPTT_TYPE1;
> +
> +//
> +// ID Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 VendorId;
> + UINT64 Level1Id;
> + UINT64 Level2Id;
> + UINT16 MajorRev;
> + UINT16 MinorRev;
> + UINT16 SpinRev;
> +} EFI_ACPI_6_2_PPTT_TYPE2;
> +
> +#endif // _PPTT_H_
> +
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> new file mode 100644
> index 0000000..ce26b97
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> @@ -0,0 +1,55 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
You should probably update these now
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> +*
> +**/
> +
> +[Defines]
> + INF_VERSION = 0x00010005
0x0000001A
> + BASE_NAME = AcpiPptt
> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = PpttEntryPoint
> +
> +[Sources.common]
> + Pptt.c
> + Pptt.h
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
> + ArmPkg/ArmPkg.dec
> +
> +[LibraryClasses]
> + ArmLib
> + HobLib
> + UefiRuntimeServicesTableLib
> + UefiDriverEntryPoint
> + BaseMemoryLib
> + DebugLib
> +
> +[Guids]
> +
Please remove empty sections
> +
> +[Protocols]
> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> + gEfiAcpiSdtProtocolGuid
Please use the annotation consistently:
use ## not #
annotate all protocols
> +
> +[Pcd]
> +
> +
> +[Depex]
> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
> +
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver
2018-01-18 15:01 ` [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver Ming Huang
@ 2018-01-20 10:27 ` Ard Biesheuvel
2018-01-22 18:38 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 10:27 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> ---
> Platform/Hisilicon/D03/D03.dsc | 24 +
> Platform/Hisilicon/D03/D03.fdf | 7 +
> Platform/Hisilicon/D05/D05.dsc | 27 +-
> Platform/Hisilicon/D05/D05.fdf | 7 +
> Silicon/Hisilicon/Hisilicon.dsc.inc | 1 +
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 588 +++++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 89 +++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
> 9 files changed, 1481 insertions(+), 2 deletions(-)
>
Very nice! I am glad you are switching to generic BDS
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index b434f68..f7efff5 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -28,6 +28,7 @@
> BUILD_TARGETS = DEBUG|RELEASE
> SKUID_IDENTIFIER = DEFAULT
> FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> + DEFINE GENERIC_BDS = TRUE
>
What is the reason you are keeping the old BDS?
> !include Silicon/Hisilicon/Hisilicon.dsc.inc
>
> @@ -68,6 +69,14 @@
> CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> +!if $(GENERIC_BDS) == TRUE
> + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> +!endif
> CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
>
> # USB Requirements
> @@ -188,6 +197,9 @@
>
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
> gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
> +!if $(GENERIC_BDS) == TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
> +!endif
>
> gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
> gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
> @@ -405,6 +417,14 @@
> MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Application/UiApp/UiApp.inf {
> + <LibraryClasses>
> + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
> + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
> + }
> +!endif
> MdeModulePkg/Application/HelloWorld/HelloWorld.inf
> #
> # Bds
> @@ -457,7 +477,11 @@
>
> MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
>
> #
> # UEFI application (Shell Embedded Boot Loader)
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index 0b38eb4..0d704b5 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -283,6 +283,9 @@ READ_LOCK_STATUS = TRUE
> INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> !endif #$(INCLUDE_TFTP_COMMAND)
>
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Application/UiApp/UiApp.inf
> +!endif
> #
> # Bds
> #
> @@ -291,7 +294,11 @@ READ_LOCK_STATUS = TRUE
> INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
> INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
>
> [FV.FVMAIN_COMPACT]
> FvAlignment = 16
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 710339c..57370dc 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -31,7 +31,7 @@
> DEFINE EDK2_SKIP_PEICORE=0
> DEFINE NETWORK_IP6_ENABLE = FALSE
> DEFINE HTTP_BOOT_ENABLE = FALSE
> -
> + DEFINE GENERIC_BDS = TRUE
> !include Silicon/Hisilicon/Hisilicon.dsc.inc
>
> [LibraryClasses.common]
> @@ -84,6 +84,14 @@
> CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> +!if $(GENERIC_BDS) == TRUE
> + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> +!endif
> CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
>
> # USB Requirements
> @@ -119,6 +127,7 @@
> # It could be set FALSE to save size.
> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
>
> [PcdsFixedAtBuild.common]
> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
> @@ -203,7 +212,9 @@
>
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
> gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
> -
> +!if $(GENERIC_BDS) == TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
> +!endif
> gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
> gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
>
> @@ -560,6 +571,14 @@
> MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Application/UiApp/UiApp.inf {
> + <LibraryClasses>
> + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
> + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
> + }
> +!endif
> #
> # Bds
> #
> @@ -610,7 +629,11 @@
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
> MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
> #
> # UEFI application (Shell Embedded Boot Loader)
> #
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 97de4d2..d209210 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -305,6 +305,9 @@ READ_LOCK_STATUS = TRUE
> INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> !endif #$(INCLUDE_TFTP_COMMAND)
>
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Application/UiApp/UiApp.inf
> +!endif
> #
> # Bds
> #
> @@ -313,7 +316,11 @@ READ_LOCK_STATUS = TRUE
> INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
> INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
>
> [FV.FVMAIN_COMPACT]
> FvAlignment = 16
> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
> index cc23673..308064b 100644
> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
> @@ -263,6 +263,7 @@
> gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
> gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
> gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
> + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
>
> # DEBUG_ASSERT_ENABLED 0x01
> # DEBUG_PRINT_ENABLED 0x02
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> new file mode 100644
> index 0000000..5d8d58e
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -0,0 +1,588 @@
> +/** @file
> + Implementation for PlatformBootManagerLib library class interfaces.
> +
> + Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
> +
> + This program and the accompanying materials are licensed and made available
> + under the terms and conditions of the BSD License which accompanies this
> + distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <IndustryStandard/Pci22.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/UefiBootManagerLib.h>
> +#include <Library/UefiLib.h>
> +#include <Protocol/DevicePath.h>
> +#include <Protocol/EsrtManagement.h>
> +#include <Protocol/GenericMemoryTest.h>
> +#include <Protocol/GraphicsOutput.h>
> +#include <Protocol/LoadedImage.h>
> +#include <Protocol/PciIo.h>
> +#include <Protocol/PciRootBridgeIo.h>
> +#include <Guid/EventGroup.h>
> +#include <Guid/TtyTerm.h>
> +
> +#include "PlatformBm.h"
> +
> +#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
> +
> +
> +#pragma pack (1)
> +typedef struct {
> + VENDOR_DEVICE_PATH SerialDxe;
> + UART_DEVICE_PATH Uart;
> + VENDOR_DEFINED_DEVICE_PATH TermType;
> + EFI_DEVICE_PATH_PROTOCOL End;
> +} PLATFORM_SERIAL_CONSOLE;
> +#pragma pack ()
> +
> +#define SERIAL_DXE_FILE_GUID { \
> + 0xD3987D4B, 0x971A, 0x435F, \
> + { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
> + }
> +
> +EFI_GUID EblAppGuid2 = {0x3CEF354A,0x3B7A,0x4519,{0xAD,0x70,0x72,0xA1,0x34,0x69,0x83,0x11}};
> +
> +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
> + //
> + // VENDOR_DEVICE_PATH SerialDxe
> + //
> + {
> + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
> + SERIAL_DXE_FILE_GUID
> + },
> +
> + //
> + // UART_DEVICE_PATH Uart
> + //
> + {
> + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
> + 0, // Reserved
> + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
> + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
> + FixedPcdGet8 (PcdUartDefaultParity), // Parity
> + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
> + },
> +
> + //
> + // VENDOR_DEFINED_DEVICE_PATH TermType
> + //
> + {
> + {
> + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
> + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
> + }
> + //
> + // Guid to be filled in dynamically
> + //
> + },
> +
> + //
> + // EFI_DEVICE_PATH_PROTOCOL End
> + //
> + {
> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
> + }
> +};
> +
> +
> +#pragma pack (1)
> +typedef struct {
> + USB_CLASS_DEVICE_PATH Keyboard;
> + EFI_DEVICE_PATH_PROTOCOL End;
> +} PLATFORM_USB_KEYBOARD;
> +#pragma pack ()
> +
> +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
> + //
> + // USB_CLASS_DEVICE_PATH Keyboard
> + //
> + {
> + {
> + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
> + DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
> + },
> + 0xFFFF, // VendorId: any
> + 0xFFFF, // ProductId: any
> + 3, // DeviceClass: HID
> + 1, // DeviceSubClass: boot
> + 1 // DeviceProtocol: keyboard
> + },
> +
> + //
> + // EFI_DEVICE_PATH_PROTOCOL End
> + //
> + {
> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
> + }
> +};
> +
> +
> +/**
> + Check if the handle satisfies a particular condition.
> +
> + @param[in] Handle The handle to check.
> + @param[in] ReportText A caller-allocated string passed in for reporting
> + purposes. It must never be NULL.
> +
> + @retval TRUE The condition is satisfied.
> + @retval FALSE Otherwise. This includes the case when the condition could not
> + be fully evaluated due to an error.
> +**/
> +typedef
> +BOOLEAN
> +(EFIAPI *FILTER_FUNCTION) (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + );
> +
> +
> +/**
> + Process a handle.
> +
> + @param[in] Handle The handle to process.
> + @param[in] ReportText A caller-allocated string passed in for reporting
> + purposes. It must never be NULL.
> +**/
> +typedef
> +VOID
> +(EFIAPI *CALLBACK_FUNCTION) (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + );
> +
> +/**
> + Locate all handles that carry the specified protocol, filter them with a
> + callback function, and pass each handle that passes the filter to another
> + callback.
> +
> + @param[in] ProtocolGuid The protocol to look for.
> +
> + @param[in] Filter The filter function to pass each handle to. If this
> + parameter is NULL, then all handles are processed.
> +
> + @param[in] Process The callback function to pass each handle to that
> + clears the filter.
> +**/
> +STATIC
> +VOID
> +FilterAndProcess (
> + IN EFI_GUID *ProtocolGuid,
> + IN FILTER_FUNCTION Filter OPTIONAL,
> + IN CALLBACK_FUNCTION Process
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE *Handles;
> + UINTN NoHandles;
> + UINTN Idx;
> +
> + Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
> + NULL /* SearchKey */, &NoHandles, &Handles);
> + if (EFI_ERROR (Status)) {
> + //
> + // This is not an error, just an informative condition.
> + //
> + DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
> + Status));
> + return;
> + }
> +
> + ASSERT (NoHandles > 0);
> + for (Idx = 0; Idx < NoHandles; ++Idx) {
> + CHAR16 *DevicePathText;
> + STATIC CHAR16 Fallback[] = L"<device path unavailable>";
> +
> + //
> + // The ConvertDevicePathToText() function handles NULL input transparently.
> + //
> + DevicePathText = ConvertDevicePathToText (
> + DevicePathFromHandle (Handles[Idx]),
> + FALSE, // DisplayOnly
> + FALSE // AllowShortcuts
> + );
> + if (DevicePathText == NULL) {
> + DevicePathText = Fallback;
> + }
> +
> + if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
> + Process (Handles[Idx], DevicePathText);
> + }
> +
> + if (DevicePathText != Fallback) {
> + FreePool (DevicePathText);
> + }
> + }
> + gBS->FreePool (Handles);
> +}
> +
> +
> +/**
> + This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
> +**/
> +STATIC
> +BOOLEAN
> +EFIAPI
> +IsPciDisplay (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + )
> +{
> + EFI_STATUS Status;
> + EFI_PCI_IO_PROTOCOL *PciIo;
> + PCI_TYPE00 Pci;
> +
> + Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
> + (VOID**)&PciIo);
> + if (EFI_ERROR (Status)) {
> + //
> + // This is not an error worth reporting.
> + //
> + return FALSE;
> + }
> +
> + Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
> + sizeof Pci / sizeof (UINT32), &Pci);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
> + return FALSE;
> + }
> +
> + return IS_PCI_DISPLAY (&Pci);
> +}
> +
> +
> +/**
> + This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
> + the matching driver to produce all first-level child handles.
> +**/
> +STATIC
> +VOID
> +EFIAPI
> +Connect (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->ConnectController (
> + Handle, // ControllerHandle
> + NULL, // DriverImageHandle
> + NULL, // RemainingDevicePath -- produce all children
> + FALSE // Recursive
> + );
> + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n",
> + __FUNCTION__, ReportText, Status));
> +}
> +
> +
> +/**
> + This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
> + handle, and adds it to ConOut and ErrOut.
> +**/
> +STATIC
> +VOID
> +EFIAPI
> +AddOutput (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + )
> +{
> + EFI_STATUS Status;
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> +
> + DevicePath = DevicePathFromHandle (Handle);
> + if (DevicePath == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n",
> + __FUNCTION__, ReportText, Handle));
> + return;
> + }
> +
> + Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
> + ReportText, Status));
> + return;
> + }
> +
> + Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
> + ReportText, Status));
> + return;
> + }
> +
> + DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
> + ReportText));
> +}
> +
> +STATIC
> +VOID
> +PlatformRegisterFvBootOption (
> + EFI_GUID *FileGuid,
> + CHAR16 *Description,
> + UINT32 Attributes
> + )
> +{
> + EFI_STATUS Status;
> + INTN OptionIndex;
> + EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
> + UINTN BootOptionCount;
> + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
> + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> +
> + Status = gBS->HandleProtocol (
> + gImageHandle,
> + &gEfiLoadedImageProtocolGuid,
> + (VOID **) &LoadedImage
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
> + DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
> + ASSERT (DevicePath != NULL);
> + DevicePath = AppendDevicePathNode (
> + DevicePath,
> + (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
> + );
> + ASSERT (DevicePath != NULL);
> +
> + Status = EfiBootManagerInitializeLoadOption (
> + &NewOption,
> + LoadOptionNumberUnassigned,
> + LoadOptionTypeBoot,
> + Attributes,
> + Description,
> + DevicePath,
> + NULL,
> + 0
> + );
> + ASSERT_EFI_ERROR (Status);
> + FreePool (DevicePath);
> +
> + BootOptions = EfiBootManagerGetLoadOptions (
> + &BootOptionCount, LoadOptionTypeBoot
> + );
> +
> + OptionIndex = EfiBootManagerFindLoadOption (
> + &NewOption, BootOptions, BootOptionCount
> + );
> +
> + if (OptionIndex == -1) {
> + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
> + ASSERT_EFI_ERROR (Status);
> + }
> + EfiBootManagerFreeLoadOption (&NewOption);
> + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
> +}
> +
> +
> +STATIC
> +VOID
> +PlatformRegisterOptionsAndKeys (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + EFI_INPUT_KEY Enter;
> + EFI_INPUT_KEY F2;
> + EFI_INPUT_KEY Esc;
> + EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
> +
> + //
> + // Register ENTER as CONTINUE key
> + //
> + Enter.ScanCode = SCAN_NULL;
> + Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
> + Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
> + ASSERT_EFI_ERROR (Status);
> +
> + //
> + // Map F2 and ESC to Boot Manager Menu
> + //
> + F2.ScanCode = SCAN_F2;
> + F2.UnicodeChar = CHAR_NULL;
> + Esc.ScanCode = SCAN_ESC;
> + Esc.UnicodeChar = CHAR_NULL;
> +
> + Status = EfiBootManagerGetBootManagerMenu (&BootOption);
> + ASSERT_EFI_ERROR (Status);
> + Status = EfiBootManagerAddKeyOptionVariable (
> + NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
> + );
> + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
> + Status = EfiBootManagerAddKeyOptionVariable (
> + NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
> + );
> + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
> +}
> +
STATIC
> +VOID
> +UpdateMemory (
> + )
> +{
> + EFI_STATUS Status;
> + EFI_GENERIC_MEMORY_TEST_PROTOCOL* MemoryTest;
> + BOOLEAN RequireSoftECCInit = FALSE;
> +
No initializers please, use assignments
> + //Add MemoryTest for memmap add above 4G memory.
Space after //
> + Status = gBS->LocateProtocol (&gEfiGenericMemTestProtocolGuid, NULL, (VOID**)&MemoryTest);
> + if (!EFI_ERROR (Status)) {
> + (VOID)MemoryTest->MemoryTestInit (MemoryTest, IGNORE, &RequireSoftECCInit);
Why the VOID cast?
> + } else {
> + DEBUG ((DEBUG_ERROR, "LocateProtocol for GenericMemTestProtocol fail(%r)\n", Status));
> + }
> +
Check line length
> + return;
> +}
> +
> +//
> +// BDS Platform Functions
> +//
> +/**
> + Do the platform init, can be customized by OEM/IBV
> + Possible things that can be done in PlatformBootManagerBeforeConsole:
> + > Update console variable: 1. include hot-plug devices;
> + > 2. Clear ConIn and add SOL for AMT
> + > Register new Driver#### or Boot####
> + > Register new Key####: e.g.: F12
> + > Signal ReadyToLock event
> + > Authentication action: 1. connect Auth devices;
> + > 2. Identify auto logon user.
> +**/
> +VOID
> +EFIAPI
> +PlatformBootManagerBeforeConsole (
> + VOID
> + )
> +{
> + //
> + // Signal EndOfDxe PI Event
> + //
> + EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
> +
You need to call EsrtManagement->SyncEsrtFmp () here as well, not only
in PlatformBootManagerAfterConsole
> + UpdateMemory ();
> +
> + //
> + // Locate the PCI root bridges and make the PCI bus driver connect each,
> + // non-recursively. This will produce a number of child handles with PciIo on
> + // them.
> + //
> + FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
> +
> + //
> + // Find all display class PCI devices (using the handles from the previous
> + // step), and connect them non-recursively. This should produce a number of
> + // child handles with GOPs on them.
> + //
> + FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
> +
> + //
> + // Now add the device path of all handles with GOP on them to ConOut and
> + // ErrOut.
> + //
> + FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
> +
> + //
> + // Add the hardcoded short-form USB keyboard device path to ConIn.
> + //
> + EfiBootManagerUpdateConsoleVariable (ConIn,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
> +
> + //
> + // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
> + //
> + ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4);
> + CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
> +
> + EfiBootManagerUpdateConsoleVariable (ConIn,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
> + EfiBootManagerUpdateConsoleVariable (ConOut,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
> + EfiBootManagerUpdateConsoleVariable (ErrOut,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
> +
> + //
> + // Register platform-specific boot options and keyboard shortcuts.
> + //
> + PlatformRegisterOptionsAndKeys ();
> +}
> +
> +/**
> + Do the platform specific action after the console is ready
> + Possible things that can be done in PlatformBootManagerAfterConsole:
> + > Console post action:
> + > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
> + > Signal console ready platform customized event
> + > Run diagnostics like memory testing
> + > Connect certain devices
> + > Dispatch aditional option roms
> + > Special boot: e.g.: USB boot, enter UI
> +**/
> +VOID
> +EFIAPI
> +PlatformBootManagerAfterConsole (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + ESRT_MANAGEMENT_PROTOCOL *EsrtManagement = NULL;
> +
> + //
> + // Show the splash screen.
> + //
> + EnableQuietBoot (PcdGetPtr (PcdLogoFile));
> +
Please use BootLogoLib from MdeModulePkg, and drop the
IntelFrameworkModulePkg dependency
> + //
> + // Connect the rest of the devices.
> + //
> + EfiBootManagerConnectAll ();
> +
> + //
> + // Enumerate all possible boot options.
> + //
> + EfiBootManagerRefreshAllBootOption ();
> +
> + //
> + //Sync Esrt Table
> + //
Space after //
> + Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL, (VOID **)&EsrtManagement);
Line length
> + if (!EFI_ERROR (Status)) {
> + Status = EsrtManagement->SyncEsrtFmp ();
> + }
> +
> + //
> + // Register UEFI Shell
> + //
> + PlatformRegisterFvBootOption (
> + PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
> + );
> +}
> +
> +/**
> + This function is called each second during the boot manager waits the
> + timeout.
> +
> + @param TimeoutRemain The remaining timeout.
> +**/
> +VOID
> +EFIAPI
> +PlatformBootManagerWaitCallback (
> + UINT16 TimeoutRemain
> + )
> +{
> + Print(L"\r%-2d seconds left, Press Esc or F2 to enter Setup.", TimeoutRemain);
> +}
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
> new file mode 100644
> index 0000000..0a3c626
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
> @@ -0,0 +1,59 @@
> +/** @file
> + Head file for BDS Platform specific code
> +
> + Copyright (C) 2015-2016, Red Hat, Inc.
> + Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
> +
> + This program and the accompanying materials are licensed and made available
> + under the terms and conditions of the BSD License which accompanies this
> + distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _PLATFORM_BM_H_
> +#define _PLATFORM_BM_H_
> +
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/UefiRuntimeServicesTableLib.h>
> +
> +/**
> + Use SystemTable Conout to stop video based Simple Text Out consoles from
> + going to the video device. Put up LogoFile on every video device that is a
> + console.
> +
> + @param[in] LogoFile File name of logo to display on the center of the
> + screen.
> +
> + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo
> + displayed.
> + @retval EFI_UNSUPPORTED Logo not found
> +**/
> +EFI_STATUS
> +EnableQuietBoot (
> + IN EFI_GUID *LogoFile
> + );
> +
> +/**
> + Use SystemTable Conout to turn on video based Simple Text Out consoles. The
> + Simple Text Out screens will now be synced up with all non video output
> + devices
> +
> + @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
> +**/
> +EFI_STATUS
> +DisableQuietBoot (
> + VOID
> + );
> +
> +#endif // _PLATFORM_BM_H_
Please don't reuse this, use BootLogoLib instead.
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> new file mode 100644
> index 0000000..ae274f3
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> @@ -0,0 +1,89 @@
> +## @file
> +# Implementation for PlatformBootManagerLib library class interfaces.
> +#
> +# Copyright (C) 2015-2016, Red Hat, Inc.
> +# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> +# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
> +#
> +# This program and the accompanying materials are licensed and made available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010005
0x0000001A
> + BASE_NAME = PlatformBootManagerLib
> + FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
Don't reuse GUIDs, create your own
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
> +
> +#
> +# The following information is for reference only and not required by the build tools.
> +#
> +# VALID_ARCHITECTURES = ARM AARCH64
> +#
> +
> +[Sources]
> + PlatformBm.c
> + QuietBoot.c
> +
> +[Packages]
> + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
Please drop this reference
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + DevicePathLib
> + DxeServicesLib
> + MemoryAllocationLib
> + PcdLib
> + PrintLib
> + UefiBootManagerLib
> + UefiBootServicesTableLib
> + UefiLib
> +
> +[FeaturePcd]
> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable
Please drop this reference
> + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
> +
> +[FixedPcd]
> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile
> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile
and these 2
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
> + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
> +
> +[Pcd]
> + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
> +
> +[Guids]
> + gEfiFileInfoGuid
> + gEfiFileSystemInfoGuid
> + gEfiFileSystemVolumeLabelInfoIdGuid
> + gEfiEndOfDxeEventGroupGuid
> + gEfiTtyTermGuid
> +
> +[Protocols]
> + gEfiDevicePathProtocolGuid
> + gEfiFirmwareVolume2ProtocolGuid
> + gEfiGenericMemTestProtocolGuid
> + gEfiGraphicsOutputProtocolGuid
> + gEfiLoadedImageProtocolGuid
> + gEfiOEMBadgingProtocolGuid
> + gEfiPciRootBridgeIoProtocolGuid
> + gEfiSimpleFileSystemProtocolGuid
> + gEsrtManagementProtocolGuid
Does your code really use all of these?
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
Please don't copy this file, use BootLogoLib instead
> new file mode 100644
> index 0000000..0bd15da
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
> @@ -0,0 +1,681 @@
> +/** @file
> +Platform BDS function for quiet boot support.
> +
> +Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
> +Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
> +This program and the accompanying materials
> +are licensed and made available under the terms and conditions of the BSD License
> +which accompanies this distribution. The full text of the license may be found at
> +http://opensource.org/licenses/bsd-license.php
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <IndustryStandard/Bmp.h>
> +#include <Library/DxeServicesLib.h>
> +#include <Protocol/BootLogo.h>
> +#include <Protocol/OEMBadging.h>
> +#include <Protocol/UgaDraw.h>
> +
> +#include "PlatformBm.h"
> +
> +/**
> + Convert a *.BMP graphics image to a GOP blt buffer. If a NULL Blt buffer
> + is passed in a GopBlt buffer will be allocated by this routine. If a GopBlt
> + buffer is passed in it will be used if it is big enough.
> +
> + @param BmpImage Pointer to BMP file
> + @param BmpImageSize Number of bytes in BmpImage
> + @param GopBlt Buffer containing GOP version of BmpImage.
> + @param GopBltSize Size of GopBlt in bytes.
> + @param PixelHeight Height of GopBlt/BmpImage in pixels
> + @param PixelWidth Width of GopBlt/BmpImage in pixels
> +
> + @retval EFI_SUCCESS GopBlt and GopBltSize are returned.
> + @retval EFI_UNSUPPORTED BmpImage is not a valid *.BMP image
> + @retval EFI_BUFFER_TOO_SMALL The passed in GopBlt buffer is not big enough.
> + GopBltSize will contain the required size.
> + @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate.
> +
> +**/
> +STATIC
> +EFI_STATUS
> +ConvertBmpToGopBlt (
> + IN VOID *BmpImage,
> + IN UINTN BmpImageSize,
> + IN OUT VOID **GopBlt,
> + IN OUT UINTN *GopBltSize,
> + OUT UINTN *PixelHeight,
> + OUT UINTN *PixelWidth
> + )
> +{
> + UINT8 *Image;
> + UINT8 *ImageHeader;
> + BMP_IMAGE_HEADER *BmpHeader;
> + BMP_COLOR_MAP *BmpColorMap;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
> + UINT64 BltBufferSize;
> + UINTN Index;
> + UINTN Height;
> + UINTN Width;
> + UINTN ImageIndex;
> + UINT32 DataSizePerLine;
> + BOOLEAN IsAllocated;
> + UINT32 ColorMapNum;
> +
> + if (sizeof (BMP_IMAGE_HEADER) > BmpImageSize) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + BmpHeader = (BMP_IMAGE_HEADER *) BmpImage;
> +
> + if (BmpHeader->CharB != 'B' || BmpHeader->CharM != 'M') {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Doesn't support compress.
> + //
> + if (BmpHeader->CompressionType != 0) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Only support BITMAPINFOHEADER format.
> + // BITMAPFILEHEADER + BITMAPINFOHEADER = BMP_IMAGE_HEADER
> + //
> + if (BmpHeader->HeaderSize != sizeof (BMP_IMAGE_HEADER) - OFFSET_OF(BMP_IMAGE_HEADER, HeaderSize)) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // The data size in each line must be 4 byte alignment.
> + //
> + DataSizePerLine = ((BmpHeader->PixelWidth * BmpHeader->BitPerPixel + 31) >> 3) & (~0x3);
> + BltBufferSize = MultU64x32 (DataSizePerLine, BmpHeader->PixelHeight);
> + if (BltBufferSize > (UINT32) ~0) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if ((BmpHeader->Size != BmpImageSize) ||
> + (BmpHeader->Size < BmpHeader->ImageOffset) ||
> + (BmpHeader->Size - BmpHeader->ImageOffset != BmpHeader->PixelHeight * DataSizePerLine)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Calculate Color Map offset in the image.
> + //
> + Image = BmpImage;
> + BmpColorMap = (BMP_COLOR_MAP *) (Image + sizeof (BMP_IMAGE_HEADER));
> + if (BmpHeader->ImageOffset < sizeof (BMP_IMAGE_HEADER)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if (BmpHeader->ImageOffset > sizeof (BMP_IMAGE_HEADER)) {
> + switch (BmpHeader->BitPerPixel) {
> + case 1:
> + ColorMapNum = 2;
> + break;
> + case 4:
> + ColorMapNum = 16;
> + break;
> + case 8:
> + ColorMapNum = 256;
> + break;
> + default:
> + ColorMapNum = 0;
> + break;
> + }
> + //
> + // BMP file may has padding data between the bmp header section and the bmp data section.
> + //
> + if (BmpHeader->ImageOffset - sizeof (BMP_IMAGE_HEADER) < sizeof (BMP_COLOR_MAP) * ColorMapNum) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + //
> + // Calculate graphics image data address in the image
> + //
> + Image = ((UINT8 *) BmpImage) + BmpHeader->ImageOffset;
> + ImageHeader = Image;
> +
> + //
> + // Calculate the BltBuffer needed size.
> + //
> + BltBufferSize = MultU64x32 ((UINT64) BmpHeader->PixelWidth, BmpHeader->PixelHeight);
> + //
> + // Ensure the BltBufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
> + //
> + if (BltBufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
> + return EFI_UNSUPPORTED;
> + }
> + BltBufferSize = MultU64x32 (BltBufferSize, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
> +
> + IsAllocated = FALSE;
> + if (*GopBlt == NULL) {
> + //
> + // GopBlt is not allocated by caller.
> + //
> + *GopBltSize = (UINTN) BltBufferSize;
> + *GopBlt = AllocatePool (*GopBltSize);
> + IsAllocated = TRUE;
> + if (*GopBlt == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + } else {
> + //
> + // GopBlt has been allocated by caller.
> + //
> + if (*GopBltSize < (UINTN) BltBufferSize) {
> + *GopBltSize = (UINTN) BltBufferSize;
> + return EFI_BUFFER_TOO_SMALL;
> + }
> + }
> +
> + *PixelWidth = BmpHeader->PixelWidth;
> + *PixelHeight = BmpHeader->PixelHeight;
> +
> + //
> + // Convert image from BMP to Blt buffer format
> + //
> + BltBuffer = *GopBlt;
> + for (Height = 0; Height < BmpHeader->PixelHeight; Height++) {
> + Blt = &BltBuffer[(BmpHeader->PixelHeight - Height - 1) * BmpHeader->PixelWidth];
> + for (Width = 0; Width < BmpHeader->PixelWidth; Width++, Image++, Blt++) {
> + switch (BmpHeader->BitPerPixel) {
> + case 1:
> + //
> + // Convert 1-bit (2 colors) BMP to 24-bit color
> + //
> + for (Index = 0; Index < 8 && Width < BmpHeader->PixelWidth; Index++) {
> + Blt->Red = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Red;
> + Blt->Green = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Green;
> + Blt->Blue = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Blue;
> + Blt++;
> + Width++;
> + }
> +
> + Blt--;
> + Width--;
> + break;
> +
> + case 4:
> + //
> + // Convert 4-bit (16 colors) BMP Palette to 24-bit color
> + //
> + Index = (*Image) >> 4;
> + Blt->Red = BmpColorMap[Index].Red;
> + Blt->Green = BmpColorMap[Index].Green;
> + Blt->Blue = BmpColorMap[Index].Blue;
> + if (Width < (BmpHeader->PixelWidth - 1)) {
> + Blt++;
> + Width++;
> + Index = (*Image) & 0x0f;
> + Blt->Red = BmpColorMap[Index].Red;
> + Blt->Green = BmpColorMap[Index].Green;
> + Blt->Blue = BmpColorMap[Index].Blue;
> + }
> + break;
> +
> + case 8:
> + //
> + // Convert 8-bit (256 colors) BMP Palette to 24-bit color
> + //
> + Blt->Red = BmpColorMap[*Image].Red;
> + Blt->Green = BmpColorMap[*Image].Green;
> + Blt->Blue = BmpColorMap[*Image].Blue;
> + break;
> +
> + case 24:
> + //
> + // It is 24-bit BMP.
> + //
> + Blt->Blue = *Image++;
> + Blt->Green = *Image++;
> + Blt->Red = *Image;
> + break;
> +
> + default:
> + //
> + // Other bit format BMP is not supported.
> + //
> + if (IsAllocated) {
> + FreePool (*GopBlt);
> + *GopBlt = NULL;
> + }
> + return EFI_UNSUPPORTED;
> + };
> +
> + }
> +
> + ImageIndex = (UINTN) (Image - ImageHeader);
> + if ((ImageIndex % 4) != 0) {
> + //
> + // Bmp Image starts each row on a 32-bit boundary!
> + //
> + Image = Image + (4 - (ImageIndex % 4));
> + }
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Use SystemTable Conout to stop video based Simple Text Out consoles from going
> + to the video device. Put up LogoFile on every video device that is a console.
> +
> + @param[in] LogoFile File name of logo to display on the center of the screen.
> +
> + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed.
> + @retval EFI_UNSUPPORTED Logo not found
> +
> +**/
> +EFI_STATUS
> +EnableQuietBoot (
> + IN EFI_GUID *LogoFile
> + )
> +{
> + EFI_STATUS Status;
> + EFI_OEM_BADGING_PROTOCOL *Badging;
> + UINT32 SizeOfX;
> + UINT32 SizeOfY;
> + INTN DestX;
> + INTN DestY;
> + UINT8 *ImageData;
> + UINTN ImageSize;
> + UINTN BltSize;
> + UINT32 Instance;
> + EFI_BADGING_FORMAT Format;
> + EFI_BADGING_DISPLAY_ATTRIBUTE Attribute;
> + UINTN CoordinateX;
> + UINTN CoordinateY;
> + UINTN Height;
> + UINTN Width;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
> + EFI_UGA_DRAW_PROTOCOL *UgaDraw;
> + UINT32 ColorDepth;
> + UINT32 RefreshRate;
> + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
> + EFI_BOOT_LOGO_PROTOCOL *BootLogo;
> + UINTN NumberOfLogos;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LogoBlt;
> + UINTN LogoDestX;
> + UINTN LogoDestY;
> + UINTN LogoHeight;
> + UINTN LogoWidth;
> + UINTN NewDestX;
> + UINTN NewDestY;
> + UINTN NewHeight;
> + UINTN NewWidth;
> + UINT64 BufferSize;
> +
> + UgaDraw = NULL;
> + //
> + // Try to open GOP first
> + //
> + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutputProtocolGuid, (VOID **) &GraphicsOutput);
> + if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + GraphicsOutput = NULL;
> + //
> + // Open GOP failed, try to open UGA
> + //
> + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiUgaDrawProtocolGuid, (VOID **) &UgaDraw);
> + }
> + if (EFI_ERROR (Status)) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Try to open Boot Logo Protocol.
> + //
> + BootLogo = NULL;
> + gBS->LocateProtocol (&gEfiBootLogoProtocolGuid, NULL, (VOID **) &BootLogo);
> +
> + //
> + // Erase Cursor from screen
> + //
> + gST->ConOut->EnableCursor (gST->ConOut, FALSE);
> +
> + Badging = NULL;
> + Status = gBS->LocateProtocol (&gEfiOEMBadgingProtocolGuid, NULL, (VOID **) &Badging);
> +
> + if (GraphicsOutput != NULL) {
> + SizeOfX = GraphicsOutput->Mode->Info->HorizontalResolution;
> + SizeOfY = GraphicsOutput->Mode->Info->VerticalResolution;
> +
> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + Status = UgaDraw->GetMode (UgaDraw, &SizeOfX, &SizeOfY, &ColorDepth, &RefreshRate);
> + if (EFI_ERROR (Status)) {
> + return EFI_UNSUPPORTED;
> + }
> + } else {
> + return EFI_UNSUPPORTED;
> + }
> +
> + Blt = NULL;
> + NumberOfLogos = 0;
> + LogoDestX = 0;
> + LogoDestY = 0;
> + LogoHeight = 0;
> + LogoWidth = 0;
> + NewDestX = 0;
> + NewDestY = 0;
> + NewHeight = 0;
> + NewWidth = 0;
> + Instance = 0;
> + Height = 0;
> + Width = 0;
> + while (1) {
> + ImageData = NULL;
> + ImageSize = 0;
> +
> + if (Badging != NULL) {
> + //
> + // Get image from OEMBadging protocol.
> + //
> + Status = Badging->GetImage (
> + Badging,
> + &Instance,
> + &Format,
> + &ImageData,
> + &ImageSize,
> + &Attribute,
> + &CoordinateX,
> + &CoordinateY
> + );
> + if (EFI_ERROR (Status)) {
> + goto Done;
> + }
> +
> + //
> + // Currently only support BMP format.
> + //
> + if (Format != EfiBadgingFormatBMP) {
> + if (ImageData != NULL) {
> + FreePool (ImageData);
> + }
> + continue;
> + }
> + } else {
> + //
> + // Get the specified image from FV.
> + //
> + Status = GetSectionFromAnyFv (LogoFile, EFI_SECTION_RAW, 0, (VOID **) &ImageData, &ImageSize);
> + if (EFI_ERROR (Status)) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + CoordinateX = 0;
> + CoordinateY = 0;
> + if (!FeaturePcdGet(PcdBootlogoOnlyEnable)) {
> + Attribute = EfiBadgingDisplayAttributeCenter;
> + } else {
> + Attribute = EfiBadgingDisplayAttributeCustomized;
> + }
> + }
> +
> + if (Blt != NULL) {
> + FreePool (Blt);
> + }
> + Blt = NULL;
> + Status = ConvertBmpToGopBlt (
> + ImageData,
> + ImageSize,
> + (VOID **) &Blt,
> + &BltSize,
> + &Height,
> + &Width
> + );
> + if (EFI_ERROR (Status)) {
> + FreePool (ImageData);
> +
> + if (Badging == NULL) {
> + return Status;
> + } else {
> + continue;
> + }
> + }
> +
> + //
> + // Calculate the display position according to Attribute.
> + //
> + switch (Attribute) {
> + case EfiBadgingDisplayAttributeLeftTop:
> + DestX = CoordinateX;
> + DestY = CoordinateY;
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterTop:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = CoordinateY;
> + break;
> +
> + case EfiBadgingDisplayAttributeRightTop:
> + DestX = (SizeOfX - Width - CoordinateX);
> + DestY = CoordinateY;;
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterRight:
> + DestX = (SizeOfX - Width - CoordinateX);
> + DestY = (SizeOfY - Height) / 2;
> + break;
> +
> + case EfiBadgingDisplayAttributeRightBottom:
> + DestX = (SizeOfX - Width - CoordinateX);
> + DestY = (SizeOfY - Height - CoordinateY);
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterBottom:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = (SizeOfY - Height - CoordinateY);
> + break;
> +
> + case EfiBadgingDisplayAttributeLeftBottom:
> + DestX = CoordinateX;
> + DestY = (SizeOfY - Height - CoordinateY);
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterLeft:
> + DestX = CoordinateX;
> + DestY = (SizeOfY - Height) / 2;
> + break;
> +
> + case EfiBadgingDisplayAttributeCenter:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = (SizeOfY - Height) / 2;
> + break;
> +
> + case EfiBadgingDisplayAttributeCustomized:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = ((SizeOfY * 382) / 1000) - Height / 2;
> + break;
> +
> + default:
> + DestX = CoordinateX;
> + DestY = CoordinateY;
> + break;
> + }
> +
> + if ((DestX >= 0) && (DestY >= 0)) {
> + if (GraphicsOutput != NULL) {
> + Status = GraphicsOutput->Blt (
> + GraphicsOutput,
> + Blt,
> + EfiBltBufferToVideo,
> + 0,
> + 0,
> + (UINTN) DestX,
> + (UINTN) DestY,
> + Width,
> + Height,
> + Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
> + );
> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + Status = UgaDraw->Blt (
> + UgaDraw,
> + (EFI_UGA_PIXEL *) Blt,
> + EfiUgaBltBufferToVideo,
> + 0,
> + 0,
> + (UINTN) DestX,
> + (UINTN) DestY,
> + Width,
> + Height,
> + Width * sizeof (EFI_UGA_PIXEL)
> + );
> + } else {
> + Status = EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Report displayed Logo information.
> + //
> + if (!EFI_ERROR (Status)) {
> + NumberOfLogos++;
> +
> + if (LogoWidth == 0) {
> + //
> + // The first Logo.
> + //
> + LogoDestX = (UINTN) DestX;
> + LogoDestY = (UINTN) DestY;
> + LogoWidth = Width;
> + LogoHeight = Height;
> + } else {
> + //
> + // Merge new logo with old one.
> + //
> + NewDestX = MIN ((UINTN) DestX, LogoDestX);
> + NewDestY = MIN ((UINTN) DestY, LogoDestY);
> + NewWidth = MAX ((UINTN) DestX + Width, LogoDestX + LogoWidth) - NewDestX;
> + NewHeight = MAX ((UINTN) DestY + Height, LogoDestY + LogoHeight) - NewDestY;
> +
> + LogoDestX = NewDestX;
> + LogoDestY = NewDestY;
> + LogoWidth = NewWidth;
> + LogoHeight = NewHeight;
> + }
> + }
> + }
> +
> + FreePool (ImageData);
> +
> + if (Badging == NULL) {
> + break;
> + }
> + }
> +
> +Done:
> + if (BootLogo == NULL || NumberOfLogos == 0) {
> + //
> + // No logo displayed.
> + //
> + if (Blt != NULL) {
> + FreePool (Blt);
> + }
> +
> + return Status;
> + }
> +
> + //
> + // Advertise displayed Logo information.
> + //
> + if (NumberOfLogos == 1) {
> + //
> + // Only one logo displayed, use its Blt buffer directly for BootLogo protocol.
> + //
> + LogoBlt = Blt;
> + Status = EFI_SUCCESS;
> + } else {
> + //
> + // More than one Logo displayed, get merged BltBuffer using VideoToBuffer operation.
> + //
> + if (Blt != NULL) {
> + FreePool (Blt);
> + }
> +
> + //
> + // Ensure the LogoHeight * LogoWidth doesn't overflow
> + //
> + if (LogoHeight > DivU64x64Remainder ((UINTN) ~0, LogoWidth, NULL)) {
> + return EFI_UNSUPPORTED;
> + }
> + BufferSize = MultU64x64 (LogoWidth, LogoHeight);
> +
> + //
> + // Ensure the BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
> + //
> + if (BufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + LogoBlt = AllocateZeroPool ((UINTN)BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
> + if (LogoBlt == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + if (GraphicsOutput != NULL) {
> + Status = GraphicsOutput->Blt (
> + GraphicsOutput,
> + LogoBlt,
> + EfiBltVideoToBltBuffer,
> + LogoDestX,
> + LogoDestY,
> + 0,
> + 0,
> + LogoWidth,
> + LogoHeight,
> + LogoWidth * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
> + );
> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + Status = UgaDraw->Blt (
> + UgaDraw,
> + (EFI_UGA_PIXEL *) LogoBlt,
> + EfiUgaVideoToBltBuffer,
> + LogoDestX,
> + LogoDestY,
> + 0,
> + 0,
> + LogoWidth,
> + LogoHeight,
> + LogoWidth * sizeof (EFI_UGA_PIXEL)
> + );
> + } else {
> + Status = EFI_UNSUPPORTED;
> + }
> + }
> +
> + if (!EFI_ERROR (Status)) {
> + BootLogo->SetBootLogo (BootLogo, LogoBlt, LogoDestX, LogoDestY, LogoWidth, LogoHeight);
> + }
> + FreePool (LogoBlt);
> +
> + return Status;
> +}
> +
> +/**
> + Use SystemTable Conout to turn on video based Simple Text Out consoles. The
> + Simple Text Out screens will now be synced up with all non video output devices
> +
> + @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
> +
> +**/
> +EFI_STATUS
> +DisableQuietBoot (
> + VOID
> + )
> +{
> +
> + //
> + // Enable Cursor on Screen
> + //
> + gST->ConOut->EnableCursor (gST->ConOut, TRUE);
> + return EFI_SUCCESS;
> +}
> +
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option
2018-01-18 15:01 ` [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option Ming Huang
@ 2018-01-20 10:41 ` Ard Biesheuvel
2018-01-23 8:28 ` Huangming (Mark)
2018-01-23 10:28 ` Leif Lindholm
1 sibling, 1 reply; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 10:41 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> Modify the feature of BMC set boot option as switching generic
> BDS. Move main functions to BmcConfigBootLib.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 1 +
> Platform/Hisilicon/D05/D05.dsc | 1 +
> Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 ++
> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 ++++++++++++++++++++
> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 +++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 7 +
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 +
> Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------------
> Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +-
> 9 files changed, 548 insertions(+), 436 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index f7efff5..b2eae7d 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -70,6 +70,7 @@
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> !if $(GENERIC_BDS) == TRUE
> + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 57370dc..b89cea3 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -85,6 +85,7 @@
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> !if $(GENERIC_BDS) == TRUE
> + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> diff --git a/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
> new file mode 100644
> index 0000000..d937234
> --- /dev/null
> +++ b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
> @@ -0,0 +1,31 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef _BMC_CONFIG_BOOT_LIB_H_
> +#define _BMC_CONFIG_BOOT_LIB_H_
> +
> +VOID
> +EFIAPI
> +RestoreBootOrder (
> + VOID
> + );
> +
> +VOID
> +EFIAPI
> +HandleBmcBootType (
> + VOID
> + );
> +
> +#endif
> diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
> new file mode 100644
> index 0000000..c446f93
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
> @@ -0,0 +1,454 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +#include <Uefi.h>
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/IpmiCmdLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PrintLib.h>
> +#include <Library/UefiBootManagerLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/UefiRuntimeServicesTableLib.h>
> +#include <Guid/GlobalVariable.h>
> +#include <Protocol/DevicePathToText.h>
> +
> +GUID gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99,
> + 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} };
> +
I know you are just moving this around, but this should be defined in
HisiPkg.dec not here
> +STATIC
> +UINT16
> +GetBBSTypeFromFileSysPath (
> + IN CHAR16 *UsbPathTxt,
> + IN CHAR16 *FileSysPathTxt,
> + IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
> + )
> +{
> + EFI_DEVICE_PATH_PROTOCOL *Node;
> +
> + if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
> + Node = FileSysPath;
> + while (!IsDevicePathEnd (Node)) {
> + if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
> + (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
> + return BBS_TYPE_CDROM;
> + }
> + Node = NextDevicePathNode (Node);
> + }
> + }
> +
> + return BBS_TYPE_UNKNOWN;
> +}
> +
> +STATIC
> +UINT16
> +GetBBSTypeFromUsbPath (
> + IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE *FileSystemHandles;
> + UINTN NumberFileSystemHandles;
> + UINTN Index;
> + EFI_DEVICE_PATH_PROTOCOL *FileSysPath;
> + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText;
> + CHAR16 *UsbPathTxt;
> + CHAR16 *FileSysPathTxt;
> + UINT16 Result;
> +
> + Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText);
line length
Also, if it is an error for gEfiDevicePathToTextProtocolGuid to be
unavailable, you can add it to your DEPEX instead and just use
ASSERT_EFI_ERROR() here
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status));
> + return BBS_TYPE_UNKNOWN;
> + }
> +
> + Result = BBS_TYPE_UNKNOWN;
> + UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
> + if (UsbPathTxt == NULL) {
> + return Result;
> + }
> +
> + Status = gBS->LocateHandleBuffer (
> + ByProtocol,
> + &gEfiSimpleFileSystemProtocolGuid,
> + NULL,
> + &NumberFileSystemHandles,
> + &FileSystemHandles
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
> + FreePool (UsbPathTxt);
> + return BBS_TYPE_UNKNOWN;
> + }
> +
> + for (Index = 0; Index < NumberFileSystemHandles; Index++) {
> + FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
> + FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
> +
> + if (FileSysPathTxt == NULL) {
> + continue;
> + }
> +
> + Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
> + FreePool (FileSysPathTxt);
> +
> + if (Result != BBS_TYPE_UNKNOWN) {
> + break;
> + }
> + }
> +
> + if (NumberFileSystemHandles != 0) {
> + FreePool (FileSystemHandles);
> + }
> +
> + FreePool (UsbPathTxt);
> +
> + return Result;
> +}
> +
> +STATIC
> +UINT16
> +GetBBSTypeFromMessagingDevicePath (
> + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
> + IN EFI_DEVICE_PATH_PROTOCOL *Node
> + )
> +{
> + VENDOR_DEVICE_PATH *Vendor;
> + UINT16 Result;
> +
> + Result = BBS_TYPE_UNKNOWN;
> +
> + switch (DevicePathSubType (Node)) {
> + case MSG_MAC_ADDR_DP:
> + Result = BBS_TYPE_EMBEDDED_NETWORK;
> + break;
> +
> + case MSG_USB_DP:
> + Result = GetBBSTypeFromUsbPath (DevicePath);
> + if (Result == BBS_TYPE_UNKNOWN) {
> + Result = BBS_TYPE_USB;
Just one space after =
> + }
> + break;
> +
> + case MSG_SATA_DP:
> + Result = BBS_TYPE_HARDDRIVE;
> + break;
> +
> + case MSG_VENDOR_DP:
> + Vendor = (VENDOR_DEVICE_PATH *) (Node);
> + if ((&Vendor->Guid) != NULL) {
Remove redundant ()
> + if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
> + Result = BBS_TYPE_HARDDRIVE;
> + }
> + }
> + break;
> +
> + default:
> + Result = BBS_TYPE_UNKNOWN;
> + break;
> + }
> +
> + return Result;
> +}
> +
> +STATIC
> +UINT16
> +GetBBSTypeByDevicePath (
> + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
> + )
> +{
> + EFI_DEVICE_PATH_PROTOCOL *Node;
> + UINT16 Result;
> +
> + Result = BBS_TYPE_UNKNOWN;
> + if (DevicePath == NULL) {
> + return Result;
> + }
> +
> + Node = DevicePath;
> + while (!IsDevicePathEnd (Node)) {
> + switch (DevicePathType (Node)) {
> + case MEDIA_DEVICE_PATH:
> + if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
> + Result = BBS_TYPE_CDROM;
> + }
> + break;
> +
> + case MESSAGING_DEVICE_PATH:
> + Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
> + break;
> +
> + default:
> + Result = BBS_TYPE_UNKNOWN;
> + break;
> + }
> +
> + if (Result != BBS_TYPE_UNKNOWN) {
> + break;
> + }
> +
> + Node = NextDevicePathNode (Node);
> + }
> +
> + return Result;
> +}
> +
> +STATIC
> +EFI_STATUS
> +GetBmcBootOptionsSetting (
> + OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
> + return Status;
> + }
> +
> + if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
> + return EFI_NOT_FOUND;
> + }
> +
> + if (BmcBootOpt->Persistent) {
> + BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
> + } else {
> + BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
> + }
> +
> + Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
> + }
> +
> + return Status;
> +}
> +
> +VOID
> +RestoreBootOrder (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + UINT16 *BootOrder;
> + UINTN BootOrderSize;
> +
> + GetVariable2 (L"BootOrderBackup", &gOemBootVariableGuid, (VOID **) &BootOrder, &BootOrderSize);
line length
> + if (BootOrder == NULL) {
> + return ;
> + }
> +
> + Print (L"\nRestore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
> +
> + Status = gRT->SetVariable (
> + L"BootOrder",
> + &gEfiGlobalVariableGuid,
> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
line length
> + BootOrderSize,
> + BootOrder
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
> + }
> +
> + Status = gRT->SetVariable (
> + L"BootOrderBackup",
> + &gOemBootVariableGuid,
> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
> + 0,
> + NULL
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
> + }
> +
> + FreePool (BootOrder);
> +
> + return;
Remove this return
> +}
> +
> +
STATIC
> +VOID
EFIAPI
> +RestoreBootOrderOnReadyToBoot (
> + IN EFI_EVENT Event,
> + IN VOID *Context
> + )
> +{
> + // restore BootOrder variable in normal condition.
> + RestoreBootOrder ();
> +}
> +
> +STATIC
> +VOID
> +UpdateBootOrder (
> + IN UINT16 *NewOrder,
> + IN UINT16 *BootOrder,
> + IN UINTN BootOrderSize
> + )
> +{
> + EFI_STATUS Status;
> + EFI_EVENT Event;
> +
> + Status = gRT->SetVariable (
> + L"BootOrderBackup",
> + &gOemBootVariableGuid,
> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
> + BootOrderSize,
> + BootOrder
> + );
> + if (EFI_ERROR (Status)) {
no DEBUG()?
> + return;
> + }
> +
> + Status = gRT->SetVariable (
> + L"BootOrder",
> + &gEfiGlobalVariableGuid,
> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
line length
> + BootOrderSize,
> + NewOrder
> + );
> + if (EFI_ERROR (Status)) {
no DEBUG()?
> + return;
> + }
> +
> + // Register notify function to restore BootOrder variable on ReadyToBoot Event.
> + Status = gBS->CreateEventEx (
> + EVT_NOTIFY_SIGNAL,
> + TPL_CALLBACK,
> + RestoreBootOrderOnReadyToBoot,
> + NULL,
> + &gEfiEventReadyToBootGuid,
> + &Event
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
> + }
> +
> + return;
Remove this
> +}
> +
> +STATIC
> +VOID
> +SetBootOrder (
> + IN UINT16 BootType
> + )
> +{
> + EFI_STATUS Status;
> + UINT16 *NewOrder;
> + UINT16 *RemainBoots;
> + UINT16 *BootOrder;
> + UINTN BootOrderSize;
> + EFI_BOOT_MANAGER_LOAD_OPTION Option;
> + CHAR16 OptionName[sizeof ("Boot####")];
> + UINTN Index;
> + UINTN SelectCnt;
> + UINTN RemainCnt;
> +
> + GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
> + if (BootOrder == NULL) {
> + return ;
> + }
> +
> + NewOrder = AllocatePool (BootOrderSize);
> + RemainBoots = AllocatePool (BootOrderSize);
> + if ((NewOrder == NULL) || (RemainBoots == NULL)) {
> + DEBUG ((DEBUG_ERROR, "Out of resources."));
> + goto Exit;
> + }
> +
> + SelectCnt = 0;
> + RemainCnt = 0;
> +
> + for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
> + UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
> + Status = EfiBootManagerVariableToLoadOption (OptionName, &Option);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
> + continue;
> + }
> +
> + if (GetBBSTypeByDevicePath (Option.FilePath) == BootType) {
> + NewOrder[SelectCnt++] = BootOrder[Index];
> + } else {
> + RemainBoots[RemainCnt++] = BootOrder[Index];
> + }
> + }
> +
> + if (SelectCnt != 0) {
> + // append RemainBoots to NewOrder
> + for (Index = 0; Index < RemainCnt; Index++) {
> + NewOrder[SelectCnt + Index] = RemainBoots[Index];
> + }
> +
> + if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
> + UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
> + }
> + }
> +
> +Exit:
> + FreePool (BootOrder);
> + if (NewOrder != NULL) {
> + FreePool (NewOrder);
> + }
> + if (RemainBoots != NULL) {
> + FreePool (RemainBoots);
> + }
> +
> + return ;
Remove this
> +}
> +
> +VOID
> +HandleBmcBootType (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + IPMI_GET_BOOT_OPTION BmcBootOpt;
> + UINT16 BootType;
> +
> + Status = GetBmcBootOptionsSetting (&BmcBootOpt);
> + if (EFI_ERROR (Status)) {
> + return;
> + }
> +
> + Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
> +
> + switch (BmcBootOpt.BootDeviceSelector) {
> + case ForcePxe:
> + BootType = BBS_TYPE_EMBEDDED_NETWORK;
> + break;
> +
> + case ForcePrimaryRemovableMedia:
> + BootType = BBS_TYPE_USB;
> + break;
> +
> + case ForceDefaultHardDisk:
> + BootType = BBS_TYPE_HARDDRIVE;
> + break;
> +
> + case ForceDefaultCD:
> + BootType = BBS_TYPE_CDROM;
> + break;
> +
> + default:
> + return;
> + }
> +
> + SetBootOrder (BootType);
> +}
> +
> diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> new file mode 100644
> index 0000000..7e407b4
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> @@ -0,0 +1,51 @@
> +#/** @file
> +#
> +# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2015, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010005
0x0000001A
> + BASE_NAME = BmcConfigBootLib
> + FILE_GUID = f174d192-7208-46c1-b9d1-65b2db06ad3b
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = BmcConfigBootLib
> +
> +[Sources.common]
> + BmcConfigBootLib.c
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + DevicePathLib
> + IpmiCmdLib
> + PcdLib
> + PrintLib
> + UefiBootManagerLib
> +
> +[BuildOptions]
> +
Remove empty sections please
> +[Pcd]
> +
> +[Guids]
> + gEfiEventReadyToBootGuid
> +
> +[Protocols]
> + gEfiDevicePathToTextProtocolGuid ## CONSUMES
> + gEfiSimpleFileSystemProtocolGuid ## CONSUMES
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> index 5d8d58e..845519f 100644
> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -16,6 +16,7 @@
> **/
>
> #include <IndustryStandard/Pci22.h>
> +#include <Library/BmcConfigBootLib.h>
> #include <Library/DevicePathLib.h>
> #include <Library/PcdLib.h>
> #include <Library/UefiBootManagerLib.h>
> @@ -474,6 +475,10 @@ PlatformBootManagerBeforeConsole (
> //
> EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
>
> + // restore BootOrder variable if previous BMC boot override attempt
> + // left it in a modified state
> + RestoreBootOrder ();
> +
> UpdateMemory ();
>
> //
> @@ -570,6 +575,8 @@ PlatformBootManagerAfterConsole (
> PlatformRegisterFvBootOption (
> PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
> );
> +
> + HandleBmcBootType ();
> }
>
> /**
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> index ae274f3..7b151a9 100644
> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> @@ -44,6 +44,7 @@
> [LibraryClasses]
> BaseLib
> BaseMemoryLib
> + BmcConfigBootLib
> DebugLib
> DevicePathLib
> DxeServicesLib
> diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
> index dc23e46..20015da 100644
> --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
> +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
> @@ -20,25 +20,19 @@
> **/
>
> #include <IndustryStandard/Pci22.h>
> +#include <Library/BmcConfigBootLib.h>
> #include <Library/DevicePathLib.h>
> -#include <Library/GenericBdsLib.h>
> -#include <Library/IpmiCmdLib.h>
> #include <Library/PcdLib.h>
> #include <Library/PlatformBdsLib.h>
> #include <Library/PrintLib.h>
> #include <Library/UefiLib.h>
> #include <Protocol/DevicePath.h>
> -#include <Protocol/DevicePathToText.h>
> #include <Protocol/GraphicsOutput.h>
> #include <Protocol/PciIo.h>
> #include <Protocol/PciRootBridgeIo.h>
> -#include <Guid/GlobalVariable.h>
>
> #include "IntelBdsPlatform.h"
>
> -GUID gOemBootVaraibleGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99,
> - 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} };
> -
> //3CEF354A-3B7A-4519-AD70-72A134698311
> GUID gEblFileGuid = {0x3CEF354A, 0x3B7A, 0x4519, {0xAD, 0x70,
> 0x72, 0xA1, 0x34, 0x69, 0x83, 0x11} };
> @@ -149,432 +143,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
> }
> };
>
> -STATIC
> -UINT16
> -GetBBSTypeFromFileSysPath (
> - IN CHAR16 *UsbPathTxt,
> - IN CHAR16 *FileSysPathTxt,
> - IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
> - )
> -{
> - EFI_DEVICE_PATH_PROTOCOL *Node;
> -
> - if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
> - Node = FileSysPath;
> - while (!IsDevicePathEnd (Node)) {
> - if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
> - (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
> - return BBS_TYPE_CDROM;
> - }
> - Node = NextDevicePathNode (Node);
> - }
> - }
> -
> - return BBS_TYPE_UNKNOWN;
> -}
> -
> -STATIC
> -UINT16
> -GetBBSTypeFromUsbPath (
> - IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
> - )
> -{
> - EFI_STATUS Status;
> - EFI_HANDLE *FileSystemHandles;
> - UINTN NumberFileSystemHandles;
> - UINTN Index;
> - EFI_DEVICE_PATH_PROTOCOL *FileSysPath;
> - EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText;
> - CHAR16 *UsbPathTxt;
> - CHAR16 *FileSysPathTxt;
> - UINT16 Result;
> -
> - Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText);
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status));
> - return BBS_TYPE_UNKNOWN;
> - }
> -
> - Result = BBS_TYPE_UNKNOWN;
> - UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
> - if (UsbPathTxt == NULL) {
> - return Result;
> - }
> -
> - Status = gBS->LocateHandleBuffer (
> - ByProtocol,
> - &gEfiSimpleFileSystemProtocolGuid,
> - NULL,
> - &NumberFileSystemHandles,
> - &FileSystemHandles
> - );
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
> - FreePool (UsbPathTxt);
> - return BBS_TYPE_UNKNOWN;
> - }
> -
> - for (Index = 0; Index < NumberFileSystemHandles; Index++) {
> - FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
> - FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
> -
> - if (FileSysPathTxt == NULL) {
> - continue;
> - }
> -
> - Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
> - FreePool (FileSysPathTxt);
> -
> - if (Result != BBS_TYPE_UNKNOWN) {
> - break;
> - }
> - }
> -
> - if (NumberFileSystemHandles != 0) {
> - FreePool (FileSystemHandles);
> - }
> -
> - FreePool (UsbPathTxt);
> -
> - return Result;
> -}
> -
> -STATIC
> -UINT16
> -GetBBSTypeFromMessagingDevicePath (
> - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
> - IN EFI_DEVICE_PATH_PROTOCOL *Node
> - )
> -{
> - VENDOR_DEVICE_PATH *Vendor;
> - UINT16 Result;
> -
> - Result = BBS_TYPE_UNKNOWN;
> -
> - switch (DevicePathSubType (Node)) {
> - case MSG_MAC_ADDR_DP:
> - Result = BBS_TYPE_EMBEDDED_NETWORK;
> - break;
> -
> - case MSG_USB_DP:
> - Result = GetBBSTypeFromUsbPath (DevicePath);
> - if (Result == BBS_TYPE_UNKNOWN) {
> - Result = BBS_TYPE_USB;
> - }
> - break;
> -
> - case MSG_SATA_DP:
> - Result = BBS_TYPE_HARDDRIVE;
> - break;
> -
> - case MSG_VENDOR_DP:
> - Vendor = (VENDOR_DEVICE_PATH *) (Node);
> - if ((&Vendor->Guid) != NULL) {
> - if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
> - Result = BBS_TYPE_HARDDRIVE;
> - }
> - }
> - break;
> -
> - default:
> - Result = BBS_TYPE_UNKNOWN;
> - break;
> - }
> -
> - return Result;
> -}
> -
> -STATIC
> -UINT16
> -GetBBSTypeByDevicePath (
> - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
> - )
> -{
> - EFI_DEVICE_PATH_PROTOCOL *Node;
> - UINT16 Result;
> -
> - Result = BBS_TYPE_UNKNOWN;
> - if (DevicePath == NULL) {
> - return Result;
> - }
> -
> - Node = DevicePath;
> - while (!IsDevicePathEnd (Node)) {
> - switch (DevicePathType (Node)) {
> - case MEDIA_DEVICE_PATH:
> - if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
> - Result = BBS_TYPE_CDROM;
> - }
> - break;
> -
> - case MESSAGING_DEVICE_PATH:
> - Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
> - break;
> -
> - default:
> - Result = BBS_TYPE_UNKNOWN;
> - break;
> - }
> -
> - if (Result != BBS_TYPE_UNKNOWN) {
> - break;
> - }
> -
> - Node = NextDevicePathNode (Node);
> - }
> -
> - return Result;
> -}
> -
> -STATIC
> -EFI_STATUS
> -GetBmcBootOptionsSetting (
> - OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
> - )
> -{
> - EFI_STATUS Status;
> -
> - Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
> - return Status;
> - }
> -
> - if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
> - return EFI_NOT_FOUND;
> - }
> -
> - if (BmcBootOpt->Persistent) {
> - BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
> - } else {
> - BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
> - }
> -
> - Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
> - }
> -
> - return Status;
> -}
> -
> -STATIC
> -VOID
> -RestoreBootOrder (
> - VOID
> - )
> -{
> - EFI_STATUS Status;
> - UINT16 *BootOrder;
> - UINTN BootOrderSize;
> -
> - GetVariable2 (L"BootOrderBackup", &gOemBootVaraibleGuid, (VOID **) &BootOrder, &BootOrderSize);
> - if (BootOrder == NULL) {
> - return ;
> - }
> -
> - Print (L"Restore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
> -
> - Status = gRT->SetVariable (
> - L"BootOrder",
> - &gEfiGlobalVariableGuid,
> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
> - BootOrderSize,
> - BootOrder
> - );
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
> - }
> -
> - Status = gRT->SetVariable (
> - L"BootOrderBackup",
> - &gOemBootVaraibleGuid,
> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
> - 0,
> - NULL
> - );
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
> - }
> -
> - FreePool (BootOrder);
> -
> - return;
> -}
> -
> -
> -VOID
> -RestoreBootOrderOnReadyToBoot (
> - IN EFI_EVENT Event,
> - IN VOID *Context
> - )
> -{
> - // restore BootOrder variable in normal condition.
> - RestoreBootOrder ();
> -}
> -
> -STATIC
> -VOID
> -UpdateBootOrder (
> - IN UINT16 *NewOrder,
> - IN UINT16 *BootOrder,
> - IN UINTN BootOrderSize
> - )
> -{
> - EFI_STATUS Status;
> - EFI_EVENT Event;
> -
> - Status = gRT->SetVariable (
> - L"BootOrderBackup",
> - &gOemBootVaraibleGuid,
> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
> - BootOrderSize,
> - BootOrder
> - );
> - if (EFI_ERROR (Status)) {
> - return;
> - }
> -
> - Status = gRT->SetVariable (
> - L"BootOrder",
> - &gEfiGlobalVariableGuid,
> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
> - BootOrderSize,
> - NewOrder
> - );
> - if (EFI_ERROR (Status)) {
> - return;
> - }
> -
> - // Register notify function to restore BootOrder variable on ReadyToBoot Event.
> - Status = gBS->CreateEventEx (
> - EVT_NOTIFY_SIGNAL,
> - TPL_CALLBACK,
> - RestoreBootOrderOnReadyToBoot,
> - NULL,
> - &gEfiEventReadyToBootGuid,
> - &Event
> - );
> - if (EFI_ERROR (Status)) {
> - DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
> - }
> -
> - return;
> -}
> -
> -STATIC
> -VOID
> -SetBootOrder (
> - IN UINT16 BootType
> - )
> -{
> - UINT16 *NewOrder;
> - UINT16 *RemainBoots;
> - UINT16 *BootOrder;
> - UINTN BootOrderSize;
> - CHAR16 OptionName[sizeof ("Boot####")];
> - UINTN Index;
> - LIST_ENTRY BootOptionList;
> - BDS_COMMON_OPTION *Option;
> - UINTN SelectCnt;
> - UINTN RemainCnt;
> -
> - InitializeListHead (&BootOptionList);
> -
> - GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
> - if (BootOrder == NULL) {
> - return ;
> - }
> -
> - NewOrder = AllocatePool (BootOrderSize);
> - RemainBoots = AllocatePool (BootOrderSize);
> - if ((NewOrder == NULL) || (RemainBoots == NULL)) {
> - DEBUG ((DEBUG_ERROR, "Out of resources."));
> - goto Exit;
> - }
> -
> - SelectCnt = 0;
> - RemainCnt = 0;
> -
> - for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
> - UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
> - Option = BdsLibVariableToOption (&BootOptionList, OptionName);
> - if (Option == NULL) {
> - DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
> - continue;
> - }
> -
> - if (GetBBSTypeByDevicePath (Option->DevicePath) == BootType) {
> - NewOrder[SelectCnt++] = BootOrder[Index];
> - } else {
> - RemainBoots[RemainCnt++] = BootOrder[Index];
> - }
> - }
> -
> - if (SelectCnt != 0) {
> - // append RemainBoots to NewOrder
> - for (Index = 0; Index < RemainCnt; Index++) {
> - NewOrder[SelectCnt + Index] = RemainBoots[Index];
> - }
> -
> - if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
> - UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
> - }
> - }
> -
> -Exit:
> - FreePool (BootOrder);
> - if (NewOrder != NULL) {
> - FreePool (NewOrder);
> - }
> - if (RemainBoots != NULL) {
> - FreePool (RemainBoots);
> - }
> -
> - return ;
> -}
> -
> -STATIC
> -VOID
> -HandleBmcBootType (
> - VOID
> - )
> -{
> - EFI_STATUS Status;
> - IPMI_GET_BOOT_OPTION BmcBootOpt;
> - UINT16 BootType;
> -
> - Status = GetBmcBootOptionsSetting (&BmcBootOpt);
> - if (EFI_ERROR (Status)) {
> - return;
> - }
> -
> - Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
> -
> - switch (BmcBootOpt.BootDeviceSelector) {
> - case ForcePxe:
> - BootType = BBS_TYPE_EMBEDDED_NETWORK;
> - break;
> -
> - case ForcePrimaryRemovableMedia:
> - BootType = BBS_TYPE_USB;
> - break;
> -
> - case ForceDefaultHardDisk:
> - BootType = BBS_TYPE_HARDDRIVE;
> - break;
> -
> - case ForceDefaultCD:
> - BootType = BBS_TYPE_CDROM;
> - break;
> -
> - default:
> - return;
> - }
> -
> - SetBootOrder (BootType);
> -}
> -
> //
> // BDS Platform Functions
> //
> diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> index 0feec06..793c7dc 100644
> --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> @@ -47,10 +47,10 @@
> [LibraryClasses]
> BaseLib
> BaseMemoryLib
> + BmcConfigBootLib
> DebugLib
> DevicePathLib
> GenericBdsLib
> - IpmiCmdLib
> MemoryAllocationLib
> PcdLib
> PrintLib
> @@ -70,14 +70,12 @@
>
> [Guids]
> gEfiEndOfDxeEventGroupGuid
> - gEfiEventReadyToBootGuid
> gEfiFileInfoGuid
> gEfiFileSystemInfoGuid
> gEfiFileSystemVolumeLabelInfoIdGuid
>
> [Protocols]
> gEfiDevicePathProtocolGuid
> - gEfiDevicePathToTextProtocolGuid
> gEfiGraphicsOutputProtocolGuid
> gEfiLoadedImageProtocolGuid
> gEfiPciRootBridgeIoProtocolGuid
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-18 15:01 ` [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support Ming Huang
@ 2018-01-20 10:50 ` Ard Biesheuvel
2018-01-23 8:53 ` Huangming (Mark)
2018-01-24 11:10 ` Huangming (Mark)
2018-01-23 14:06 ` Leif Lindholm
1 sibling, 2 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 10:50 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
> Platform/Hisilicon/D03/D03.dsc | 17 +++-
> Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
> Platform/Hisilicon/D05/D05.dsc | 19 +++-
> Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
> Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
> 13 files changed, 641 insertions(+), 3 deletions(-)
>
Excellent!! Very happy to see this added.
> diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> new file mode 100644
> index 0000000..fc834d9
> --- /dev/null
> +++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> @@ -0,0 +1,45 @@
> +#
> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Head]
> +NumOfUpdate = 3
> +NumOfRecovery = 0
> +Update0 = SysFvMain
> +Update1 = SysCustom
> +Update2 = SysNvRam
> +
> +[SysFvMain]
> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
> +AddressType = 0 # 0 - relative address, 1 - absolute address.
> +BaseAddress = 0x00000000 # Base address offset on flash
> +Length = 0x002D0000 # Length
> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
> +
> +[SysCustom]
> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
> +AddressType = 0 # 0 - relative address, 1 - absolute address.
> +BaseAddress = 0x002F0000 # Base address offset on flash
> +Length = 0x00010000 # Length
> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
> +
> +[SysNvRam]
> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
> +AddressType = 0 # 0 - relative address, 1 - absolute address.
> +BaseAddress = 0x002D0000 # Base address offset on flash
> +Length = 0x00020000 # Length
> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index b2eae7d..69bc7b4 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -66,7 +66,6 @@
> OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
>
> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> !if $(GENERIC_BDS) == TRUE
> @@ -117,6 +116,11 @@
> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>
> +[PcdsDynamicExDefault.common.DEFAULT]
> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
> +
> [PcdsFixedAtBuild.common]
> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>
> @@ -310,6 +314,8 @@
> Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>
> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> +
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> <LibraryClasses>
> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> @@ -410,6 +416,9 @@
>
> Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>
> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
> +
> #
> # FAT filesystem + GPT/MBR partitioning
> #
> @@ -483,6 +492,12 @@
> !else
> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> !endif
> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
> + <LibraryClasses>
> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
> + }
> +
> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>
> #
> # UEFI application (Shell Embedded Boot Loader)
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index 0d704b5..ffddd2d 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE
> INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>
> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
> #
> # Build Shell from latest source code instead of prebuilt binary
> #
> @@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE
>
> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>
> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> +
> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> SECTION FV_IMAGE = FVMAIN
> }
> }
>
> +[FV.CapsuleDispatchFv]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
> +
> +[FV.SystemFirmwareUpdateCargo]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
> + FD = D03
> + }
> +
> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
> + FV = CapsuleDispatchFv
> + }
> +
> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
> + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> + }
> +
> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
> +IMAGE_HEADER_INIT_VERSION = 0x02
> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
Use a fresh GUID here, and make sure you use a different one for D03/D05 etc.
This is what identifies the platform when using fwupdmgr etc.
> +IMAGE_INDEX = 0x1
> +HARDWARE_INSTANCE = 0x0
> +MONOTONIC_COUNT = 0x1
> +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
> +
> + FV = SystemFirmwareUpdateCargo
> +
> +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
> +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
> +CAPSULE_HEADER_SIZE = 0x20
> +CAPSULE_HEADER_INIT_VERSION = 0x1
> +
> + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>
> !include Silicon/Hisilicon/Hisilicon.fdf.inc
>
> diff --git a/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> new file mode 100644
> index 0000000..fc834d9
> --- /dev/null
> +++ b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> @@ -0,0 +1,45 @@
> +#
> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Head]
> +NumOfUpdate = 3
> +NumOfRecovery = 0
> +Update0 = SysFvMain
> +Update1 = SysCustom
> +Update2 = SysNvRam
> +
> +[SysFvMain]
> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
> +AddressType = 0 # 0 - relative address, 1 - absolute address.
> +BaseAddress = 0x00000000 # Base address offset on flash
> +Length = 0x002D0000 # Length
> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
> +
> +[SysCustom]
> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
> +AddressType = 0 # 0 - relative address, 1 - absolute address.
> +BaseAddress = 0x002F0000 # Base address offset on flash
> +Length = 0x00010000 # Length
> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
> +
> +[SysNvRam]
> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
> +AddressType = 0 # 0 - relative address, 1 - absolute address.
> +BaseAddress = 0x002D0000 # Base address offset on flash
> +Length = 0x00020000 # Length
> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index b89cea3..b99cda5 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -81,7 +81,6 @@
> OemAddressMapLib|Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.inf
>
> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> !if $(GENERIC_BDS) == TRUE
> @@ -130,6 +129,11 @@
> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
> gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
>
> +[PcdsDynamicExDefault.common.DEFAULT]
> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
> +
> [PcdsFixedAtBuild.common]
> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>
> @@ -448,6 +452,8 @@
> Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>
> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> +
> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
> <LibraryClasses>
> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
> @@ -564,6 +570,9 @@
>
> Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>
> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
> +
> #
> # FAT filesystem + GPT/MBR partitioning
> #
> @@ -635,6 +644,14 @@
> !else
> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> !endif
> +
> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
> + <LibraryClasses>
> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
> + }
> +
> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
> +
> #
> # UEFI application (Shell Embedded Boot Loader)
> #
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index d209210..9a61c52 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -297,6 +297,8 @@ READ_LOCK_STATUS = TRUE
> INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
> INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>
> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
> #
> # Build Shell from latest source code instead of prebuilt binary
> #
> @@ -361,12 +363,80 @@ READ_LOCK_STATUS = TRUE
>
> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>
> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> +
> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
> SECTION FV_IMAGE = FVMAIN
> }
> }
>
> +[FV.CapsuleDispatchFv]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
> +
> +[FV.SystemFirmwareUpdateCargo]
> +FvAlignment = 16
> +ERASE_POLARITY = 1
> +MEMORY_MAPPED = TRUE
> +STICKY_WRITE = TRUE
> +LOCK_CAP = TRUE
> +LOCK_STATUS = TRUE
> +WRITE_DISABLED_CAP = TRUE
> +WRITE_ENABLED_CAP = TRUE
> +WRITE_STATUS = TRUE
> +WRITE_LOCK_CAP = TRUE
> +WRITE_LOCK_STATUS = TRUE
> +READ_DISABLED_CAP = TRUE
> +READ_ENABLED_CAP = TRUE
> +READ_STATUS = TRUE
> +READ_LOCK_CAP = TRUE
> +READ_LOCK_STATUS = TRUE
> +
> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
> + FD = D05
> + }
> +
> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
> + FV = CapsuleDispatchFv
> + }
> +
> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
> + Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> + }
> +
> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
> +IMAGE_HEADER_INIT_VERSION = 0x02
> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
> +IMAGE_INDEX = 0x1
> +HARDWARE_INSTANCE = 0x0
> +MONOTONIC_COUNT = 0x1
> +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
> +
> + FV = SystemFirmwareUpdateCargo
> +
> +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
> +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
> +CAPSULE_HEADER_SIZE = 0x20
> +CAPSULE_HEADER_INIT_VERSION = 0x1
> +
> + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>
> !include Silicon/Hisilicon/Hisilicon.fdf.inc
>
> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
> new file mode 100644
> index 0000000..465535e
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
> @@ -0,0 +1,81 @@
> +/** @file
> + System Firmware descriptor.
> +
> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2018, Linaro Limited. All rights reserved.
> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD License
> + which accompanies this distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <PiPei.h>
> +#include <Guid/EdkiiSystemFmpCapsule.h>
> +#include <Protocol/FirmwareManagement.h>
> +
> +#define PACKAGE_VERSION 0xFFFFFFFF
> +#define PACKAGE_VERSION_STRING L"Unknown"
> +
> +#define CURRENT_FIRMWARE_VERSION 0x00000002
> +#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002"
> +#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001
> +
> +#define IMAGE_ID SIGNATURE_64('H','W','A', 'R', 'M', '_', 'F', 'd')
> +#define IMAGE_ID_STRING L"ARMPlatformFd"
> +
> +// PcdSystemFmpCapsuleImageTypeIdGuid
> +#define IMAGE_TYPE_ID_GUID { 0xd34b3d29, 0x0085, 0x4ab3, { 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89 } }
> +
> +typedef struct {
> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor;
> + // real string data
> + CHAR16 ImageIdNameStr[sizeof(IMAGE_ID_STRING) / sizeof(CHAR16)];
> + CHAR16 VersionNameStr[sizeof(CURRENT_FIRMWARE_VERSION_STRING) / sizeof(CHAR16)];
> + CHAR16 PackageVersionNameStr[sizeof(PACKAGE_VERSION_STRING) / sizeof(CHAR16)];
> +} IMAGE_DESCRIPTOR;
> +
> +IMAGE_DESCRIPTOR mImageDescriptor =
> +{
> + {
> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE,
> + sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR),
> + sizeof (IMAGE_DESCRIPTOR),
> + PACKAGE_VERSION, // PackageVersion
> + OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersionName
> + 1, // ImageIndex;
> + {0x0}, // Reserved
> + IMAGE_TYPE_ID_GUID, // ImageTypeId;
> + IMAGE_ID, // ImageId;
> + OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName;
> + CURRENT_FIRMWARE_VERSION, // Version;
> + OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName;
> + {0x0}, // Reserved2
> + FixedPcdGet32 (PcdFdSize), // Size;
> + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
> + IMAGE_ATTRIBUTE_RESET_REQUIRED |
> + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
> + IMAGE_ATTRIBUTE_IN_USE, // AttributesSupported;
> + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
> + IMAGE_ATTRIBUTE_RESET_REQUIRED |
> + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
> + IMAGE_ATTRIBUTE_IN_USE, // AttributesSetting;
> + 0x0, // Compatibilities;
> + LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSupportedImageVersion;
> + 0x00000000, // LastAttemptVersion;
> + 0, // LastAttemptStatus;
> + {0x0}, // Reserved3
> + 0, // HardwareInstance;
> + },
> + // real string data
> + {IMAGE_ID_STRING},
> + {CURRENT_FIRMWARE_VERSION_STRING},
> + {PACKAGE_VERSION_STRING},
> +};
> +
> +VOID* CONST ReferenceAcpiTable = &mImageDescriptor;
> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> new file mode 100644
> index 0000000..c38a809
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> @@ -0,0 +1,50 @@
> +## @file
> +# System Firmware descriptor.
> +#
> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010005
> + BASE_NAME = SystemFirmwareDescriptor
> + FILE_GUID = 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC
> + MODULE_TYPE = PEIM
> + VERSION_STRING = 1.0
> + ENTRY_POINT = SystemFirmwareDescriptorPeimEntry
> +
> +[Sources]
> + SystemFirmwareDescriptorPei.c
> + SystemFirmwareDescriptor.aslc
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + ArmPlatformPkg/ArmPlatformPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + SignedCapsulePkg/SignedCapsulePkg.dec
> +
> +[LibraryClasses]
> + DebugLib
> + PcdLib
> + PeimEntryPoint
> + PeiServicesLib
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdFdSize
> +
> +[Pcd]
> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor
> +
> +[Depex]
> + TRUE
> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
> new file mode 100644
> index 0000000..27c0a71
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
> @@ -0,0 +1,70 @@
> +/** @file
> + System Firmware descriptor producer.
> +
> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2018, Linaro Limited. All rights reserved.
> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD License
> + which accompanies this distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <PiPei.h>
> +#include <Guid/EdkiiSystemFmpCapsule.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PeiServicesLib.h>
> +#include <Protocol/FirmwareManagement.h>
> +
> +/**
> + Entrypoint for SystemFirmwareDescriptor PEIM.
> +
> + @param[in] FileHandle Handle of the file being invoked.
> + @param[in] PeiServices Describes the list of possible PEI Services.
> +
> + @retval EFI_SUCCESS PPI successfully installed.
> +**/
> +EFI_STATUS
> +EFIAPI
> +SystemFirmwareDescriptorPeimEntry (
> + IN EFI_PEI_FILE_HANDLE FileHandle,
> + IN CONST EFI_PEI_SERVICES **PeiServices
> + )
> +{
> + EFI_STATUS Status;
> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor;
> + UINTN Size;
> + UINTN Index;
> + UINT32 AuthenticationStatus;
> +
> + //
> + // Search RAW section.
> + //
> +
> + Index = 0;
> + while (TRUE) {
> + Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Index, FileHandle, (VOID **)&Descriptor, &AuthenticationStatus);
> + if (EFI_ERROR (Status)) {
> + // Should not happen, must something wrong in FDF.
> + DEBUG ((DEBUG_ERROR, "Not found SystemFirmwareDescriptor in fdf !\n"));
> + return EFI_NOT_FOUND;
> + }
> + if (Descriptor->Signature == EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE) {
> + break;
> + }
> + Index++;
> + }
> +
> + DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\n", Descriptor->Length));
> +
> + Size = Descriptor->Length;
> + PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor);
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
> index 308064b..dfa11d1 100644
> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
> @@ -104,6 +104,15 @@
> ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>
> + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
> + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
> + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
> + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
> + EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
> + IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
> + PlatformFlashAccessLib|Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
> +
> #
> # It is not possible to prevent the ARM compiler for generic intrinsic functions.
> # This library provides the instrinsic functions generate by a given compiler.
> @@ -198,7 +207,7 @@
> HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
> ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
> SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortRuntimeLib/Dw8250SerialPortRuntimeLib.inf
> DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
>
> diff --git a/Silicon/Hisilicon/Hisilicon.fdf.inc b/Silicon/Hisilicon/Hisilicon.fdf.inc
> index ee87cd1..986dd75 100644
> --- a/Silicon/Hisilicon/Hisilicon.fdf.inc
> +++ b/Silicon/Hisilicon/Hisilicon.fdf.inc
> @@ -76,6 +76,15 @@
> }
> }
>
> +[Rule.Common.PEIM.FMP_IMAGE_DESC]
> + FILE PEIM = $(NAMED_GUID) {
> + RAW BIN |.acpi
> + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
> + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
> + UI STRING="$(MODULE_NAME)" Optional
> + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
> + }
> +
> [Rule.Common.DXE_CORE]
> FILE DXE_CORE = $(NAMED_GUID) {
> PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
> new file mode 100644
> index 0000000..db5725d
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
> @@ -0,0 +1,106 @@
> +/** @file
> + Platform Flash Access library.
> +
> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2018, Linaro Limited. All rights reserved.
> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +
> + This program and the accompanying materials
> + are licensed and made available under the terms and conditions of the BSD License
> + which accompanies this distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <PiDxe.h>
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/PlatformFlashAccessLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Protocol/HisiSpiFlashProtocol.h>
> +
> +STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress;
> +STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress;
> +
> +HISI_SPI_FLASH_PROTOCOL *mSpiProtocol;
STATIC
> +
> +/**
> + Perform flash write opreation.
> +
> + @param[in] FirmwareType The type of firmware.
> + @param[in] FlashAddress The address of flash device to be accessed.
> + @param[in] FlashAddressType The type of flash device address.
> + @param[in] Buffer The pointer to the data buffer.
> + @param[in] Length The length of data buffer in bytes.
> +
> + @retval EFI_SUCCESS The operation returns successfully.
> + @retval EFI_WRITE_PROTECTED The flash device is read only.
> + @retval EFI_UNSUPPORTED The flash device access is unsupported.
> + @retval EFI_INVALID_PARAMETER The input parameter is not valid.
> +**/
> +EFI_STATUS
> +EFIAPI
> +PerformFlashWrite (
> + IN PLATFORM_FIRMWARE_TYPE FirmwareType,
> + IN EFI_PHYSICAL_ADDRESS FlashAddress,
> + IN FLASH_ADDRESS_TYPE FlashAddressType,
> + IN VOID *Buffer,
> + IN UINTN Length
> + )
> +{
> + UINT32 RomAddress;
> + EFI_STATUS Status;
> +
> + DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
> +
Line length
> + if (FlashAddressType == FlashAddressTypeAbsoluteAddress) {
> + FlashAddress = FlashAddress - mInternalFdAddress;
> + }
> +
> + RomAddress = (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0BaseAddress);
> +
> + DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n"));
> +
> + Status = mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, (UINT8 *)Buffer, (UINT32) Length);
Line length
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "Erase and Write Status = %r \n", Status));
> + }
> +
> + return Status;
> +}
> +
> +/**
> + Platform Flash Access Lib Constructor.
> +
> + @param[in] ImageHandle The firmware allocated handle for the EFI image.
> + @param[in] SystemTable A pointer to the EFI System Table.
> +
> + @retval EFI_SUCCESS Constructor returns successfully.
> +**/
> +EFI_STATUS
> +EFIAPI
> +PerformFlashAccessLibConstructor (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBaseAddress);
> +
> + mSFCMEM0BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCMEM0BaseAddress);
> +
Drop the (UINTN) cast, EFI_PHYSICAL_ADDRESS is always 64 bits.
> + DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddress - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress));
> +
> + Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID **)&mSpiProtocol);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = %r \n", Status));
> + }
> +
Line length
> + return Status;
> +}
> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
> new file mode 100644
> index 0000000..f4533ac
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
> @@ -0,0 +1,51 @@
> +## @file
> +# Platform Flash Access library.
> +#
> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010005
0x0000001A
> + BASE_NAME = PlatformFlashAccessLibDxe
> + FILE_GUID = 9168384A-5F66-4CF7-AEB6-845BDEBD3012
Use a fresh GUID
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER
> + CONSTRUCTOR = PerformFlashAccessLibConstructor
> +
> +[Sources]
> + PlatformFlashAccessLibDxe.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + SignedCapsulePkg/SignedCapsulePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + BaseMemoryLib
> + DebugLib
> + PcdLib
> + UefiBootServicesTableLib
> +
> +[Protocols]
> + gHisiSpiFlashProtocolGuid
> +
> +[FixedPcd]
> + gArmTokenSpaceGuid.PcdFdBaseAddress
> + gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress
> +
> +[Depex]
> + gHisiSpiFlashProtocolGuid
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code
2018-01-18 15:01 ` [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code Ming Huang
@ 2018-01-20 10:57 ` Ard Biesheuvel
2018-01-23 11:01 ` Huangming (Mark)
2018-01-23 14:04 ` Leif Lindholm
1 sibling, 1 reply; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 10:57 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, huangming, Jason Zhang, wanghuiqiang, guoheyi,
waip23, Mengfanrong
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +-
> Platform/Hisilicon/D03/D03.fdf | 3 +-
> Platform/Hisilicon/D05/D05.dsc | 1 +
> Platform/Hisilicon/D05/D05.fdf | 2 +-
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 ++++++++++++++++++++
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 +++++++++++
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++++++++++++++
> Silicon/Hisilicon/HisiPkg.dec | 2 +
> Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++++++++++++
> Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +++
> 10 files changed, 270 insertions(+), 4 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 69bc7b4..370e17b 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -474,7 +474,7 @@
> Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
> Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
> Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
> -
> + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
>
>
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index ffddd2d..6e43228 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -271,8 +271,7 @@ READ_LOCK_STATUS = TRUE
> # VGA Driver
> #
> INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
> -
> - INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
> + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>
> INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index b99cda5..0d19909 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -627,6 +627,7 @@
> Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
> Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
> Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
> + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
> Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
>
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 9a61c52..9edc679 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -294,7 +294,7 @@ READ_LOCK_STATUS = TRUE
> #
> INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
> INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
> - INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
> + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>
> INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
> diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
> new file mode 100644
> index 0000000..d57905e
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
> @@ -0,0 +1,89 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +
> +#include "SasPlatform.h"
> +#include <Library/OemDevicePath.h>
> +#include <Library/DevicePathLib.h>
> +
> +#define SAS0BusAddr 0xc3000000
> +#define SAS1BusAddr 0xa2000000
> +#define SAS2BusAddr 0xa3000000
> +
> +#define SAS0ResetAddr 0xc0000000
> +#define SAS1ResetAddr 0xa0000000
> +#define SAS2ResetAddr 0xa0000000
> +
STATIC
> +HISI_PLATFORM_SAS_PROTOCOL mSasPlatformProtocol[] = {
> + {
> + 0,
> + FALSE,
> + SAS0BusAddr,
> + SAS0ResetAddr
> + },
> + {
> + 1,
> + TRUE,
> + SAS1BusAddr,
> + SAS1ResetAddr
> + },
> + {
> + 2,
> + FALSE,
> + SAS2BusAddr,
> + SAS2ResetAddr
> + }
> +};
> +#define SAS_CONTROLLER_NUMBER sizeof (mSasPlatformProtocol) / sizeof (HISI_PLATFORM_SAS_PROTOCOL)
> +
Use ARRAY_SIZE
> +EFI_STATUS
> +EFIAPI
> +SasPlatformInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + UINTN Loop;
> + SAS_PLATFORM_INSTANCE *PrivateData;
> + EFI_STATUS Status;
> +
> + for (Loop = 0; Loop < SAS_CONTROLLER_NUMBER; Loop++) {
> + if (mSasPlatformProtocol[Loop].Enable != TRUE) {
> + continue;
> + }
> + PrivateData = AllocateZeroPool (sizeof(SAS_PLATFORM_INSTANCE));
> + if (PrivateData == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + PrivateData->SasPlatformProtocol = mSasPlatformProtocol[Loop];
> +
> + Status = gBS->InstallMultipleProtocolInterfaces (
> + &PrivateData->Handle,
> + &gHisiPlatformSasProtocolGuid,
> + &PrivateData->SasPlatformProtocol,
> + NULL
indentation
> + );
> + if (EFI_ERROR (Status)) {
> + FreePool (PrivateData);
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status));
> + return Status;
Don't return error from a loop like this: the driver will unload but
the protocols installed in prior iterations will still remain
> + }
> + }
> +
> + DEBUG ((DEBUG_INFO, "sas platform init dirver Ok!!!\n"));
driver not dirver
> + return EFI_SUCCESS;
> +}
> +
> diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
> new file mode 100644
> index 0000000..a3e99dd
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
> @@ -0,0 +1,49 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +
> +
> +#ifndef _SAS_PLATFORM_H_
> +#define _SAS_PLATFORM_H_
> +
> +#include <Uefi.h>
> +#include <PiDxe.h>
> +#include <Guid/EventGroup.h>
> +#include <Library/DebugLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/UefiDriverEntryPoint.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/BaseLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/ArmLib.h>
> +#include <Library/DxeServicesTableLib.h>
> +
> +#include <Library/ReportStatusCodeLib.h>
> +#include <Protocol/PlatformSasProtocol.h>
> +
> +
> +
> +typedef struct {
> + UINTN Signature;
> + EFI_HANDLE Handle;
> + HISI_PLATFORM_SAS_PROTOCOL SasPlatformProtocol;
> +} SAS_PLATFORM_INSTANCE;
> +
> +
> +#endif // _SAS_PLATFORM_H_
> +
Just move all of this in to the .c file
> diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> new file mode 100644
> index 0000000..6237f50
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> @@ -0,0 +1,61 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SasPlatform
> + FILE_GUID = 67B9CDE8-257D-44f9-9DE7-39DE866E3539
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = SasPlatformInitialize
> +
> +[Sources]
> + SasPlatform.h
> + SasPlatform.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
Does your code use ArmPkg?
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[FeaturePcd]
> +
Remove empty sections
> +
> +[LibraryClasses]
> + ArmLib
> + BaseLib
> + BaseMemoryLib
> + CacheMaintenanceLib
> + DebugLib
> + DxeServicesTableLib
> + IoLib
> + MemoryAllocationLib
> + PcdLib
> + PlatformSysCtrlLib
> + ReportStatusCodeLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> + UefiLib
> +
Does your code really use all of these?
> +[Guids]
> + gEfiHisiSocControllerGuid
> +
> +[Protocols]
> + gHisiPlatformSasProtocolGuid
> + gEfiDevicePathProtocolGuid
> +
> +[Depex]
> + TRUE
> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
> index 81ba3be..9fa94fd 100644
> --- a/Silicon/Hisilicon/HisiPkg.dec
> +++ b/Silicon/Hisilicon/HisiPkg.dec
> @@ -37,12 +37,14 @@
> gBmcInfoProtocolGuid = {0x43fa6ffd, 0x35e4, 0x479e, {0xab, 0xec, 0x5, 0x3, 0xf6, 0x48, 0x0, 0xf5}}
> gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}}
> gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
> + gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
>
> [Guids]
> gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
>
> gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 0x56, 0xda, 0x91, 0xc0, 0x7f}}
> gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 0xe1, 0x42, 0x12, 0xbf}}
> + gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}}
>
> [LibraryClasses]
> PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h
> diff --git a/Silicon/Hisilicon/Include/Library/OemDevicePath.h b/Silicon/Hisilicon/Include/Library/OemDevicePath.h
> new file mode 100644
> index 0000000..ec8cd02
> --- /dev/null
> +++ b/Silicon/Hisilicon/Include/Library/OemDevicePath.h
> @@ -0,0 +1,54 @@
> +/** @file
> +*
> +* Copyright (c) 2015 - 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2015 - 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef _OEM_DEVICE_PATH_H_
> +#define _OEM_DEVICE_PATH_H_
> +#include <Protocol/DevicePath.h>
> +
> +typedef enum
> +{
> + C_NIC = 1,
> + C_SATA = 2,
> + C_SAS = 3,
> + C_USB = 4,
> +} CONTROLLER_TYPE;
> +
> +typedef struct{
> + VENDOR_DEVICE_PATH Vender;
> + UINT8 ControllerType;
> + UINT8 Socket;
> + UINT8 Port;
> +} EXT_VENDOR_DEVICE_PATH;
> +
> +typedef struct{
> + UINT16 BootIndex;
> + UINT16 Port;
> +}SATADES;
Space after }
> +
> +typedef struct{
> + UINT16 BootIndex;
> + UINT16 ParentPortNumber;
> + UINT16 InterfaceNumber;
> +}USBDES;
> +
and here
> +typedef struct{
> + UINT16 BootIndex;
> + UINT16 Port;
> +}PXEDES;
> +
and here
> +extern EFI_GUID gEfiHisiSocControllerGuid;
You don't need this
> +
> +#endif
> +
> diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
> index 1e1892b..dbd215a 100644
> --- a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
> +++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
> @@ -34,4 +34,15 @@ struct _PLATFORM_SAS_PROTOCOL {
> SAS_INIT Init;
> };
>
Please create a separate header file for the below
> +typedef struct _HISI_PLATFORM_SAS_PROTOCOL HISI_PLATFORM_SAS_PROTOCOL;
> +
> +struct _HISI_PLATFORM_SAS_PROTOCOL {
> + UINT32 ControllerId;
> + BOOLEAN Enable;
> + UINT64 BaseAddr;
> + UINT64 ResetAddr;
> +};
> +
> +extern EFI_GUID gHisiPlatformSasProtocolGuid;
> +
> #endif
> --
> 1.9.1
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code
2018-01-18 15:01 ` [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform " Ming Huang
@ 2018-01-20 11:00 ` Ard Biesheuvel
2018-01-23 11:01 ` Huangming (Mark)
2018-01-23 14:07 ` Leif Lindholm
1 sibling, 1 reply; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:00 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> 1. Open driver source code.
> 2. This code includes network sequence correction
> solution.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +
> Platform/Hisilicon/D03/D03.fdf | 2 +-
> Platform/Hisilicon/D05/D05.dsc | 2 +
> Platform/Hisilicon/D05/D05.fdf | 3 +-
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 ++++++++++++++++++++
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 +++++++++
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++++++++++++
> Silicon/Hisilicon/HisiPkg.dec | 1 +
> Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +++++++
> 9 files changed, 241 insertions(+), 3 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 370e17b..b22afe3 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -404,6 +404,8 @@
>
> Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf
>
> + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> +
> MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index 6e43228..e93985b 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -242,7 +242,7 @@ READ_LOCK_STATUS = TRUE
> #Network
> #
>
> - INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
> + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
>
> INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 0d19909..4e19de2 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -541,6 +541,8 @@
>
> Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
>
> + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> +
> MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
> MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 9edc679..9873677 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -247,8 +247,7 @@ READ_LOCK_STATUS = TRUE
> #
> #Network
> #
> -
> - INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
> + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
>
> INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
> diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
> new file mode 100644
> index 0000000..385c04a
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
> @@ -0,0 +1,99 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +
> +#include "SnpPlatform.h"
> +
STATIC
> + HISI_PLATFORM_SNP_PROTOCOL mSnpPlatformProtocol[] = {
> + {
> + 4,
> + 1
> + },
> + {
> + 5,
> + 1
> + },
> + {
> + 2,
> + 0
> + },
> + {
> + 3,
> + 0
> + },
> + {
> + 0,
> + 1
> + },
> + {
> + 1,
> + 1
> + },
> + {
> + 6,
> + 0
> + },
> + {
> + 7,
> + 0
> + }
> +};
> +
> +#define SNP_CONTROLLER_NUMBER sizeof (mSnpPlatformProtocol) / sizeof (HISI_PLATFORM_SNP_PROTOCOL)
> +
ARRAY_SIZE()
> +EFI_STATUS
> +EFIAPI
> +SnpPlatformInitialize (
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + UINTN Loop;
> + SNP_PLATFORM_INSTANCE *PrivateData;
> + EFI_STATUS Status;
> +
> + for (Loop = 0; Loop < SNP_CONTROLLER_NUMBER; Loop++) {
> + if(mSnpPlatformProtocol[Loop].Enable != 1) {
> + continue;
> + }
> + PrivateData = AllocateZeroPool (sizeof(SNP_PLATFORM_INSTANCE));
> + if (PrivateData == NULL) {
> + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize error 1\n"));
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> +
> + PrivateData->SnpPlatformProtocol = mSnpPlatformProtocol[Loop];
> +
> + //
> + // Install the snp protocol, device path protocol
> + //
> + Status = gBS->InstallMultipleProtocolInterfaces (
> + &PrivateData->Handle,
> + &gHisiSnpPlatformProtocolGuid,
> + &PrivateData->SnpPlatformProtocol,
> + NULL
> + );
> + if (EFI_ERROR (Status)) {
> + FreePool (PrivateData);
> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status));
Line length
And don't return an error from a loop like this: see the comment in
reply to the previous patch
> + return Status;
> + }
> + }
> +
> + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize succes!\n"));
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
> new file mode 100644
> index 0000000..031c8d3
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
> @@ -0,0 +1,43 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +
> +
> +#ifndef _SNP_PLATFORM_H_
> +#define _SNP_PLATFORM_H_
> +
> +#include <Uefi.h>
> +#include <PiDxe.h>
> +#include <Protocol/SnpPlatformProtocol.h>
> +#include <Guid/EventGroup.h>
> +#include <Library/ArmLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/BaseLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DxeServicesTableLib.h>
> +#include <Library/IoLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/ReportStatusCodeLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiDriverEntryPoint.h>
> +#include <Library/UefiLib.h>
> +
> +typedef struct {
> + UINTN Signature;
> + EFI_HANDLE Handle;
> + HISI_PLATFORM_SNP_PROTOCOL SnpPlatformProtocol;
> +} SNP_PLATFORM_INSTANCE;
> +#endif
You can move all of this into the .c file
> diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> new file mode 100644
> index 0000000..804224b
> --- /dev/null
> +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> @@ -0,0 +1,60 @@
> +#/** @file
> +#
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010019
> + BASE_NAME = SnpPlatform
> + FILE_GUID = 102D8FC9-20A4-42eb-AC14-1C98BA5B17A8
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = SnpPlatformInitialize
> +
> +[Sources]
> + SnpPlatform.h
> + SnpPlatform.c
> +
> +[Packages]
> + ArmPkg/ArmPkg.dec
??
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[FeaturePcd]
> +
> +
> +[LibraryClasses]
> + ArmLib
> + BaseLib
> + BaseMemoryLib
> + CacheMaintenanceLib
> + DebugLib
> + DxeServicesTableLib
> + IoLib
> + MemoryAllocationLib
> + PlatformSysCtrlLib
> + PcdLib
> + ReportStatusCodeLib
> + UefiLib
> + UefiBootServicesTableLib
> + UefiDriverEntryPoint
> +
Same question as before: are you really using all of these?
> +[Guids]
> +
> +[Protocols]
> + gHisiSnpPlatformProtocolGuid
> +
> +[Depex]
> + TRUE
> +
> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
> index 9fa94fd..2bb6518 100644
> --- a/Silicon/Hisilicon/HisiPkg.dec
> +++ b/Silicon/Hisilicon/HisiPkg.dec
> @@ -38,6 +38,7 @@
> gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}}
> gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
> gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
> + gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
>
> [Guids]
> gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
> diff --git a/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
> new file mode 100644
> index 0000000..0d9f0b4
> --- /dev/null
> +++ b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
> @@ -0,0 +1,32 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef _SNP_PLATFORM_PROTOCOL_H_
> +#define _SNP_PLATFORM_PROTOCOL_H_
> +#define HISI_SNP_PLATFORM_PROTOCOL_GUID \
> + { \
> + 0x81321f27, 0xff58, 0x4a1d, 0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f \
> + }
> +
> +typedef struct _HISI_PLATFORM_SNP_PROTOCOL HISI_PLATFORM_SNP_PROTOCOL;
> +
> +struct _HISI_PLATFORM_SNP_PROTOCOL {
> + UINT32 ControllerId;
> + UINT32 Enable;
> +};
> +
> +extern EFI_GUID gHisiSnpPlatformProtocolGuid;
> +
> +#endif
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4
2018-01-18 15:01 ` [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 Ming Huang
@ 2018-01-20 11:01 ` Ard Biesheuvel
2018-01-23 14:15 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:01 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2,
> indicator to obtain the processor family from the Processor Family 2 field.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> index 61473e8..c9903ba 100644
> --- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> +++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> @@ -125,7 +125,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = {
> },
> 1, //Socket
> CentralProcessor, //ProcessorType
> - ProcessorFamilyOther, //ProcessorFamily
> + ProcessorFamilyIndicatorFamily2, //ProcessorFamily
> 2, //ProcessorManufacture
> { //ProcessorId
> { //Signature
> @@ -172,7 +172,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = {
> },
> 1, //Socket
> CentralProcessor, //ProcessorType
> - ProcessorFamilyOther, //ProcessorFamily
> + ProcessorFamilyIndicatorFamily2, //ProcessorFamily
> 2, //ProcessorManufacture
> { //ProcessorId
> { //Signature
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM
2018-01-18 15:01 ` [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM Ming Huang
@ 2018-01-20 11:04 ` Ard Biesheuvel
0 siblings, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:04 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23, Yan Zhang
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> From: Yan Zhang <zhangyan81@huawei.com>
>
> In order to replace command line parameter pcie_aspm=off, BIOS needs to
> disable Pcie Aspm support during Pcie initilization.
> D03 and D05 do not support PCIe ASPM, so we disable it in BIOS.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: Yan Zhang <zhangyan81@huawei.com>
> ---
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++++++++++++++++++++
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 +
> Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 +
> 3 files changed, 75 insertions(+)
>
> diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
> index f420c91..ca3b2f8 100644
> --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
> +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c
> @@ -1033,6 +1033,74 @@ DisableRcOptionRom (
> return;
> }
>
STATIC
> +VOID
> +PcieDbiCs2Enable(
Space before (
> + IN UINT32 HostBridgeNum,
> + IN UINT32 Port,
> + IN BOOLEAN Val
> + )
> +{
> + UINT32 RegVal;
> + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21, RegVal);
Line length
> + if (Val) {
> + RegVal = RegVal | BIT2;
> + /*BIT2: DBI Chip Select indicator. 0 indicates CS, 1 indicates CS2.*/
Space after /*
> + } else {
> + RegVal = RegVal & (~BIT2);
> + }
> + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21, RegVal);
> +}
> +
STATIC
> +BOOLEAN
> +PcieDBIReadOnlyWriteEnable(
Space before (
> + IN UINT32 HostBridgeNum,
> + IN UINT32 Port
> + )
> +{
> + UINT32 Val;
> + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, Val);
> + if (Val == 0x1) {
> + return TRUE;
> + } else {
> + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, 0x1);
> + /*Delay 10us to make sure the PCIE device have enouph time to response. */
Space after /*
> + MicroSecondDelay(10);
> + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_DBI_READ_ONLY_WRITE_ENABLE, Val);
Line length
> + if (Val == 0x1) {
> + return TRUE;
> + }
> + }
> + DEBUG ((DEBUG_ERROR,"PcieDBIReadOnlyWriteEnable Fail!!!\n"));
> + return FALSE;
> +}
STATIC
> +VOID
> +SwitchPcieASPMSupport (
> + IN UINT32 HostBridgeNum,
> + IN UINT32 Port,
> + IN UINT8 Val
> + )
> +{
> + PCIE_EP_PCIE_CAP3_U pcie_cap3;
PcieCap3
> +
> + if (Port >= PCIE_MAX_ROOTBRIDGE) {
> + DEBUG ((DEBUG_ERROR, "Port is not valid\n"));
> + return;
> + }
> + if (!PcieDBIReadOnlyWriteEnable (HostBridgeNum, Port)) {
> + DEBUG ((DEBUG_INFO, "PcieDeEmphasisLevelSet ReadOnly Reg do not Enable!!!\n"));
PcieDeEmphasisLevelSet ?
> + return;
> + }
> + PcieDbiCs2Enable (HostBridgeNum, Port, FALSE);
> +
> + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32);
> + pcie_cap3.Bits.active_state_power_management = Val;
> + RegWrite (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32);
> + RegRead (PCIE_APB_SLAVE_BASE_1610[HostBridgeNum][Port] + PCIE_EP_PCIE_CAP3_REG, pcie_cap3.UInt32);
> + DEBUG ((DEBUG_INFO, "ASPI active state power management: %d\n", pcie_cap3.Bits.active_state_power_management));
> +
Line length
> + PcieDbiCs2Enable (HostBridgeNum, Port, TRUE);
> +}
> +
> EFI_STATUS
> EFIAPI
> PciePortInit (
> @@ -1090,6 +1158,9 @@ PciePortInit (
> /* disable link up interrupt */
> (VOID)PcieMaskLinkUpInit(soctype, HostBridgeNum, PortIndex);
>
> + //disable ASPM
Please use comment style consistent with the other code
/* disable ASPM */
> + SwitchPcieASPMSupport (HostBridgeNum, PortIndex, PCIE_ASPM_DISABLE);
> +
> /* Pcie Equalization*/
> (VOID)PcieEqualization(soctype ,HostBridgeNum, PortIndex);
>
> diff --git a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
> index 9a0f636..e96c53c 100644
> --- a/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
> +++ b/Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h
> @@ -77,6 +77,8 @@
> #define RegWrite(addr,data) MmioWrite32((addr), (data))
> #define RegRead(addr,data) ((data) = MmioRead32 (addr))
>
> +#define PCIE_ASPM_DISABLE 0x0
> +#define PCIE_ASPM_ENABLE 0x1
>
> typedef struct tagPcieDebugInfo
> {
> diff --git a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
> index bf57652..c8b9781 100644
> --- a/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
> +++ b/Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h
> @@ -135,6 +135,7 @@
> #define PCIE_EEP_PORTLOGIC53_REG (0x888)
> #define PCIE_EEP_GEN3_CONTRL_REG (0x890)
> #define PCIE_EEP_PIPE_LOOPBACK_REG (0x8B8)
> +#define PCIE_DBI_READ_ONLY_WRITE_ENABLE (0x8BC)
> #define PCIE_EEP_PORTLOGIC54_REG (0x900)
> #define PCIE_EEP_PORTLOGIC55_REG (0x904)
> #define PCIE_EEP_PORTLOGIC56_REG (0x908)
> @@ -12556,6 +12557,7 @@ typedef union tagPortlogic93
> #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY5_REG (PCIE_SUBCTRL_BASE + 0x1018)
> #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY6_REG (PCIE_SUBCTRL_BASE + 0x101C)
> #define PCIE_SUBCTRL_SC_DISPATCH_DAW_ARRAY7_REG (PCIE_SUBCTRL_BASE + 0x1020)
> +#define PCIE_SUBCTRL_SC_PCIE_SYS_CTRL21 (PCIE_SUBCTRL_BASE + 0x1024)
> #define PCIE_SUBCTRL_SC_DISPATCH_RETRY_CONTROL_REG (PCIE_SUBCTRL_BASE + 0x1030)
> #define PCIE_SUBCTRL_SC_DISPATCH_INTMASK_REG (PCIE_SUBCTRL_BASE + 0x1100)
> #define PCIE_SUBCTRL_SC_DISPATCH_RAWINT_REG (PCIE_SUBCTRL_BASE + 0x1104)
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
2018-01-18 15:01 ` [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver Ming Huang
@ 2018-01-20 11:05 ` Ard Biesheuvel
2018-01-23 14:21 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:05 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23, GongChengYa
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> In SCT test,we find SP805 watchdog driver can't reset when timeout
> so we use another driver in MdeModulePkg.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: GongChengYa <gongchengya1@huawei.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 2 +-
> Platform/Hisilicon/D05/D05.fdf | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 4e19de2..79890ef 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -515,7 +515,7 @@
>
> ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
> #
> #ACPI
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 9873677..d05e227 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -193,7 +193,7 @@ READ_LOCK_STATUS = TRUE
> INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
>
> #
> # FAT filesystem + GPT/MBR partitioning
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 10/14] Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
2018-01-18 15:01 ` [PATCH edk2-platforms v1 10/14] Hisilicon/D03: " Ming Huang
@ 2018-01-20 11:05 ` Ard Biesheuvel
2018-01-23 14:21 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:05 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23, GongChengYa
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> In SCT test,we find SP805 watchdog driver can't reset when timeout
> so we use another driver in MdeModulePkg.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: GongChengYa <gongchengya1@huawei.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +-
> Platform/Hisilicon/D03/D03.fdf | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index b22afe3..88c08dd 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -379,7 +379,7 @@
>
> ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
> #
> #ACPI
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index e93985b..5b7bb1d 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -189,7 +189,7 @@ READ_LOCK_STATUS = TRUE
> INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
>
> #
> # FAT filesystem + GPT/MBR partitioning
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM
2018-01-18 15:01 ` [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM Ming Huang
@ 2018-01-20 11:06 ` Ard Biesheuvel
0 siblings, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:06 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> Add ITS affinity structure in SRAT.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 ++++++++++
> Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +++++++++-
> 2 files changed, 19 insertions(+), 1 deletion(-)
>
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
> index b448a29..8ea0c4b 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc
> @@ -121,6 +121,16 @@ EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE Srat = {
> EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003E,0x00000001,0x00000000), //GICC Affinity Processor 62
> EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000003,0x0000003F,0x00000001,0x00000000) //GICC Affinity Processor 63
> },
> + {
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000000),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000001),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000000, 0x00000002),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000001, 0x00000003),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000004),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000005),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000002, 0x00000006),
> + EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT(0x00000003, 0x00000007)
> + },
> };
>
> //
> diff --git a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> index 60f9925..fd05a3b 100644
> --- a/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> +++ b/Silicon/Hisilicon/Include/Library/AcpiNextLib.h
> @@ -39,6 +39,13 @@
> ACPIProcessorUID, Flags, ClockDomain \
> }
>
> +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_INIT( \
> + ProximityDomain, ItsId) \
> + { \
> + 4, sizeof (EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE), ProximityDomain, \
> + {EFI_ACPI_RESERVED_BYTE, EFI_ACPI_RESERVED_BYTE}, ItsId \
> + }
> +
> #define EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE_INIT( \
> ProximityDomain, AddressBaseLow, AddressBaseHigh, LengthLow, LengthHigh, Flags) \
> { \
> @@ -70,12 +77,13 @@
> //
> #define EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT 64
> #define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT 10
> -
> +#define EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT 8
>
> typedef struct {
> EFI_ACPI_6_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header;
> EFI_ACPI_6_0_MEMORY_AFFINITY_STRUCTURE Memory[EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT];
> EFI_ACPI_6_0_GICC_AFFINITY_STRUCTURE Gicc[EFI_ACPI_PROCESSOR_LOCAL_GICC_AFFINITY_STRUCTURE_COUNT];
> + EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE Its[EFI_ACPI_6_2_ITS_AFFINITY_STRUCTURE_COUNT];
> } EFI_ACPI_STATIC_RESOURCE_AFFINITY_TABLE;
>
> #pragma pack()
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
2018-01-18 15:01 ` [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM Ming Huang
@ 2018-01-20 11:08 ` Ard Biesheuvel
0 siblings, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:08 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> Add PXM method for Pcie device, HNS device and SAS device.
> Add STA method for HNS.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: hensonwang <wanghuiqiang@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 ++++++
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 ++++++++++++++++++--
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +++++++++--
> 3 files changed, 57 insertions(+), 5 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
> index 11c28ba..7aa04af 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl
> @@ -233,6 +233,15 @@ Scope(_SB)
> }
> })
>
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x00)
> + }
> + Method (_STA, 0, NotSerialized)
> + {
> + Return(0x0F)
> + }
> +
> //reset XGE port
> //Arg0 : XGE port index in dsaf
> //Arg1 : 0 reset, 1 cancle reset
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
> index 55c7f50..122e4f0 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl
> @@ -141,7 +141,10 @@ Scope(_SB)
> {
> Return (0xf)
> }
> -
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x00)
> + }
> } // Device(PCI2)
>
> Device (RES2)
> @@ -240,7 +243,10 @@ Scope(_SB)
> {
> Return (RBYV())
> }
> -
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x01)
> + }
> } // Device(PCI4)
> Device (RES4)
> {
> @@ -338,6 +344,10 @@ Scope(_SB)
> {
> Return (RBYV())
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x01)
> + }
> } // Device(PCI5)
> Device (RES5)
> {
> @@ -435,6 +445,10 @@ Scope(_SB)
> {
> Return (RBYV())
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x01)
> + }
> } // Device(PCI6)
> Device (RES6)
> {
> @@ -531,6 +545,10 @@ Scope(_SB)
> {
> Return (RBYV())
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x01)
> + }
> } // Device(PCI7)
> Device (RES7)
> {
> @@ -690,6 +708,10 @@ Scope(_SB)
> {
> Return (0xf)
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x02)
> + }
> } // Device(PCIa)
> Device (RESa)
> {
> @@ -810,6 +832,10 @@ Scope(_SB)
> {
> Return (RBYV())
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x03)
> + }
> } // Device(PCIc)
>
> Device (RESc)
> @@ -907,6 +933,10 @@ Scope(_SB)
> {
> Return (RBYV())
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x03)
> + }
> } // Device(PCId)
> Device (RESd)
> {
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
> index 6455130..d5b7e2f 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl
> @@ -88,7 +88,10 @@ Scope(_SB)
> Store(0x7ffff, CLK)
> Sleep(1)
> }
> -
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x00)
> + }
> Method (_STA, 0, NotSerialized)
> {
> Return (0x0)
> @@ -169,8 +172,15 @@ Scope(_SB)
> Store(0x7ffff, CLK)
> Sleep(1)
> }
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x00)
> + }
> + Method (_STA, 0, NotSerialized)
> + {
> + Return(0x0F)
> + }
> }
> -
> Device(SAS2) {
> Name(_HID, "HISI0162")
> Name(_CCA, 1)
> @@ -244,7 +254,10 @@ Scope(_SB)
> Store(0x7ffff, CLK)
> Sleep(1)
> }
> -
> + Method (_PXM, 0, NotSerialized)
> + {
> + Return(0x00)
> + }
> Method (_STA, 0, NotSerialized)
> {
> Return (0x0)
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-18 15:01 ` [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib Ming Huang
@ 2018-01-20 11:11 ` Ard Biesheuvel
2018-01-23 10:23 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:11 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> OsBootLib can create OS option after upgrade firmware.
>
Can you add a bit more explanation why you need this?
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 1 +
> Platform/Hisilicon/D05/D05.dsc | 1 +
> Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++
> Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 +++++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 +++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 ++++++++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 6 +
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 +
> 9 files changed, 970 insertions(+)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 88c08dd..6f1164e 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -47,6 +47,7 @@
> UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
> UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
> IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
> + OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
>
>
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 79890ef..52ffad5 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -55,6 +55,7 @@
> FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> BootLogoLib|MdeModulePkg/Library/BootLogoLib/BootLogoLib.inf
> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> + OsBootLib|Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
>
> !if $(NETWORK_IP6_ENABLE) == TRUE
> TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
> diff --git a/Silicon/Hisilicon/Include/Library/OsBootLib.h b/Silicon/Hisilicon/Include/Library/OsBootLib.h
> new file mode 100644
> index 0000000..f5cbc4a
> --- /dev/null
> +++ b/Silicon/Hisilicon/Include/Library/OsBootLib.h
> @@ -0,0 +1,47 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef _OS_BOOT_LIB_H_
> +#define _OS_BOOT_LIB_H_
> +
> +
> +/**
> + Remove invalid OS boot options, and then add new ones.
> +
> +*/
> +EFI_STATUS
> +AdjustOsBootOrder (
> + VOID
> + );
> +
> +/**
> + Try to find UEFI OSs and create the boot options which haven't been listed in BootOrder.
> +
> +*/
> +EFI_STATUS
> +CreateOsBootOptions (
> + VOID
> + );
> +
> +/**
> + Remove UEFI OS boot options when it is disappeared in system.
> +
> +*/
> +EFI_STATUS
> +RemoveInvalidOsBootOptions (
> + VOID
> + );
> +
> +#endif
> diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
> new file mode 100644
> index 0000000..1991471
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
> @@ -0,0 +1,124 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#ifndef _OS_BOOT_H_
> +#define _OS_BOOT_H_
> +
> +#include <PiDxe.h>
> +#include <PlatformArch.h>
> +#include <Uefi.h>
> +#include <Guid/FileInfo.h>
> +#include <Guid/GlobalVariable.h>
> +#include <IndustryStandard/PeImage.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/BaseLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/OsBootLib.h>
> +#include <Library/PrintLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/UefiRuntimeServicesTableLib.h>
> +#include <Library/UefiBootManagerLib.h>
> +
> +#include <Protocol/BlockIo.h>
> +#include <Protocol/DevicePath.h>
> +#include <Protocol/DevicePathFromText.h>
> +#include <Protocol/DevicePathToText.h>
> +#include <Protocol/FirmwareVolume2.h>
> +#include <Protocol/SimpleFileSystem.h>
> +
> +
> +typedef struct {
> + CHAR16 *FilePathString;
> + CHAR16 *Description;
> + }UEFI_OS_BOOT_FILE;
> +
> +/**
> + Check same boot option by device path.
> +
> +*/
> +BOOLEAN
> +BeHaveSameBootOptionByDP (
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath,
> + CHAR16 *FileName
> + );
> +
> +/**
> + Remove UEFI OS boot options when it is disappeared in system.
> +
> +*/
> +EFI_STATUS
> +RemoveInvalidOsBootOptions (
> + VOID
> + );
> +
> +
> +/**
> + Check Os Boot Option if exist in current system.
> +
> +*/
> +BOOLEAN
> +BeInvalidOsBootOption (
> + EFI_DEVICE_PATH_PROTOCOL *OptionDp
> + );
> +
> +/**
> + Get the headers (dos, image, optional header) from an image
> +
> + @param Device SimpleFileSystem device handle
> + @param FileName File name for the image
> + @param DosHeader Pointer to dos header
> + @param Hdr The buffer in which to return the PE32, PE32+, or TE header.
> +
> + @retval EFI_SUCCESS Successfully get the machine type.
> + @retval EFI_NOT_FOUND The file is not found.
> + @retval EFI_LOAD_ERROR File is not a valid image file.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +OsBootGetImageHeader (
> + IN EFI_HANDLE Device,
> + IN CHAR16 *FileName,
> + OUT EFI_IMAGE_DOS_HEADER *DosHeader,
> + OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr
> + );
> +
> +UINTN
> +GetOptionPositionWithoutGpt (
> + VOID
> + );
> +
> +VOID
> +PrintDevicePath (
> + CHAR16 *PreStr,
> + EFI_DEVICE_PATH_PROTOCOL *Path
> + );
> +
> +VOID
> +RemoveSuperfluousOption (
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions,
> + UINT16 *OptionFlags,
> + UINTN BootOptionCount
> + );
> +
> +BOOLEAN
> +IsOptionAddedByOsBootLib (
> + UINT16 *OptionDescription
> + );
> +
> +#endif
> diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
> new file mode 100644
> index 0000000..29b6b62
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
> @@ -0,0 +1,217 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "OsBoot.h"
> +
> +UEFI_OS_BOOT_FILE mUefiOsBootFiles[] = {
> + {EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, L"Uefi Default Boot"},
> + {L"\\BOOT\\EFI\\EFI\\CENTOS\\grubaa64.efi", L"Uefi CENTOS Boot"},
> + {L"\\EFI\\centos\\grubaa64.efi", L"Uefi CentOS Grub Boot"},
> + {L"\\EFI\\debian\\grubaa64.efi", L"Uefi Debian Grub Boot"},
> + {L"\\EFI\\GRUB2\\GRUBAA64.EFI", L"Hisilicon Linux Boot"},
> + {L"\\EFI\\Microsoft\\Boot\\bootmgfw.efi", L"Uefi Windows Boot"},
> + {L"\\EFI\\redhat\\grub.efi", L"Uefi Redhat Boot"},
> + {L"\\EFI\\SuSE\\elilo.efi", L"Uefi SuSE Boot"},
> + {L"\\EFI\\ubuntu\\grubaa64.efi", L"Uefi Ubuntu Grub Boot"},
> + {L"\\EFI\\ubuntu\\shimx64.efi", L"Uefi Ubuntu Shimx64 Boot"},
> + {L"\\EFI\\ubuntu\\grubx64.efi", L"Uefi Ubuntu Grubx64 Boot"},
> + {L"\\EFI\\ubuntu\\shim.efi", L"Uefi Ubuntu Shim Boot"},
> + {L"\\EFI\\ubuntu\\grub.efi", L"Uefi Ubuntu Grub Boot"},
> + {L"\\EFI\\fedora\\shim.efi", L"Uefi Fedora Shim Boot"}
> +};
> +
> +BOOLEAN
> +IsOptionAddedByOsBootLib (
> + UINT16 *OptionDescription
> + )
> +{
> + UINTN Index;
> +
> + for (Index = 0; Index < (sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE)); Index++) {
> + if (StrCmp (mUefiOsBootFiles[Index].Description, OptionDescription) == 0) {
> + return TRUE;
> + }
> + }
> +
> + return FALSE;
> +}
> +
> +/**
> + Remove invalid OS boot options, and then add new ones.
> +
> +*/
> +EFI_STATUS
> +AdjustOsBootOrder (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = RemoveInvalidOsBootOptions ();
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + Status = CreateOsBootOptions ();
> + return Status;
> +}
> +
> +
> +/**
> + Remove UEFI OS boot options when it is disappeared in system.
> +
> +*/
> +EFI_STATUS
> +RemoveInvalidOsBootOptions (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + UINTN Index;
> + UINT16 *OptionDelFlags;
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
> + UINTN BootOptionCount;
> +
> + BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);
> + OptionDelFlags = AllocateZeroPool (BootOptionCount * sizeof(UINT16));
> + if (OptionDelFlags == NULL) {
> + goto exit;
> + }
> +
> + for (Index = 0; Index < BootOptionCount; Index++) {
> + if (OptionDelFlags[Index] == 0) {
> + if (BeInvalidOsBootOption (BootOptions[Index].FilePath)) {
> + Status = EfiBootManagerDeleteLoadOptionVariable (BootOptions[Index].OptionNumber, LoadOptionTypeBoot);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status));
> + continue;
> + }
> + PrintDevicePath (L"Del Option,", BootOptions[Index].FilePath);
> + } else {
> + RemoveSuperfluousOption (&BootOptions[Index], OptionDelFlags, BootOptionCount - Index);
> + }
> + }
> + }
> +
> + exit:
> + if (OptionDelFlags != NULL) {
> + FreePool (OptionDelFlags);
> + }
> + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
> +
> + return EFI_SUCCESS;
> +}
> +
> +
> +/**
> + Try to find UEFI OSs and create the boot options which haven't been listed in BootOrder.
> +
> +*/
> +EFI_STATUS
> +CreateOsBootOptions (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE *FileSystemHandles;
> + UINTN NumberFileSystemHandles;
> + UINTN Index, Count;
> + EFI_DEVICE_PATH_PROTOCOL *OsFileDP;
> + EFI_BLOCK_IO_PROTOCOL *BlkIo;
> + UINTN MaxFiles;
> + EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData;
> + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
> + EFI_IMAGE_DOS_HEADER DosHeader;
> + EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
> +
> + //
> + //Look for file system to find default Os boot load.
> + //
> + Status = gBS->LocateHandleBuffer (
> + ByProtocol,
> + &gEfiSimpleFileSystemProtocolGuid,
> + NULL,
> + &NumberFileSystemHandles,
> + &FileSystemHandles
> + );
> + if (EFI_ERROR (Status)) {
> + return Status;
> + }
> +
> + MaxFiles = sizeof (mUefiOsBootFiles) / sizeof (UEFI_OS_BOOT_FILE);
> + for (Index = 0; Index < NumberFileSystemHandles; Index++) {
> + Status = gBS->HandleProtocol (
> + FileSystemHandles[Index],
> + &gEfiBlockIoProtocolGuid,
> + (VOID **) &BlkIo
> + );
> + if (EFI_ERROR (Status)) {
> + continue;
> + }
> +
> + Hdr.Union = &HdrData;
> + for (Count = 0; Count < MaxFiles; Count++) {
> + //
> + //Read Boot File Path to check validation.
> + //
> + Status = OsBootGetImageHeader (
> + FileSystemHandles[Index],
> + mUefiOsBootFiles[Count].FilePathString,
> + &DosHeader,
> + Hdr
> + );
> + if (!EFI_ERROR (Status) &&
> + EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) &&
> + Hdr.Pe32->OptionalHeader.Subsystem == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION) {
> +
> + OsFileDP = NULL;
> + OsFileDP = FileDevicePath (FileSystemHandles[Index], mUefiOsBootFiles[Count].FilePathString);
> + PrintDevicePath (L"Exist", OsFileDP);
> + if (!BeHaveSameBootOptionByDP (OsFileDP, mUefiOsBootFiles[Count].FilePathString)) {
> + //
> + // Create new BootOption if it is not present.
> + //
> + DEBUG ((DEBUG_INFO, "CreateOsBootOptions (), Make New Boot Option :%s.\n", mUefiOsBootFiles[Count].Description));
> + Status = EfiBootManagerInitializeLoadOption (
> + &NewOption,
> + LoadOptionNumberUnassigned,
> + LoadOptionTypeBoot,
> + LOAD_OPTION_ACTIVE,
> + mUefiOsBootFiles[Count].Description,
> + OsFileDP,
> + NULL,
> + 0
> + );
> + ASSERT_EFI_ERROR (Status);
> + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, GetOptionPositionWithoutGpt ());
> + ASSERT_EFI_ERROR (Status);
> + EfiBootManagerFreeLoadOption (&NewOption);
> + }
> +
> + if(OsFileDP != NULL) {
> + FreePool (OsFileDP);
> + OsFileDP = NULL;
> + }
> + }
> + }
> + }
> +
> + if (NumberFileSystemHandles != 0) {
> + FreePool (FileSystemHandles);
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
> new file mode 100644
> index 0000000..12e6d49
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
> @@ -0,0 +1,59 @@
> +## @file
> +# Manager Os Boot option.
> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
> +#
> +# Copyright (c) 2008 - 2014, Intel Corporation. All rights reserved.<BR>
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010005
> + BASE_NAME = OsBootLib
> + FILE_GUID = e406c654-ccde-4d32-8362-0aec01725139
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = OsBootLib
> +
> +[Sources]
> + OsBootLib.c
> + OsBootLibMisc.c
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + BaseMemoryLib
> + BaseLib
> + DxeServicesLib
> + DebugLib
> + DxeServicesTableLib
> + DevicePathLib
> + MemoryAllocationLib
> + PrintLib
> + UefiRuntimeServicesTableLib
> + UefiLib
> + UefiBootServicesTableLib
> + UefiBootManagerLib
> +
> +[Guids]
> + gEfiGlobalVariableGuid
> + gEfiFileInfoGuid ## SOMETIMES_CONSUMES ## GUID
> +
> +[Protocols]
> + gEfiSimpleFileSystemProtocolGuid ## SOMETIMES_CONSUMES
> + gEfiBlockIoProtocolGuid ## SOMETIMES_CONSUMES
> + gEfiFirmwareVolume2ProtocolGuid ## SOMETIMES_CONSUMES
> + gEfiDevicePathProtocolGuid ## CONSUMES
> + gEfiDevicePathToTextProtocolGuid
> +
> +[Pcd]
> diff --git a/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
> new file mode 100644
> index 0000000..4e6d895
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
> @@ -0,0 +1,514 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +**/
> +
> +#include "OsBoot.h"
> +
> +extern UEFI_OS_BOOT_FILE mUefiOsBootFiles[];
> +
> +/**
> + Read file the headers of dos, image, optional header.
> +
> + @param Device SimpleFileSystem device handle
> + @param FileSize File size
> + @param DosHeader Pointer to dos header
> + @param Hdr The buffer in which to return the PE32, PE32+, or TE header.
> +
> + @retval EFI_SUCCESS Successfully get the File.
> + @retval EFI_LOAD_ERROR File is not a valid image file.
> +
> +**/
> +EFI_STATUS
> +ReadDosHeader (
> + EFI_FILE_HANDLE ThisFile,
> + UINT64 FileSize,
> + EFI_IMAGE_DOS_HEADER *DosHeader,
> + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION *Hdr
> + )
> +{
> + EFI_STATUS Status;
> + UINTN BufferSize;
> + //
> + // Read dos header
> + //
> + BufferSize = sizeof (EFI_IMAGE_DOS_HEADER);
> + Status = ThisFile->Read (ThisFile, &BufferSize, DosHeader);
> + if (EFI_ERROR (Status) ||
> + BufferSize < sizeof (EFI_IMAGE_DOS_HEADER) ||
> + FileSize <= DosHeader->e_lfanew ||
> + DosHeader->e_magic != EFI_IMAGE_DOS_SIGNATURE) {
> + Status = EFI_LOAD_ERROR;
> + DEBUG ((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__));
> + goto ErrReadDos;
> + }
> +
> + //
> + // Move to PE signature
> + //
> + Status = ThisFile->SetPosition (ThisFile, DosHeader->e_lfanew);
> + if (EFI_ERROR (Status)) {
> + Status = EFI_LOAD_ERROR;
> + DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__));
> + goto ErrReadDos;
> + }
> +
> + //
> + // Read and check PE signature
> + //
> + BufferSize = sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION);
> + Status = ThisFile->Read (ThisFile, &BufferSize, (VOID*)(Hdr->Pe32));
> + if (EFI_ERROR (Status) ||
> + BufferSize < sizeof (EFI_IMAGE_OPTIONAL_HEADER_UNION) ||
> + Hdr->Pe32->Signature != EFI_IMAGE_NT_SIGNATURE) {
> + Status = EFI_LOAD_ERROR;
> + DEBUG((DEBUG_ERROR, "%a(%d):error!\n", __FUNCTION__,__LINE__));
> + goto ErrReadDos;
> + }
> +
> +ErrReadDos:
> + return Status;
> +}
> +
> +/**
> + Get the headers (dos, image, optional header) from an image
> +
> + @param Device SimpleFileSystem device handle
> + @param FileName File name for the image
> + @param DosHeader Pointer to dos header
> + @param Hdr The buffer in which to return the PE32, PE32+, or TE header.
> +
> + @retval EFI_SUCCESS Successfully get the machine type.
> + @retval EFI_NOT_FOUND The file is not found.
> + @retval EFI_LOAD_ERROR File is not a valid image file.
> +
> +**/
> +EFI_STATUS
> +EFIAPI
> +OsBootGetImageHeader (
> + IN EFI_HANDLE Device,
> + IN CHAR16 *FileName,
> + OUT EFI_IMAGE_DOS_HEADER *DosHeader,
> + OUT EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr
> + )
> +{
> + EFI_STATUS Status;
> + EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *Volume;
> + EFI_FILE_HANDLE Root;
> + EFI_FILE_HANDLE ThisFile;
> + UINTN BufferSize;
> + UINT64 FileSize;
> + EFI_FILE_INFO *Info;
> + BOOLEAN Condition = TRUE;//pclint
> +
> + Root = NULL;
> + ThisFile = NULL;
> + //
> + // Handle the file system interface to the device
> + //
> + Status = gBS->HandleProtocol (
> + Device,
> + &gEfiSimpleFileSystemProtocolGuid,
> + (VOID *) &Volume
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + goto Done;
> + }
> +
> + Status = Volume->OpenVolume (
> + Volume,
> + &Root
> + );
> + if (EFI_ERROR (Status)) {
> + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + Root = NULL;
> + goto Done;
> + }
> +
> + if (Root == NULL) {
> + Status = EFI_LOAD_ERROR;
> + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + goto Done;
> + }
> + Status = Root->Open (Root, &ThisFile, FileName, EFI_FILE_MODE_READ, 0);
> + if (EFI_ERROR (Status)) {
> + DEBUG((DEBUG_ERROR, "%a(%d):file not found ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + goto Done;
> + }
> +
> + if (ThisFile == NULL) {
> + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + Status = EFI_LOAD_ERROR;
> + goto Done;
> + }
> + //
> + // Get file size
> + //
> + BufferSize = SIZE_OF_EFI_FILE_INFO + 200;
> + do {
> + Info = NULL;
> + Status = gBS->AllocatePool (EfiBootServicesData, BufferSize, (VOID **) &Info);
> + if (EFI_ERROR (Status)) {
> + goto Done;
> + }
> + Status = ThisFile->GetInfo (
> + ThisFile,
> + &gEfiFileInfoGuid,
> + &BufferSize,
> + Info
> + );
> + if (!EFI_ERROR (Status)) {
> + break;
> + }
> + if (Status != EFI_BUFFER_TOO_SMALL) {
> + FreePool (Info);
> + goto Done;
> + }
> + FreePool (Info);
> + } while (Condition);
> +
> + FileSize = Info->FileSize;
> + FreePool (Info);
> +
> + Status = ReadDosHeader(ThisFile, FileSize, DosHeader, &Hdr);
> + if (EFI_ERROR (Status)) {
> + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + goto Done;
> + }
> + //
> + // Check PE32 or PE32+ magic
> + //
> + if (Hdr.Pe32->OptionalHeader.Magic != EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC &&
> + Hdr.Pe32->OptionalHeader.Magic != EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC) {
> + Status = EFI_LOAD_ERROR;
> + DEBUG((DEBUG_ERROR, "%a(%d):error ret :%r !\n", __FUNCTION__,__LINE__,Status));
> + goto Done;
> + }
> +
> + Done:
> + if (ThisFile != NULL) {
> + ThisFile->Close (ThisFile);
> + }
> + if (Root != NULL) {
> + Root->Close (Root);
> + }
> + return Status;
> +}
> +
> +
> +VOID
> +PrintDevicePath (
> + CHAR16 *PreStr,
> + EFI_DEVICE_PATH_PROTOCOL *Path
> + )
> +{
> + CHAR16 *DevicePathTxt;
> + EFI_STATUS Status;
> + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevicePathToTextProtocol;
> +
> + DevicePathTxt = NULL;
> + Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **)&DevicePathToTextProtocol);
> + if (!EFI_ERROR (Status)) {
> + DevicePathTxt = DevicePathToTextProtocol->ConvertDevicePathToText (Path, FALSE, TRUE);
> + DEBUG ((DEBUG_ERROR, "%s DevPath:[%s]\n", PreStr, DevicePathTxt));
> + }
> +
> + if (DevicePathTxt != NULL) {
> + FreePool (DevicePathTxt);
> + }
> +
> + return ;
> +}
> +
> +CHAR16 *
> +GetGptNodeText (
> + EFI_DEVICE_PATH_PROTOCOL *Path
> + )
> +{
> + CHAR16 *NodeText;
> +
> + while (!IsDevicePathEnd (Path)) {
> + NodeText = ConvertDeviceNodeToText (Path, TRUE, TRUE);
> + if (StrStr (NodeText, L"GPT") != NULL) {
> + return NodeText;
> + }
> +
> + if (NodeText != NULL) {
> + FreePool (NodeText);
> + }
> +
> + Path = NextDevicePathNode (Path);
> + }
> +
> + return NULL;
> +}
> +
> +BOOLEAN
> +IsPartitionGuidEqual (
> + EFI_DEVICE_PATH_PROTOCOL *OptionPath,
> + EFI_DEVICE_PATH_PROTOCOL *FilePath
> + )
> +{
> + CHAR16 *OptionGptText;
> + CHAR16 *FileGptText;
> +
> + OptionGptText = GetGptNodeText (OptionPath);
> + FileGptText = GetGptNodeText (FilePath);
> + if ((OptionGptText != NULL) && (FileGptText != NULL) && (StrCmp (OptionGptText, FileGptText) == 0)) {
> + return TRUE;
> + }
> +
> + if (OptionGptText != NULL) {
> + FreePool (OptionGptText);
> + }
> + if (FileGptText != NULL) {
> + FreePool (FileGptText);
> + }
> +
> + return FALSE;
> +}
> +
> +/* If a partition exist a valid grub, OsBootLib will create a Option after bios firmware upgraded,
> + * and then installing the same OS on the same partition will create anothor Option. the two Options
> + * are superfluous, the Option added by OsBootLib should be remove.
> + *
> + * It's allowed of creating several Option in the same GPT by installing OS.
> + */
> +VOID
> +RemoveSuperfluousOption (
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions,
> + UINT16 *OptionDelFlags,
> + UINTN BootOptionCount
> + )
> +{
> + EFI_STATUS Status;
> + UINTN Index;
> +
> + for (Index = 1; Index < BootOptionCount; Index++) {
> + if (OptionDelFlags[Index] == 0) {
> + if ((IsPartitionGuidEqual (BootOptions[0].FilePath, BootOptions[Index].FilePath)) &&
> + (IsOptionAddedByOsBootLib (BootOptions[Index].Description))) {
> + OptionDelFlags[Index] = 1;
> +
> + Status = EfiBootManagerDeleteLoadOptionVariable (BootOptions[Index].OptionNumber, LoadOptionTypeBoot);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "DeleteLoadOptionVariable: %r\n", Status));
> + continue;
> + }
> +
> + PrintDevicePath (L"Del Option(du),", BootOptions[Index].FilePath);
> + }
> + }
> + }
> +
> + return;
> +}
> +
> +UINTN
> +GetOptionPositionWithoutGpt (
> + VOID
> + )
> +{
> + UINTN Index;
> + UINTN BootOptionCount;
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
> +
> + BootOptions = EfiBootManagerGetLoadOptions (
> + &BootOptionCount, LoadOptionTypeBoot
> + );
> + for (Index = 0; Index < BootOptionCount; Index++) {
> + if (GetGptNodeText (BootOptions[Index].FilePath) == NULL) {
> + return Index;
> + }
> + }
> +
> + return 0;
> +}
> +
> +CHAR16 *
> +GetFileTextByDevicePath (
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath
> + )
> +{
> + CHAR16 *FileString;
> +
> + FileString = NULL;
> +
> + while (!IsDevicePathEnd (DevicePath)) {
> + if (MEDIA_DEVICE_PATH == DevicePathType (DevicePath) &&
> + MEDIA_FILEPATH_DP == DevicePathSubType (DevicePath)) {
> + FileString = ConvertDeviceNodeToText (DevicePath, TRUE, TRUE);
> + break;
> + }
> + DevicePath = NextDevicePathNode (DevicePath);
> + }
> +
> + return FileString;
> +}
> +
> +
> +/**
> + Check same boot option by device path.
> +
> +*/
> +BOOLEAN
> +BeHaveSameBootOptionByDP (
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath,
> + CHAR16 *FileName
> + )
> +{
> + UINTN Index;
> + UINTN ValidPathSize;
> + BOOLEAN Found;
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
> + UINTN BootOptionCount;
> +
> + if (NULL == DevicePath) {
> + return FALSE;
> + }
> +
> + BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);
> +
> + Found = FALSE;
> + for (Index = 0; Index < BootOptionCount; Index++) {
> + /* If a partition exist a valid Option, then the new Option should not be added.
> + * After installation, some iso will create several valid grub file, like
> + * \EFI\centos\shimaa64.efi, \EFI\BOOT\BOOTAA64.EFI.
> + */
> + if(IsPartitionGuidEqual (BootOptions[Index].FilePath, DevicePath)) {
> + DEBUG ((DEBUG_ERROR, "Get the same Option(GPT).\n"));
> + Found = TRUE;
> + break;
> + }
> +
> + /* If DevicePath of new Option is matched in exist Option and file name of
> + * new Option is EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64, then the new Option should be ignored.
> + */
> + ValidPathSize = GetDevicePathSize (BootOptions[Index].FilePath) - END_DEVICE_PATH_LENGTH;
> + if ((CompareMem (BootOptions[Index].FilePath, DevicePath, ValidPathSize) == 0) &&
> + (StrCmp (FileName, EFI_REMOVABLE_MEDIA_FILE_NAME_AARCH64) == 0))
> + {
> + DEBUG ((DEBUG_ERROR, "Get the same Option.\n"));
> + Found = TRUE;
> + break;
> + }
> + }
> +
> + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
> +
> + return Found;
> +}
> +
> +/**
> + Check Os Boot Option if exist in current system.
> +
> +*/
> +BOOLEAN
> +BeInvalidOsBootOption (
> + EFI_DEVICE_PATH_PROTOCOL *OptionDp
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE *FileSystemHandles;
> + UINTN NumberFileSystemHandles;
> + UINTN Index;
> + EFI_DEVICE_PATH_PROTOCOL *FileSystemDP;
> + UINTN OptionDpSize;
> + EFI_BLOCK_IO_PROTOCOL *BlkIo;
> + EFI_IMAGE_OPTIONAL_HEADER_UNION HdrData;
> + EFI_IMAGE_OPTIONAL_HEADER_PTR_UNION Hdr;
> + EFI_IMAGE_DOS_HEADER DosHeader;
> + BOOLEAN Invalid;
> + EFI_DEVICE_PATH_PROTOCOL* DevicePathNode;
> + CHAR16 *FileString;
> +
> + Invalid = TRUE;
> + if (NULL == OptionDp) {
> + return FALSE;
> + }
> +
> + OptionDpSize = GetDevicePathSize (OptionDp);
> + if (OptionDpSize == 0) {
> + return FALSE;
> + }
> +
> + //
> + // Os BootOption should be File Device Path.
> + //
> + DevicePathNode = OptionDp;
> + FileString = GetFileTextByDevicePath (DevicePathNode);
> + if (FileString == NULL) {
> + return FALSE;
> + }
> +
> + //
> + // File should be exsiting in system.
> + //
> + Status = gBS->LocateHandleBuffer (
> + ByProtocol,
> + &gEfiSimpleFileSystemProtocolGuid,
> + NULL,
> + &NumberFileSystemHandles,
> + &FileSystemHandles
> + );
> + if (EFI_ERROR (Status)) {
> + FreePool (FileString);
> + return FALSE;
> + }
> +
> + for (Index = 0; Index < NumberFileSystemHandles; Index++) {
> + Status = gBS->HandleProtocol (
> + FileSystemHandles[Index],
> + &gEfiBlockIoProtocolGuid,
> + (VOID **) &BlkIo
> + );
> + if (EFI_ERROR (Status)) {
> + continue;
> + }
> +
> + FileSystemDP = FileDevicePath (FileSystemHandles[Index], FileString);
> + /* If Partition is existed and the grub file is existed, then the Option is valid. */
> + if ((CompareMem ((VOID *) OptionDp, (VOID *) FileSystemDP, OptionDpSize) == 0) ||
> + (IsPartitionGuidEqual (OptionDp, FileSystemDP))) {
> + Hdr.Union = &HdrData;
> + Status = OsBootGetImageHeader (
> + FileSystemHandles[Index],
> + FileString,
> + &DosHeader,
> + Hdr
> + );
> + if (!EFI_ERROR (Status) &&
> + EFI_IMAGE_MACHINE_TYPE_SUPPORTED (Hdr.Pe32->FileHeader.Machine) &&
> + Hdr.Pe32->OptionalHeader.Subsystem == EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION) {
> + DEBUG ((DEBUG_ERROR, "BeValidOsBootOption (),Get Bootable file :%s.\n", FileString));
> + Invalid = FALSE;
> + break;
> + }
> + }
> +
> + if (FileSystemDP != NULL) {
> + FreePool (FileSystemDP);
> + }
> + }
> +
> + if (NumberFileSystemHandles != 0) {
> + FreePool (FileSystemHandles);
> + }
> + if (FileString != NULL) {
> + FreePool (FileString);
> + }
> +
> + return Invalid;
> +}
> +
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> index 845519f..1c6e8bf 100644
> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -18,6 +18,7 @@
> #include <IndustryStandard/Pci22.h>
> #include <Library/BmcConfigBootLib.h>
> #include <Library/DevicePathLib.h>
> +#include <Library/OsBootLib.h>
> #include <Library/PcdLib.h>
> #include <Library/UefiBootManagerLib.h>
> #include <Library/UefiLib.h>
> @@ -576,6 +577,11 @@ PlatformBootManagerAfterConsole (
> PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
> );
>
> + Status = AdjustOsBootOrder ();
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a:%r\n", __FUNCTION__, Status));
> + }
> +
> HandleBmcBootType ();
> }
>
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> index 7b151a9..a6d597d 100644
> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> @@ -49,6 +49,7 @@
> DevicePathLib
> DxeServicesLib
> MemoryAllocationLib
> + OsBootLib
> PcdLib
> PrintLib
> UefiBootManagerLib
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02
2018-01-18 15:01 ` [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 Ming Huang
@ 2018-01-20 11:11 ` Ard Biesheuvel
2018-01-23 10:18 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-20 11:11 UTC (permalink / raw)
To: Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, huangming, Jason Zhang,
Mengfanrong, waip23
On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
> Replace the old string with short one. The old one is
> too long that can not be show integrallty in Setup nemu.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +-
> Platform/Hisilicon/D05/D05.dsc | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 6f1164e..b6b8086 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -171,7 +171,7 @@
> !ifdef $(FIRMWARE_VER)
> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
> !else
> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release"
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D03"
> !endif
>
> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 52ffad5..a599c08 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -190,7 +190,7 @@
> !ifdef $(FIRMWARE_VER)
> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
> !else
> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release"
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D05"
> !endif
>
> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-20 10:16 ` Ard Biesheuvel
@ 2018-01-22 9:16 ` Huangming (Mark)
2018-01-23 6:00 ` Huangming (Mark)
1 sibling, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-22 9:16 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/20 18:16, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Platform/Hisilicon/D05/D05.fdf | 1 +
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
>> 7 files changed, 677 insertions(+), 27 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 77a89fd..710339c 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -506,6 +506,7 @@
>> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>>
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 78ab0c8..97de4d2 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
>> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>>
>> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>
>> #
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> index 808219a..f1927e8 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> @@ -19,6 +19,7 @@
>>
>> #ifndef _HI1610_PLATFORM_H_
>> #define _HI1610_PLATFORM_H_
>> +#include <IndustryStandard/Acpi.h>
>>
>
> Empty line before ^^^ please
>
>> //
>> // ACPI table information used to initialize tables.
>> @@ -44,5 +45,31 @@
>> }
>>
>> #define HI1616_WATCHDOG_COUNT 2
>> +#define HI1616_GIC_STRUCTURE_COUNT 64
>> +
>> +#define HI1616_MPID_TA_BASE 0x10000
>> +#define HI1616_MPID_TB_BASE 0x30000
>> +#define HI1616_MPID_TA_2_BASE 0x50000
>> +#define HI1616_MPID_TB_2_BASE 0x70000
>> +
>> +// Differs from Juno, we have another affinity level beyond cluster and core
>> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +
>> +//
>> +// Multiple APIC Description Table
>> +//
>> +#pragma pack (1)
>> +
>> +typedef struct {
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
>> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> +
>> +#pragma pack ()
>>
>> #endif
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> index 169ee72..33dca03 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> @@ -1,9 +1,9 @@
>> /** @file
>> * Multiple APIC Description Table (MADT)
>> *
>> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
>> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
>
> Please don't touch the copyright statements belonging to other companies
>
>> *
>> * This program and the accompanying materials
>> *
>> @@ -19,34 +19,11 @@
>> *
>> **/
>>
>> -
>> -#include <IndustryStandard/Acpi.h>
>> +#include "Hi1616Platform.h"
>> #include <Library/AcpiLib.h>
>> #include <Library/AcpiNextLib.h>
>> #include <Library/ArmLib.h>
>> #include <Library/PcdLib.h>
>> -#include "Hi1616Platform.h"
>> -
>> -// Differs from Juno, we have another affinity level beyond cluster and core
>> -// 0x20000 is only for socket 0
>> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
>> -
>> -//
>> -// Multiple APIC Description Table
>> -//
>> -#pragma pack (1)
>> -
>> -typedef struct {
>> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
>> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> -
>> -#pragma pack ()
>>
>> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
>> {
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> new file mode 100644
>> index 0000000..eac4736
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> @@ -0,0 +1,447 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#include "Pptt.h"
>> +
>> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
>> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
>> +
>> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
>> + ARM_ACPI_HEADER (
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
>> + EFI_ACPI_DESCRIPTION_HEADER,
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
>> + );
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
>> +{
>> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
>> +};
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
>> +{
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
>> +};
>> +
>
> Please make all of these STATIC ^^^
>
> And functions below as well
>
>> +EFI_STATUS
>> +InitCacheInfo(
>> + )
>> +{
>> + UINT8 Index;
>> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
>> + CSSELR_DATA CsselrData;
>> + CCSIDR_DATA CcsidrData;
>> +
>> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
>> + CsselrData.Data = 0;
>> + CcsidrData.Data = 0;
>> + Type1Attributes.Data = 0;
>> +
>> + if (Index == 0) { //L1I
>
> space after //
>
>> + CsselrData.Bits.InD = 1;
>> + CsselrData.Bits.Level = 0;
>> + Type1Attributes.Bits.CacheType = 1;
>> + } else if (Index == 1) {
>> + Type1Attributes.Bits.CacheType = 0;
>> + CsselrData.Bits.Level = Index -1;
>
> space after -
>
>> + } else {
>> + Type1Attributes.Bits.CacheType = 2;
>> + CsselrData.Bits.Level = Index -1;
>
> and here
>
>> + }
>> +
>> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
>> +
>> + if (CcsidrData.Bits.Wa == 1) {
>> + Type1Attributes.Bits.AllocateType = 1;
>> + if (CcsidrData.Bits.Ra == 1) {
>> + Type1Attributes.Bits.AllocateType++;
>
> Just assign '2' here. BTW don't we have #defines for these constants?
>
>> + }
>> + }
>> +
>> + if (CcsidrData.Bits.Wt == 1) {
>> + Type1Attributes.Bits.WritePolicy = 1;
>> + }
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
>> +
>> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
>> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
>> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
>> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
>> + mPpttCacheType1[Index].Associativity * \
>> + mPpttCacheType1[Index].NumberOfSets;
>> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
>> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>> + }
>> +
>> + // L3
>> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>
> Where do you assign mPpttCacheType1[3].Size/Attributes/... ?
Other fields are used with initial value.
>
>> + return EFI_SUCCESS;
>> +}
>> +
>
> STATIC
>
>> +EFI_STATUS
>> +AddCoreTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo,
>> + IN UINT32 ProcessorId
>
> Please align like
>
> IN VOID *PpttTable,
> IN OUT VOID *PpttTableLengthRemain,
> IN UINT32 Flags,
>
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>
> If *PpttTableLengthRemain is a UINT32 then use a UINT32* as the
> function parameter not VOID*, and drop the cast here.
>
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>
> Please cast PpttTable to UINT8* before adding to it.
>
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->AcpiProcessorId = ProcessorId;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>
> Space after sizeof
>
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>
> space after sizeof
>
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>
> STATIC
>
>> +EFI_STATUS
>> +AddClusterTable (
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>
> Alignment as above
>
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
>
> Use a UINT32* type for PpttTableLengthRemain
>
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>
> Use UINT8* cast for PpttTable
>
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>
> Same comments apply to AddScclTable()
>
>> +EFI_STATUS
>> +AddScclTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddSocketTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
>> +
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>
> The functions above look very similar. Would it be possible to merge them?
>
> STATIC
>
>> +VOID
>> +GetApic(
>> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
>> +VOID *PpttTable,
>> +IN UINT32 PpttTableLengthRemain,
>> +IN UINT32 Index1
>> +)
>> +{
>> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
>
> cluster not culster
>
>> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
>> + UINT32 Parent = 0;
>> + UINT32 Flags = 0;
>> + UINT32 ResourceNo = 0;
>
> Empty line
>
>> + //Get APIC data
>
> Space after //
>
>> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
>> + SocketOffset = 0;
>> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
>> + ScclOffset = 0;
>> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
>> + ClusterOffset = 0;
>> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
>> +
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
>> +
>> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
>> + //This processor is unusable
>
> Space after //
>
>> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
>> + return;
>> + }
>> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
>> + //This processor is unusable
>
> and here
>
>> + Index1++;
>> + continue;
>> + }
>> +
>> + if (SocketOffset == 0) {
>> + //Add socket0 for type0 table
>
> and here, plus indentation
>
>> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
>> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + Parent = 0;
>> + Flags = PPTT_TYPE0_SOCKET_FLAG;
>> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ScclOffset == 0) {
>> + //Add socket0die0 for type0 table
>
> and here
>
>> + ResourceNo = 1;
>> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>
> No space before ;
>
>> + Parent = SocketOffset;
>> + Flags = PPTT_TYPE0_DIE_FLAG;
>> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ClusterOffset == 0) {
>> + //Add socket0die0ClusterId for type0 table
>
> Space after // and indentation
>
>
>> + ResourceNo = 1;
>> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>> + Parent = ScclOffset;
>> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
>> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> +
>> + //Add socket0die0ClusterIdCoreId for type0 table
>
> and here
>
>> + ResourceNo = 2;
>> + Parent = ClusterOffset;
>> + Flags = PPTT_TYPE0_CORE_FLAG;
>> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
>> +
>> + Index1++;
>> + }
>> + }
>> + }
>> + }
>> + return ;
>> +}
>> +
>
> STATIC
>
>> +VOID
>> +PpttSetAcpiTable(
>> + IN EFI_EVENT Event,
>> + IN VOID *Context
>> + )
>> +{
>> + UINTN AcpiTableHandle;
>> + EFI_STATUS Status;
>> + UINT8 Checksum;
>> + EFI_ACPI_SDT_HEADER *Table;
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
>> + EFI_ACPI_TABLE_VERSION TableVersion;
>> + VOID *PpttTable;
>> + UINTN TableKey;
>> + UINT32 Index0, Index1;
>> + UINT32 PpttTableLengthRemain = 0;
>> +
>> + gBS->CloseEvent (Event);
>> +
>> + InitCacheInfo ();
>> +
>> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
>> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
>> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
>> +
>> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
>> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
>> + if (EFI_ERROR (Status)) {
>> + break;
>> + }
>> + //Find APIC table
>
> Space after //
>
>> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
>> + continue;
>> + }
>> +
>> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
>> + Index1 = 0;
>> +
>> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
>> + break;
>> + }
>> +
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
>
> Does it make sense to proceed here?
>
>> + }
>> +
>> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>
> No () around PpttTable
> Line length (please check throughout)
>
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
>
> Space before =
>
>> +
>> + AcpiTableHandle = 0;
>> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
>> +
>
> Line length?
>
>> + FreePool (PpttTable);
>> + return ;
>> +}
>> +
>
> STATIC
>
>> +EFI_STATUS
>> +InitPpttTable(
>
> Space before (
> Missing VOID
>
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_EVENT ReadyToBootEvent;
>> +
>> + Status = EfiCreateEventReadyToBootEx (
>> + TPL_NOTIFY,
>> + PpttSetAcpiTable,
>> + NULL,
>> + &ReadyToBootEvent
>> + );
>
> Indentation
>
> Also, can you just move this call to EfiCreateEventReadyToBootEx()
> into the function below?
>
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + return Status;
>> +}
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +PpttEntryPoint(
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
>
> Space between VOID and **
> Line length
>
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
>
> No space after (VOID **)
>
> Also, you have a DEPEX on both protocols, so it is sufficient to use
> ASSERT_EFI_ERROR() here
>
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + InitPpttTable ();
>> +
>> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> new file mode 100644
>> index 0000000..5dc635f
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> @@ -0,0 +1,142 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#ifndef _PPTT_H_
>> +#define _PPTT_H_
>> +
>> +#include <IndustryStandard/Acpi.h>
>> +#include <Library/ArmLib/ArmLibPrivate.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Protocol/AcpiSystemDescriptionTable.h>
>> +#include <Protocol/AcpiTable.h>
>> +#include "../D05AcpiTables/Hi1616Platform.h"
>> +
>> +///
>> +/// "PPTT" Processor Properties Topology Table
>> +///
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
>> +#define EFI_ACPI_MAX_NUM_TABLES 20
>> +
>> +#define PPTT_TABLE_MAX_LEN 0x6000
>> +#define PPTT_SOCKET_NO 0x2
>> +#define PPTT_DIE_NO 0x2
>> +#define PPTT_CULSTER_NO 0x4
>> +#define PPTT_CORE_NO 0x4
>> +#define PPTT_SOCKET_COMPONENT_NO 0x1
>> +#define PPTT_CACHE_NO 0x4
>> +
>> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
>> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
>> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
>> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
>> +#define PPTT_TYPE0_CLUSTER_FLAG 0
>> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
>> +
>> +#define PPTT_TYPE1_SIZE_VALID BIT0
>> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
>> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
>> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
>> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
>> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
>> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
>> +
>> +typedef union {
>> + struct {
>> + UINT32 InD :1;
>> + UINT32 Level :3;
>> + UINT32 Reserved :28;
>> + } Bits;
>> + UINT32 Data;
>> +}CSSELR_DATA;
>
> Space after }
>
>> +
>> +typedef union {
>> + struct {
>> + UINT32 LineSize :3;
>> + UINT32 Associativity :10;
>> + UINT32 NumSets :15;
>> + UINT32 Wa :1;
>> + UINT32 Ra :1;
>> + UINT32 Wb :1;
>> + UINT32 Wt :1;
>> + } Bits;
>> + UINT32 Data;
>> +}CCSIDR_DATA;
>
> and here
>
>> +
>> +//
>> +// Processor Hierarchy Node Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 Parent;
>> + UINT32 AcpiProcessorId;
>> + UINT32 PrivateResourceNo;
>> +} EFI_ACPI_6_2_PPTT_TYPE0;
>> +
>> +//
>> +// Cache Configuration
>> +//
>> +typedef union {
>> + struct {
>> + UINT8 AllocateType :2;
>> + UINT8 CacheType :2;
>> + UINT8 WritePolicy :1;
>> + UINT8 Reserved :3;
>> + } Bits;
>> + UINT8 Data;
>> +}PPTT_TYPE1_ATTRIBUTES;
>
> and here
>
>> +
>> +//
>> +// Cache Type Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 NextLevelOfCache;
>> + UINT32 Size;
>> + UINT32 NumberOfSets;
>> + UINT8 Associativity;
>> + UINT8 Attributes;
>> + UINT16 LineSize;
>> +} EFI_ACPI_6_2_PPTT_TYPE1;
>> +
>> +//
>> +// ID Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 VendorId;
>> + UINT64 Level1Id;
>> + UINT64 Level2Id;
>> + UINT16 MajorRev;
>> + UINT16 MinorRev;
>> + UINT16 SpinRev;
>> +} EFI_ACPI_6_2_PPTT_TYPE2;
>> +
>> +#endif // _PPTT_H_
>> +
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> new file mode 100644
>> index 0000000..ce26b97
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> @@ -0,0 +1,55 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>
> You should probably update these now
>
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0000001A
>
>> + BASE_NAME = AcpiPptt
>> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = PpttEntryPoint
>> +
>> +[Sources.common]
>> + Pptt.c
>> + Pptt.h
>> +
>> +[Packages]
>> + MdePkg/MdePkg.dec
>> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
>> + ArmPkg/ArmPkg.dec
>> +
>> +[LibraryClasses]
>> + ArmLib
>> + HobLib
>> + UefiRuntimeServicesTableLib
>> + UefiDriverEntryPoint
>> + BaseMemoryLib
>> + DebugLib
>> +
>> +[Guids]
>> +
>
> Please remove empty sections
>
>> +
>> +[Protocols]
>> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
>> + gEfiAcpiSdtProtocolGuid
>
> Please use the annotation consistently:
> use ## not #
> annotate all protocols
>
>> +
>> +[Pcd]
>> +
>> +
>> +[Depex]
>> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
>> +
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (13 preceding siblings ...)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 Ming Huang
@ 2018-01-22 13:26 ` Leif Lindholm
2018-01-23 14:24 ` Leif Lindholm
15 siblings, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-22 13:26 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Thu, Jan 18, 2018 at 11:01:29PM +0800, Ming Huang wrote:
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> *** BLURB HERE ***
Please add an overriding summary of the scope(s) of changes
implemented by the set.
/
Leif
> Jason Zhang (4):
> Hisilicon/D05: Add PPTT support
> Hisilicon D03/D05: Add capsule upgrade support
> Hisilicon D03/D05: Open SasPlatform source code
> Hisilicon D03/D05: Open SnpPlatform source code
>
> Ming Huang (9):
> Hisilicon D03/D05：Switch to Generic BDS driver
> Hisilicon D03/D05: Optimize the feature of BMC set boot option
> Hisilicon/Smbios: modify type 4
> Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
> Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
> Hisilicon/D05/ACPI: Add ITS PXM
> Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
> Hisilicon/Library: Add OsBootLib
> Hisilicon D03/D05: Update firmware version to 18.02
>
> Yan Zhang (1):
> Hisilicon/PCIe: Disable PCIe ASPM
>
> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++
> Platform/Hisilicon/D03/D03.dsc | 51 +-
> Platform/Hisilicon/D03/D03.fdf | 84 ++-
> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++
> Platform/Hisilicon/D05/D05.dsc | 56 +-
> Platform/Hisilicon/D05/D05.fdf | 85 ++-
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 +++
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 ++
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++
> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 +-
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 +++
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 ++
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 ++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 ++
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 +++++++++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 ++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 ++
> Silicon/Hisilicon/HisiPkg.dec | 3 +
> Silicon/Hisilicon/Hisilicon.dsc.inc | 12 +-
> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 +
> Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +-
> Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 +
> Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++
> Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++
> Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +
> Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +
> Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 +
> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 +++++++++++++
> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 ++
> Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 ++++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 ++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 +++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 601 +++++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 91 +++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 +++
> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++
> Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------
> Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +-
> 51 files changed, 4987 insertions(+), 489 deletions(-)
> create mode 100644 Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> create mode 100644 Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
> create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
> create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
> create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
> create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
> create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
> create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> create mode 100644 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
> create mode 100644 Silicon/Hisilicon/Include/Library/OemDevicePath.h
> create mode 100644 Silicon/Hisilicon/Include/Library/OsBootLib.h
> create mode 100644 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
> create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
> create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
2018-01-20 10:16 ` Ard Biesheuvel
@ 2018-01-22 13:53 ` Leif Lindholm
2018-01-22 14:15 ` Leif Lindholm
2018-01-24 13:49 ` graeme.gregory
2018-01-23 21:29 ` Jeremy Linton
2 siblings, 2 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-22 13:53 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
Detailed commit description, please.
Graeme - any comments on ACPIness?
On Thu, Jan 18, 2018 at 11:01:30PM +0800, Ming Huang wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 1 +
> Platform/Hisilicon/D05/D05.fdf | 1 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
> 7 files changed, 677 insertions(+), 27 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 77a89fd..710339c 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -506,6 +506,7 @@
> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>
> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>
> #
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 78ab0c8..97de4d2 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>
> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>
> #
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> index 808219a..f1927e8 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
As far as I can tell, all of the changes to this file (and the
resulting counterpart in
Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc) are
non-functional.
Please break these changes out as a separate patch.
This is good cleanup, but unrelated to the stated change.
> @@ -19,6 +19,7 @@
>
> #ifndef _HI1610_PLATFORM_H_
> #define _HI1610_PLATFORM_H_
> +#include <IndustryStandard/Acpi.h>
>
> //
> // ACPI table information used to initialize tables.
> @@ -44,5 +45,31 @@
> }
>
> #define HI1616_WATCHDOG_COUNT 2
> +#define HI1616_GIC_STRUCTURE_COUNT 64
> +
> +#define HI1616_MPID_TA_BASE 0x10000
> +#define HI1616_MPID_TB_BASE 0x30000
> +#define HI1616_MPID_TA_2_BASE 0x50000
> +#define HI1616_MPID_TB_2_BASE 0x70000
> +
> +// Differs from Juno, we have another affinity level beyond cluster and core
> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +typedef struct {
> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> +
> +#pragma pack ()
>
> #endif
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> index 169ee72..33dca03 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> @@ -1,9 +1,9 @@
> /** @file
> * Multiple APIC Description Table (MADT)
> *
> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
As mentioned by Ard elsewhere in the series - please only update your
own copyright dates. (I will not point this out through the rest of
the review, but please address throughout for v2.)
> *
> * This program and the accompanying materials
> *
> @@ -19,34 +19,11 @@
> *
> **/
>
> -
> -#include <IndustryStandard/Acpi.h>
> +#include "Hi1616Platform.h"
> #include <Library/AcpiLib.h>
> #include <Library/AcpiNextLib.h>
> #include <Library/ArmLib.h>
> #include <Library/PcdLib.h>
> -#include "Hi1616Platform.h"
The above modifications are unnecessary.
- First there is a spurious whitespace deletion.
- Then there is a deletion of an include of an IndustryStandard header
file that is provably used later in this scope.
- Finally there is a (seemingly) spurious move of a local include
statement.
I understand the thinking behind the latter two, but I prefer the
clarity of explicitly including <IndustryStandard/Acpi.h> even though
"Hi1616Platform.h" now pulls it in - so please leave the above
unchanged.
> -
> -// Differs from Juno, we have another affinity level beyond cluster and core
> -// 0x20000 is only for socket 0
> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
> -
> -//
> -// Multiple APIC Description Table
> -//
> -#pragma pack (1)
> -
> -typedef struct {
> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> -
> -#pragma pack ()
>
> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> {
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> new file mode 100644
> index 0000000..eac4736
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> @@ -0,0 +1,447 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
Should probably say 2018 by now?
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
I'm sure it is, but these now reside under
Platform/ARM/JunoPkg/AcpiTables.
> +*
> +**/
> +
> +#include "Pptt.h"
> +
> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
> +
> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
> + ARM_ACPI_HEADER (
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
> + EFI_ACPI_DESCRIPTION_HEADER,
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
> + );
> +
> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
> +{
> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
> +};
> +
> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
> +{
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
> +};
> +
> +EFI_STATUS
> +InitCacheInfo(
> + )
> +{
> + UINT8 Index;
> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
> + CSSELR_DATA CsselrData;
> + CCSIDR_DATA CcsidrData;
> +
> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
> + CsselrData.Data = 0;
> + CcsidrData.Data = 0;
> + Type1Attributes.Data = 0;
> +
> + if (Index == 0) { //L1I
> + CsselrData.Bits.InD = 1;
> + CsselrData.Bits.Level = 0;
> + Type1Attributes.Bits.CacheType = 1;
> + } else if (Index == 1) {
> + Type1Attributes.Bits.CacheType = 0;
> + CsselrData.Bits.Level = Index -1;
> + } else {
> + Type1Attributes.Bits.CacheType = 2;
> + CsselrData.Bits.Level = Index -1;
> + }
> +
> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
> +
> + if (CcsidrData.Bits.Wa == 1) {
> + Type1Attributes.Bits.AllocateType = 1;
> + if (CcsidrData.Bits.Ra == 1) {
> + Type1Attributes.Bits.AllocateType++;
> + }
> + }
> +
> + if (CcsidrData.Bits.Wt == 1) {
> + Type1Attributes.Bits.WritePolicy = 1;
> + }
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
> +
> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
> + mPpttCacheType1[Index].Associativity * \
> + mPpttCacheType1[Index].NumberOfSets;
> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> + PPTT_TYPE1_LINE_SIZE_VALID;
> +
> + }
> +
> + // L3
> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> + PPTT_TYPE1_LINE_SIZE_VALID;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddCoreTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo,
> + IN UINT32 ProcessorId
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> + UINT8 Index;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->AcpiProcessorId = ProcessorId;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddClusterTable (
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> +
> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddScclTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddSocketTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
> + UINT32 *PrivateResource;
> + UINT8 Index;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
> +
> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +VOID
> +GetApic(
> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
> +VOID *PpttTable,
> +IN UINT32 PpttTableLengthRemain,
> +IN UINT32 Index1
> +)
> +{
> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
> + UINT32 Parent = 0;
> + UINT32 Flags = 0;
> + UINT32 ResourceNo = 0;
> + //Get APIC data
> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
> + SocketOffset = 0;
> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
> + ScclOffset = 0;
> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
> + ClusterOffset = 0;
> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
> +
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
> +
> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
> + //This processor is unusable
> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
> + return;
> + }
> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
> + //This processor is unusable
> + Index1++;
> + continue;
> + }
> +
> + if (SocketOffset == 0) {
> + //Add socket0 for type0 table
> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + Parent = 0;
> + Flags = PPTT_TYPE0_SOCKET_FLAG;
> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> + if (ScclOffset == 0) {
> + //Add socket0die0 for type0 table
> + ResourceNo = 1;
> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> + Parent = SocketOffset;
> + Flags = PPTT_TYPE0_DIE_FLAG;
> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> + if (ClusterOffset == 0) {
> + //Add socket0die0ClusterId for type0 table
> + ResourceNo = 1;
> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> + Parent = ScclOffset;
> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> +
> + //Add socket0die0ClusterIdCoreId for type0 table
> + ResourceNo = 2;
> + Parent = ClusterOffset;
> + Flags = PPTT_TYPE0_CORE_FLAG;
> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
> +
> + Index1++;
> + }
> + }
> + }
> + }
> + return ;
> +}
> +
> +VOID
> +PpttSetAcpiTable(
> + IN EFI_EVENT Event,
> + IN VOID *Context
> + )
> +{
> + UINTN AcpiTableHandle;
> + EFI_STATUS Status;
> + UINT8 Checksum;
> + EFI_ACPI_SDT_HEADER *Table;
> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
> + EFI_ACPI_TABLE_VERSION TableVersion;
> + VOID *PpttTable;
> + UINTN TableKey;
> + UINT32 Index0, Index1;
> + UINT32 PpttTableLengthRemain = 0;
> +
> + gBS->CloseEvent (Event);
> +
> + InitCacheInfo ();
> +
> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
> +
> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
> + if (EFI_ERROR (Status)) {
> + break;
> + }
> + //Find APIC table
> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
> + continue;
> + }
> +
> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
> + Index1 = 0;
> +
> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
> + break;
> + }
> +
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
> + }
> +
> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
> +
> + AcpiTableHandle = 0;
> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
> +
> + FreePool (PpttTable);
> + return ;
> +}
> +
> +EFI_STATUS
> +InitPpttTable(
> + )
> +{
> + EFI_STATUS Status;
> + EFI_EVENT ReadyToBootEvent;
> +
> + Status = EfiCreateEventReadyToBootEx (
> + TPL_NOTIFY,
> + PpttSetAcpiTable,
> + NULL,
> + &ReadyToBootEvent
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + return Status;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +PpttEntryPoint(
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
> + if (EFI_ERROR (Status)) {
> + return EFI_ABORTED;
> + }
> +
> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
> + if (EFI_ERROR (Status)) {
> + return EFI_ABORTED;
> + }
> +
> + InitPpttTable ();
> +
> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> new file mode 100644
> index 0000000..5dc635f
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> @@ -0,0 +1,142 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
2018?
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
Platform/ARM/JunoPkg/AcpiTables.
> +*
> +**/
> +
> +#ifndef _PPTT_H_
> +#define _PPTT_H_
> +
> +#include <IndustryStandard/Acpi.h>
> +#include <Library/ArmLib/ArmLibPrivate.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Protocol/AcpiSystemDescriptionTable.h>
> +#include <Protocol/AcpiTable.h>
> +#include "../D05AcpiTables/Hi1616Platform.h"
> +
> +///
> +/// "PPTT" Processor Properties Topology Table
> +///
> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
> +#define EFI_ACPI_MAX_NUM_TABLES 20
> +
> +#define PPTT_TABLE_MAX_LEN 0x6000
> +#define PPTT_SOCKET_NO 0x2
> +#define PPTT_DIE_NO 0x2
> +#define PPTT_CULSTER_NO 0x4
> +#define PPTT_CORE_NO 0x4
> +#define PPTT_SOCKET_COMPONENT_NO 0x1
> +#define PPTT_CACHE_NO 0x4
> +
> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
> +#define PPTT_TYPE0_CLUSTER_FLAG 0
> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
> +
> +#define PPTT_TYPE1_SIZE_VALID BIT0
> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
> +
> +typedef union {
> + struct {
> + UINT32 InD :1;
> + UINT32 Level :3;
> + UINT32 Reserved :28;
> + } Bits;
> + UINT32 Data;
> +}CSSELR_DATA;
> +
> +typedef union {
> + struct {
> + UINT32 LineSize :3;
> + UINT32 Associativity :10;
> + UINT32 NumSets :15;
> + UINT32 Wa :1;
> + UINT32 Ra :1;
> + UINT32 Wb :1;
> + UINT32 Wt :1;
> + } Bits;
> + UINT32 Data;
> +}CCSIDR_DATA;
> +
> +//
> +// Processor Hierarchy Node Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 Flags;
> + UINT32 Parent;
> + UINT32 AcpiProcessorId;
> + UINT32 PrivateResourceNo;
> +} EFI_ACPI_6_2_PPTT_TYPE0;
> +
> +//
> +// Cache Configuration
> +//
> +typedef union {
> + struct {
> + UINT8 AllocateType :2;
> + UINT8 CacheType :2;
> + UINT8 WritePolicy :1;
> + UINT8 Reserved :3;
> + } Bits;
> + UINT8 Data;
> +}PPTT_TYPE1_ATTRIBUTES;
> +
> +//
> +// Cache Type Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 Flags;
> + UINT32 NextLevelOfCache;
> + UINT32 Size;
> + UINT32 NumberOfSets;
> + UINT8 Associativity;
> + UINT8 Attributes;
> + UINT16 LineSize;
> +} EFI_ACPI_6_2_PPTT_TYPE1;
> +
> +//
> +// ID Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 VendorId;
> + UINT64 Level1Id;
> + UINT64 Level2Id;
> + UINT16 MajorRev;
> + UINT16 MinorRev;
> + UINT16 SpinRev;
> +} EFI_ACPI_6_2_PPTT_TYPE2;
> +
> +#endif // _PPTT_H_
> +
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> new file mode 100644
> index 0000000..ce26b97
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> @@ -0,0 +1,55 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
2018?
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
Platform/ARM/JunoPkg/AcpiTables.
> +*
> +**/
> +
> +[Defines]
> + INF_VERSION = 0x00010005
A new .inf should probably claim 0x00010020.
> + BASE_NAME = AcpiPptt
> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = PpttEntryPoint
> +
> +[Sources.common]
> + Pptt.c
> + Pptt.h
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
This is incorrect - path resolution should be using PACKAGES_PATH and
refer only to Silicon/Hisilicon/HisiPkg.dec.
> + ArmPkg/ArmPkg.dec
Please sort these alphabetically.
> +
> +[LibraryClasses]
> + ArmLib
> + HobLib
> + UefiRuntimeServicesTableLib
> + UefiDriverEntryPoint
> + BaseMemoryLib
> + DebugLib
Please sort these alphabetically.
> +
> +[Guids]
> +
> +
> +[Protocols]
> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> + gEfiAcpiSdtProtocolGuid
Please sort these alphabetically (where there is not a more logical
grouping available).
/
Leif
> +
> +[Pcd]
> +
> +
> +[Depex]
> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
> +
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-22 13:53 ` Leif Lindholm
@ 2018-01-22 14:15 ` Leif Lindholm
2018-01-24 13:49 ` graeme.gregory
1 sibling, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-22 14:15 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Mon, Jan 22, 2018 at 01:53:18PM +0000, Leif Lindholm wrote:
> > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> > new file mode 100644
> > index 0000000..ce26b97
> > --- /dev/null
> > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> > @@ -0,0 +1,55 @@
> > +/** @file
> > +*
> > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> > +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>
> 2018?
>
> > +*
> > +* This program and the accompanying materials
> > +* are licensed and made available under the terms and conditions of the BSD License
> > +* which accompanies this distribution. The full text of the license may be found at
> > +* http://opensource.org/licenses/bsd-license.php
> > +*
> > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +*
> > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>
> Platform/ARM/JunoPkg/AcpiTables.
>
> > +*
> > +**/
> > +
> > +[Defines]
> > + INF_VERSION = 0x00010005
>
> A new .inf should probably claim 0x00010020.
WARNING: extended periods of non-work may adversely affect your
hexadecimal arithmetic skills.
Clearly this should say 0x0001001a for 1.26. (Thanks, Ard.)
/
Leif
> > + BASE_NAME = AcpiPptt
> > + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
> > + MODULE_TYPE = DXE_DRIVER
> > + VERSION_STRING = 1.0
> > + ENTRY_POINT = PpttEntryPoint
> > +
> > +[Sources.common]
> > + Pptt.c
> > + Pptt.h
> > +
> > +[Packages]
> > + MdePkg/MdePkg.dec
> > + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
>
> This is incorrect - path resolution should be using PACKAGES_PATH and
> refer only to Silicon/Hisilicon/HisiPkg.dec.
>
> > + ArmPkg/ArmPkg.dec
>
> Please sort these alphabetically.
>
> > +
> > +[LibraryClasses]
> > + ArmLib
> > + HobLib
> > + UefiRuntimeServicesTableLib
> > + UefiDriverEntryPoint
> > + BaseMemoryLib
> > + DebugLib
>
> Please sort these alphabetically.
>
> > +
> > +[Guids]
> > +
> > +
> > +[Protocols]
> > + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> > + gEfiAcpiSdtProtocolGuid
>
> Please sort these alphabetically (where there is not a more logical
> grouping available).
>
> /
> Leif
>
> > +
> > +[Pcd]
> > +
> > +
> > +[Depex]
> > + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
> > +
> > --
> > 1.9.1
> >
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver
2018-01-18 15:01 ` [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver Ming Huang
2018-01-20 10:27 ` Ard Biesheuvel
@ 2018-01-22 18:38 ` Leif Lindholm
2018-01-23 6:03 ` Huangming (Mark)
1 sibling, 1 reply; 72+ messages in thread
From: Leif Lindholm @ 2018-01-22 18:38 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
Please provide a detailed commit message.
For example, explain that:
- Generic BDS use configurable build-time, enabled by default.
(Why? Is this intended to be temporary?)
- Hisilicon-specific PlatformBootManagerLib added.
(Why? What features are added compared to default one?)
Minor comments below.
On Thu, Jan 18, 2018 at 11:01:31PM +0800, Ming Huang wrote:
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> ---
> Platform/Hisilicon/D03/D03.dsc | 24 +
> Platform/Hisilicon/D03/D03.fdf | 7 +
> Platform/Hisilicon/D05/D05.dsc | 27 +-
> Platform/Hisilicon/D05/D05.fdf | 7 +
> Silicon/Hisilicon/Hisilicon.dsc.inc | 1 +
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 588 +++++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 89 +++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
> 9 files changed, 1481 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index b434f68..f7efff5 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -28,6 +28,7 @@
> BUILD_TARGETS = DEBUG|RELEASE
> SKUID_IDENTIFIER = DEFAULT
> FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
> + DEFINE GENERIC_BDS = TRUE
>
> !include Silicon/Hisilicon/Hisilicon.dsc.inc
>
> @@ -68,6 +69,14 @@
> CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> +!if $(GENERIC_BDS) == TRUE
> + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> +!endif
> CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
>
> # USB Requirements
> @@ -188,6 +197,9 @@
>
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
> gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
> +!if $(GENERIC_BDS) == TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
> +!endif
>
> gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
> gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
> @@ -405,6 +417,14 @@
> MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Application/UiApp/UiApp.inf {
> + <LibraryClasses>
> + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
> + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
> + }
> +!endif
> MdeModulePkg/Application/HelloWorld/HelloWorld.inf
> #
> # Bds
> @@ -457,7 +477,11 @@
>
> MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
>
> #
> # UEFI application (Shell Embedded Boot Loader)
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index 0b38eb4..0d704b5 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -283,6 +283,9 @@ READ_LOCK_STATUS = TRUE
> INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> !endif #$(INCLUDE_TFTP_COMMAND)
>
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Application/UiApp/UiApp.inf
> +!endif
> #
> # Bds
> #
> @@ -291,7 +294,11 @@ READ_LOCK_STATUS = TRUE
> INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
> INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
>
> [FV.FVMAIN_COMPACT]
> FvAlignment = 16
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 710339c..57370dc 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -31,7 +31,7 @@
> DEFINE EDK2_SKIP_PEICORE=0
> DEFINE NETWORK_IP6_ENABLE = FALSE
> DEFINE HTTP_BOOT_ENABLE = FALSE
> -
> + DEFINE GENERIC_BDS = TRUE
Please don't randomly drop whitespace or move it around.
> !include Silicon/Hisilicon/Hisilicon.dsc.inc
>
> [LibraryClasses.common]
> @@ -84,6 +84,14 @@
> CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
> +!if $(GENERIC_BDS) == TRUE
> + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
> + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
> + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
> + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
> + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
> +!endif
> CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
>
> # USB Requirements
> @@ -119,6 +127,7 @@
> # It could be set FALSE to save size.
> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
>
> [PcdsFixedAtBuild.common]
> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
> @@ -203,7 +212,9 @@
>
> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
> gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
> -
Please don't randomly drop whitespace or move it around.
> +!if $(GENERIC_BDS) == TRUE
> + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
> +!endif
> gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
> gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
>
> @@ -560,6 +571,14 @@
> MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
> MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Application/UiApp/UiApp.inf {
> + <LibraryClasses>
> + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
> + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
> + }
> +!endif
> #
> # Bds
> #
> @@ -610,7 +629,11 @@
> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
> MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
> #
> # UEFI application (Shell Embedded Boot Loader)
> #
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 97de4d2..d209210 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -305,6 +305,9 @@ READ_LOCK_STATUS = TRUE
> INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
> !endif #$(INCLUDE_TFTP_COMMAND)
>
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Application/UiApp/UiApp.inf
> +!endif
> #
> # Bds
> #
> @@ -313,7 +316,11 @@ READ_LOCK_STATUS = TRUE
> INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
> INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
> INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
> +!if $(GENERIC_BDS) == TRUE
> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!else
> INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
> +!endif
>
> [FV.FVMAIN_COMPACT]
> FvAlignment = 16
> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
> index cc23673..308064b 100644
> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
> @@ -263,6 +263,7 @@
> gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
> gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
> gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
> + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
>
> # DEBUG_ASSERT_ENABLED 0x01
> # DEBUG_PRINT_ENABLED 0x02
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> new file mode 100644
> index 0000000..5d8d58e
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> @@ -0,0 +1,588 @@
> +/** @file
> + Implementation for PlatformBootManagerLib library class interfaces.
> +
> + Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> + Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
> +
> + This program and the accompanying materials are licensed and made available
> + under the terms and conditions of the BSD License which accompanies this
> + distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <IndustryStandard/Pci22.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/PcdLib.h>
> +#include <Library/UefiBootManagerLib.h>
> +#include <Library/UefiLib.h>
> +#include <Protocol/DevicePath.h>
> +#include <Protocol/EsrtManagement.h>
> +#include <Protocol/GenericMemoryTest.h>
> +#include <Protocol/GraphicsOutput.h>
> +#include <Protocol/LoadedImage.h>
> +#include <Protocol/PciIo.h>
> +#include <Protocol/PciRootBridgeIo.h>
> +#include <Guid/EventGroup.h>
> +#include <Guid/TtyTerm.h>
> +
> +#include "PlatformBm.h"
> +
> +#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
> +
> +
> +#pragma pack (1)
> +typedef struct {
> + VENDOR_DEVICE_PATH SerialDxe;
> + UART_DEVICE_PATH Uart;
> + VENDOR_DEFINED_DEVICE_PATH TermType;
> + EFI_DEVICE_PATH_PROTOCOL End;
> +} PLATFORM_SERIAL_CONSOLE;
> +#pragma pack ()
> +
> +#define SERIAL_DXE_FILE_GUID { \
> + 0xD3987D4B, 0x971A, 0x435F, \
> + { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
> + }
> +
> +EFI_GUID EblAppGuid2 = {0x3CEF354A,0x3B7A,0x4519,{0xAD,0x70,0x72,0xA1,0x34,0x69,0x83,0x11}};
> +
> +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
> + //
> + // VENDOR_DEVICE_PATH SerialDxe
> + //
> + {
> + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
> + SERIAL_DXE_FILE_GUID
> + },
> +
> + //
> + // UART_DEVICE_PATH Uart
> + //
> + {
> + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
> + 0, // Reserved
> + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
> + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
> + FixedPcdGet8 (PcdUartDefaultParity), // Parity
> + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
> + },
> +
> + //
> + // VENDOR_DEFINED_DEVICE_PATH TermType
> + //
> + {
> + {
> + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
> + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
> + }
> + //
> + // Guid to be filled in dynamically
> + //
> + },
> +
> + //
> + // EFI_DEVICE_PATH_PROTOCOL End
> + //
> + {
> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
> + }
> +};
> +
> +
> +#pragma pack (1)
> +typedef struct {
> + USB_CLASS_DEVICE_PATH Keyboard;
> + EFI_DEVICE_PATH_PROTOCOL End;
> +} PLATFORM_USB_KEYBOARD;
> +#pragma pack ()
> +
> +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
> + //
> + // USB_CLASS_DEVICE_PATH Keyboard
> + //
> + {
> + {
> + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
> + DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
> + },
> + 0xFFFF, // VendorId: any
> + 0xFFFF, // ProductId: any
> + 3, // DeviceClass: HID
> + 1, // DeviceSubClass: boot
> + 1 // DeviceProtocol: keyboard
> + },
> +
> + //
> + // EFI_DEVICE_PATH_PROTOCOL End
> + //
> + {
> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
> + }
> +};
> +
> +
> +/**
> + Check if the handle satisfies a particular condition.
> +
> + @param[in] Handle The handle to check.
> + @param[in] ReportText A caller-allocated string passed in for reporting
> + purposes. It must never be NULL.
> +
> + @retval TRUE The condition is satisfied.
> + @retval FALSE Otherwise. This includes the case when the condition could not
> + be fully evaluated due to an error.
> +**/
> +typedef
> +BOOLEAN
> +(EFIAPI *FILTER_FUNCTION) (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + );
> +
> +
> +/**
> + Process a handle.
> +
> + @param[in] Handle The handle to process.
> + @param[in] ReportText A caller-allocated string passed in for reporting
> + purposes. It must never be NULL.
> +**/
> +typedef
> +VOID
> +(EFIAPI *CALLBACK_FUNCTION) (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + );
> +
> +/**
> + Locate all handles that carry the specified protocol, filter them with a
> + callback function, and pass each handle that passes the filter to another
> + callback.
> +
> + @param[in] ProtocolGuid The protocol to look for.
> +
> + @param[in] Filter The filter function to pass each handle to. If this
> + parameter is NULL, then all handles are processed.
> +
> + @param[in] Process The callback function to pass each handle to that
> + clears the filter.
> +**/
> +STATIC
> +VOID
> +FilterAndProcess (
> + IN EFI_GUID *ProtocolGuid,
> + IN FILTER_FUNCTION Filter OPTIONAL,
> + IN CALLBACK_FUNCTION Process
> + )
> +{
> + EFI_STATUS Status;
> + EFI_HANDLE *Handles;
> + UINTN NoHandles;
> + UINTN Idx;
> +
> + Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
> + NULL /* SearchKey */, &NoHandles, &Handles);
> + if (EFI_ERROR (Status)) {
> + //
> + // This is not an error, just an informative condition.
> + //
> + DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
> + Status));
> + return;
> + }
> +
> + ASSERT (NoHandles > 0);
> + for (Idx = 0; Idx < NoHandles; ++Idx) {
> + CHAR16 *DevicePathText;
> + STATIC CHAR16 Fallback[] = L"<device path unavailable>";
> +
> + //
> + // The ConvertDevicePathToText() function handles NULL input transparently.
> + //
> + DevicePathText = ConvertDevicePathToText (
> + DevicePathFromHandle (Handles[Idx]),
> + FALSE, // DisplayOnly
> + FALSE // AllowShortcuts
> + );
> + if (DevicePathText == NULL) {
> + DevicePathText = Fallback;
> + }
> +
> + if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
> + Process (Handles[Idx], DevicePathText);
> + }
> +
> + if (DevicePathText != Fallback) {
> + FreePool (DevicePathText);
> + }
> + }
> + gBS->FreePool (Handles);
> +}
> +
> +
> +/**
> + This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
> +**/
> +STATIC
> +BOOLEAN
> +EFIAPI
> +IsPciDisplay (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + )
> +{
> + EFI_STATUS Status;
> + EFI_PCI_IO_PROTOCOL *PciIo;
> + PCI_TYPE00 Pci;
> +
> + Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
> + (VOID**)&PciIo);
> + if (EFI_ERROR (Status)) {
> + //
> + // This is not an error worth reporting.
> + //
> + return FALSE;
> + }
> +
> + Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
> + sizeof Pci / sizeof (UINT32), &Pci);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
> + return FALSE;
> + }
> +
> + return IS_PCI_DISPLAY (&Pci);
> +}
> +
> +
> +/**
> + This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
> + the matching driver to produce all first-level child handles.
> +**/
> +STATIC
> +VOID
> +EFIAPI
> +Connect (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->ConnectController (
> + Handle, // ControllerHandle
> + NULL, // DriverImageHandle
> + NULL, // RemainingDevicePath -- produce all children
> + FALSE // Recursive
> + );
> + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n",
> + __FUNCTION__, ReportText, Status));
> +}
> +
> +
> +/**
> + This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
> + handle, and adds it to ConOut and ErrOut.
> +**/
> +STATIC
> +VOID
> +EFIAPI
> +AddOutput (
> + IN EFI_HANDLE Handle,
> + IN CONST CHAR16 *ReportText
> + )
> +{
> + EFI_STATUS Status;
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> +
> + DevicePath = DevicePathFromHandle (Handle);
> + if (DevicePath == NULL) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n",
> + __FUNCTION__, ReportText, Handle));
> + return;
> + }
> +
> + Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
> + ReportText, Status));
> + return;
> + }
> +
> + Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
> + ReportText, Status));
> + return;
> + }
> +
> + DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
> + ReportText));
> +}
> +
> +STATIC
> +VOID
> +PlatformRegisterFvBootOption (
> + EFI_GUID *FileGuid,
> + CHAR16 *Description,
> + UINT32 Attributes
> + )
> +{
> + EFI_STATUS Status;
> + INTN OptionIndex;
> + EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
> + UINTN BootOptionCount;
> + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
> + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
> +
> + Status = gBS->HandleProtocol (
> + gImageHandle,
> + &gEfiLoadedImageProtocolGuid,
> + (VOID **) &LoadedImage
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
> + DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
> + ASSERT (DevicePath != NULL);
> + DevicePath = AppendDevicePathNode (
> + DevicePath,
> + (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
> + );
> + ASSERT (DevicePath != NULL);
> +
> + Status = EfiBootManagerInitializeLoadOption (
> + &NewOption,
> + LoadOptionNumberUnassigned,
> + LoadOptionTypeBoot,
> + Attributes,
> + Description,
> + DevicePath,
> + NULL,
> + 0
> + );
> + ASSERT_EFI_ERROR (Status);
> + FreePool (DevicePath);
> +
> + BootOptions = EfiBootManagerGetLoadOptions (
> + &BootOptionCount, LoadOptionTypeBoot
> + );
> +
> + OptionIndex = EfiBootManagerFindLoadOption (
> + &NewOption, BootOptions, BootOptionCount
> + );
> +
> + if (OptionIndex == -1) {
> + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
> + ASSERT_EFI_ERROR (Status);
> + }
> + EfiBootManagerFreeLoadOption (&NewOption);
> + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
> +}
> +
> +
> +STATIC
> +VOID
> +PlatformRegisterOptionsAndKeys (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + EFI_INPUT_KEY Enter;
> + EFI_INPUT_KEY F2;
> + EFI_INPUT_KEY Esc;
> + EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
> +
> + //
> + // Register ENTER as CONTINUE key
> + //
> + Enter.ScanCode = SCAN_NULL;
> + Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
> + Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
> + ASSERT_EFI_ERROR (Status);
> +
> + //
> + // Map F2 and ESC to Boot Manager Menu
> + //
> + F2.ScanCode = SCAN_F2;
> + F2.UnicodeChar = CHAR_NULL;
> + Esc.ScanCode = SCAN_ESC;
> + Esc.UnicodeChar = CHAR_NULL;
> +
> + Status = EfiBootManagerGetBootManagerMenu (&BootOption);
> + ASSERT_EFI_ERROR (Status);
> + Status = EfiBootManagerAddKeyOptionVariable (
> + NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
> + );
> + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
> + Status = EfiBootManagerAddKeyOptionVariable (
> + NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
> + );
> + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
> +}
> +
> +VOID
> +UpdateMemory (
> + )
> +{
> + EFI_STATUS Status;
> + EFI_GENERIC_MEMORY_TEST_PROTOCOL* MemoryTest;
> + BOOLEAN RequireSoftECCInit = FALSE;
> +
> + //Add MemoryTest for memmap add above 4G memory.
> + Status = gBS->LocateProtocol (&gEfiGenericMemTestProtocolGuid, NULL, (VOID**)&MemoryTest);
Line length.
> + if (!EFI_ERROR (Status)) {
> + (VOID)MemoryTest->MemoryTestInit (MemoryTest, IGNORE, &RequireSoftECCInit);
> + } else {
> + DEBUG ((DEBUG_ERROR, "LocateProtocol for GenericMemTestProtocol fail(%r)\n", Status));
Line length.
> + }
> +
> + return;
> +}
> +
> +//
> +// BDS Platform Functions
> +//
> +/**
> + Do the platform init, can be customized by OEM/IBV
> + Possible things that can be done in PlatformBootManagerBeforeConsole:
> + > Update console variable: 1. include hot-plug devices;
> + > 2. Clear ConIn and add SOL for AMT
> + > Register new Driver#### or Boot####
> + > Register new Key####: e.g.: F12
> + > Signal ReadyToLock event
> + > Authentication action: 1. connect Auth devices;
> + > 2. Identify auto logon user.
Please don't use ">" in this way, it confuses review (at least for me).
> +**/
> +VOID
> +EFIAPI
> +PlatformBootManagerBeforeConsole (
> + VOID
> + )
> +{
> + //
> + // Signal EndOfDxe PI Event
> + //
> + EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
> +
> + UpdateMemory ();
> +
> + //
> + // Locate the PCI root bridges and make the PCI bus driver connect each,
> + // non-recursively. This will produce a number of child handles with PciIo on
> + // them.
> + //
> + FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
> +
> + //
> + // Find all display class PCI devices (using the handles from the previous
> + // step), and connect them non-recursively. This should produce a number of
> + // child handles with GOPs on them.
> + //
> + FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
> +
> + //
> + // Now add the device path of all handles with GOP on them to ConOut and
> + // ErrOut.
> + //
> + FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
> +
> + //
> + // Add the hardcoded short-form USB keyboard device path to ConIn.
> + //
> + EfiBootManagerUpdateConsoleVariable (ConIn,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
> +
> + //
> + // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
> + //
> + ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4);
> + CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
> +
> + EfiBootManagerUpdateConsoleVariable (ConIn,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
> + EfiBootManagerUpdateConsoleVariable (ConOut,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
> + EfiBootManagerUpdateConsoleVariable (ErrOut,
> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
> +
> + //
> + // Register platform-specific boot options and keyboard shortcuts.
> + //
> + PlatformRegisterOptionsAndKeys ();
> +}
> +
> +/**
> + Do the platform specific action after the console is ready
> + Possible things that can be done in PlatformBootManagerAfterConsole:
> + > Console post action:
> + > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
> + > Signal console ready platform customized event
> + > Run diagnostics like memory testing
> + > Connect certain devices
> + > Dispatch aditional option roms
> + > Special boot: e.g.: USB boot, enter UI
Please don't use ">" in this way, it confuses review (at least for me).
> +**/
> +VOID
> +EFIAPI
> +PlatformBootManagerAfterConsole (
> + VOID
> + )
> +{
> + EFI_STATUS Status;
> + ESRT_MANAGEMENT_PROTOCOL *EsrtManagement = NULL;
> +
> + //
> + // Show the splash screen.
> + //
> + EnableQuietBoot (PcdGetPtr (PcdLogoFile));
> +
> + //
> + // Connect the rest of the devices.
> + //
> + EfiBootManagerConnectAll ();
> +
> + //
> + // Enumerate all possible boot options.
> + //
> + EfiBootManagerRefreshAllBootOption ();
> +
> + //
> + //Sync Esrt Table
> + //
> + Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL, (VOID **)&EsrtManagement);
Line length.
> + if (!EFI_ERROR (Status)) {
> + Status = EsrtManagement->SyncEsrtFmp ();
> + }
> +
> + //
> + // Register UEFI Shell
> + //
> + PlatformRegisterFvBootOption (
> + PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
> + );
> +}
> +
> +/**
> + This function is called each second during the boot manager waits the
> + timeout.
> +
> + @param TimeoutRemain The remaining timeout.
> +**/
> +VOID
> +EFIAPI
> +PlatformBootManagerWaitCallback (
> + UINT16 TimeoutRemain
> + )
> +{
> + Print(L"\r%-2d seconds left, Press Esc or F2 to enter Setup.", TimeoutRemain);
Space before (.
> +}
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
> new file mode 100644
> index 0000000..0a3c626
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
> @@ -0,0 +1,59 @@
> +/** @file
> + Head file for BDS Platform specific code
> +
> + Copyright (C) 2015-2016, Red Hat, Inc.
> + Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
> +
> + This program and the accompanying materials are licensed and made available
> + under the terms and conditions of the BSD License which accompanies this
> + distribution. The full text of the license may be found at
> + http://opensource.org/licenses/bsd-license.php
> +
> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
> + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#ifndef _PLATFORM_BM_H_
> +#define _PLATFORM_BM_H_
> +
> +#include <Library/BaseLib.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/DevicePathLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Library/UefiRuntimeServicesTableLib.h>
> +
> +/**
> + Use SystemTable Conout to stop video based Simple Text Out consoles from
> + going to the video device. Put up LogoFile on every video device that is a
> + console.
> +
> + @param[in] LogoFile File name of logo to display on the center of the
> + screen.
> +
> + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo
> + displayed.
> + @retval EFI_UNSUPPORTED Logo not found
> +**/
> +EFI_STATUS
> +EnableQuietBoot (
> + IN EFI_GUID *LogoFile
> + );
> +
> +/**
> + Use SystemTable Conout to turn on video based Simple Text Out consoles. The
> + Simple Text Out screens will now be synced up with all non video output
> + devices
> +
> + @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
> +**/
> +EFI_STATUS
> +DisableQuietBoot (
> + VOID
> + );
> +
> +#endif // _PLATFORM_BM_H_
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> new file mode 100644
> index 0000000..ae274f3
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> @@ -0,0 +1,89 @@
> +## @file
> +# Implementation for PlatformBootManagerLib library class interfaces.
> +#
> +# Copyright (C) 2015-2016, Red Hat, Inc.
> +# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> +# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
> +# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
> +#
> +# This program and the accompanying materials are licensed and made available
> +# under the terms and conditions of the BSD License which accompanies this
> +# distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> +# IMPLIED.
> +#
> +##
> +
> +[Defines]
> + INF_VERSION = 0x00010005
0x0001001a
> + BASE_NAME = PlatformBootManagerLib
> + FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
> +
> +#
> +# The following information is for reference only and not required by the build tools.
> +#
> +# VALID_ARCHITECTURES = ARM AARCH64
> +#
> +
> +[Sources]
> + PlatformBm.c
> + QuietBoot.c
> +
> +[Packages]
> + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
> + MdePkg/MdePkg.dec
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + DevicePathLib
> + DxeServicesLib
> + MemoryAllocationLib
> + PcdLib
> + PrintLib
> + UefiBootManagerLib
> + UefiBootServicesTableLib
> + UefiLib
> +
> +[FeaturePcd]
> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable
> + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
> +
> +[FixedPcd]
> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile
> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
> + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
> +
> +[Pcd]
> + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
> +
> +[Guids]
> + gEfiFileInfoGuid
> + gEfiFileSystemInfoGuid
> + gEfiFileSystemVolumeLabelInfoIdGuid
> + gEfiEndOfDxeEventGroupGuid
Please sort alphabetically (move gEfiEndOfDxeEventGroupGuid first).
> + gEfiTtyTermGuid
> +
> +[Protocols]
> + gEfiDevicePathProtocolGuid
> + gEfiFirmwareVolume2ProtocolGuid
> + gEfiGenericMemTestProtocolGuid
> + gEfiGraphicsOutputProtocolGuid
> + gEfiLoadedImageProtocolGuid
> + gEfiOEMBadgingProtocolGuid
> + gEfiPciRootBridgeIoProtocolGuid
> + gEfiSimpleFileSystemProtocolGuid
> + gEsrtManagementProtocolGuid
> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
> new file mode 100644
> index 0000000..0bd15da
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
> @@ -0,0 +1,681 @@
> +/** @file
> +Platform BDS function for quiet boot support.
> +
> +Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
> +Copyright (c) 2018, Hisilicon Limited. All rights reserved.
> +Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
> +This program and the accompanying materials
> +are licensed and made available under the terms and conditions of the BSD License
> +which accompanies this distribution. The full text of the license may be found at
> +http://opensource.org/licenses/bsd-license.php
> +
> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +
> +**/
> +
> +#include <IndustryStandard/Bmp.h>
> +#include <Library/DxeServicesLib.h>
> +#include <Protocol/BootLogo.h>
> +#include <Protocol/OEMBadging.h>
> +#include <Protocol/UgaDraw.h>
> +
> +#include "PlatformBm.h"
> +
> +/**
> + Convert a *.BMP graphics image to a GOP blt buffer. If a NULL Blt buffer
> + is passed in a GopBlt buffer will be allocated by this routine. If a GopBlt
> + buffer is passed in it will be used if it is big enough.
> +
> + @param BmpImage Pointer to BMP file
> + @param BmpImageSize Number of bytes in BmpImage
> + @param GopBlt Buffer containing GOP version of BmpImage.
> + @param GopBltSize Size of GopBlt in bytes.
> + @param PixelHeight Height of GopBlt/BmpImage in pixels
> + @param PixelWidth Width of GopBlt/BmpImage in pixels
> +
> + @retval EFI_SUCCESS GopBlt and GopBltSize are returned.
> + @retval EFI_UNSUPPORTED BmpImage is not a valid *.BMP image
> + @retval EFI_BUFFER_TOO_SMALL The passed in GopBlt buffer is not big enough.
> + GopBltSize will contain the required size.
> + @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate.
> +
> +**/
> +STATIC
> +EFI_STATUS
> +ConvertBmpToGopBlt (
> + IN VOID *BmpImage,
> + IN UINTN BmpImageSize,
> + IN OUT VOID **GopBlt,
> + IN OUT UINTN *GopBltSize,
> + OUT UINTN *PixelHeight,
> + OUT UINTN *PixelWidth
> + )
> +{
> + UINT8 *Image;
> + UINT8 *ImageHeader;
> + BMP_IMAGE_HEADER *BmpHeader;
> + BMP_COLOR_MAP *BmpColorMap;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
> + UINT64 BltBufferSize;
> + UINTN Index;
> + UINTN Height;
> + UINTN Width;
> + UINTN ImageIndex;
> + UINT32 DataSizePerLine;
> + BOOLEAN IsAllocated;
> + UINT32 ColorMapNum;
> +
> + if (sizeof (BMP_IMAGE_HEADER) > BmpImageSize) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + BmpHeader = (BMP_IMAGE_HEADER *) BmpImage;
> +
> + if (BmpHeader->CharB != 'B' || BmpHeader->CharM != 'M') {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Doesn't support compress.
> + //
> + if (BmpHeader->CompressionType != 0) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Only support BITMAPINFOHEADER format.
> + // BITMAPFILEHEADER + BITMAPINFOHEADER = BMP_IMAGE_HEADER
> + //
> + if (BmpHeader->HeaderSize != sizeof (BMP_IMAGE_HEADER) - OFFSET_OF(BMP_IMAGE_HEADER, HeaderSize)) {
Line length.
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // The data size in each line must be 4 byte alignment.
> + //
> + DataSizePerLine = ((BmpHeader->PixelWidth * BmpHeader->BitPerPixel + 31) >> 3) & (~0x3);
Line length.
> + BltBufferSize = MultU64x32 (DataSizePerLine, BmpHeader->PixelHeight);
> + if (BltBufferSize > (UINT32) ~0) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if ((BmpHeader->Size != BmpImageSize) ||
> + (BmpHeader->Size < BmpHeader->ImageOffset) ||
> + (BmpHeader->Size - BmpHeader->ImageOffset != BmpHeader->PixelHeight * DataSizePerLine)) {
Line length.
In general, this file seems to mainly duplicate generically useful
functions found in various locations in the edk2 tree.
Could this instead be broken out into one or several helper libraries
to keep in edk2?
/
Leif
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + //
> + // Calculate Color Map offset in the image.
> + //
> + Image = BmpImage;
> + BmpColorMap = (BMP_COLOR_MAP *) (Image + sizeof (BMP_IMAGE_HEADER));
> + if (BmpHeader->ImageOffset < sizeof (BMP_IMAGE_HEADER)) {
> + return EFI_INVALID_PARAMETER;
> + }
> +
> + if (BmpHeader->ImageOffset > sizeof (BMP_IMAGE_HEADER)) {
> + switch (BmpHeader->BitPerPixel) {
> + case 1:
> + ColorMapNum = 2;
> + break;
> + case 4:
> + ColorMapNum = 16;
> + break;
> + case 8:
> + ColorMapNum = 256;
> + break;
> + default:
> + ColorMapNum = 0;
> + break;
> + }
> + //
> + // BMP file may has padding data between the bmp header section and the bmp data section.
> + //
> + if (BmpHeader->ImageOffset - sizeof (BMP_IMAGE_HEADER) < sizeof (BMP_COLOR_MAP) * ColorMapNum) {
> + return EFI_INVALID_PARAMETER;
> + }
> + }
> +
> + //
> + // Calculate graphics image data address in the image
> + //
> + Image = ((UINT8 *) BmpImage) + BmpHeader->ImageOffset;
> + ImageHeader = Image;
> +
> + //
> + // Calculate the BltBuffer needed size.
> + //
> + BltBufferSize = MultU64x32 ((UINT64) BmpHeader->PixelWidth, BmpHeader->PixelHeight);
> + //
> + // Ensure the BltBufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
> + //
> + if (BltBufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
> + return EFI_UNSUPPORTED;
> + }
> + BltBufferSize = MultU64x32 (BltBufferSize, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
> +
> + IsAllocated = FALSE;
> + if (*GopBlt == NULL) {
> + //
> + // GopBlt is not allocated by caller.
> + //
> + *GopBltSize = (UINTN) BltBufferSize;
> + *GopBlt = AllocatePool (*GopBltSize);
> + IsAllocated = TRUE;
> + if (*GopBlt == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + } else {
> + //
> + // GopBlt has been allocated by caller.
> + //
> + if (*GopBltSize < (UINTN) BltBufferSize) {
> + *GopBltSize = (UINTN) BltBufferSize;
> + return EFI_BUFFER_TOO_SMALL;
> + }
> + }
> +
> + *PixelWidth = BmpHeader->PixelWidth;
> + *PixelHeight = BmpHeader->PixelHeight;
> +
> + //
> + // Convert image from BMP to Blt buffer format
> + //
> + BltBuffer = *GopBlt;
> + for (Height = 0; Height < BmpHeader->PixelHeight; Height++) {
> + Blt = &BltBuffer[(BmpHeader->PixelHeight - Height - 1) * BmpHeader->PixelWidth];
> + for (Width = 0; Width < BmpHeader->PixelWidth; Width++, Image++, Blt++) {
> + switch (BmpHeader->BitPerPixel) {
> + case 1:
> + //
> + // Convert 1-bit (2 colors) BMP to 24-bit color
> + //
> + for (Index = 0; Index < 8 && Width < BmpHeader->PixelWidth; Index++) {
> + Blt->Red = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Red;
> + Blt->Green = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Green;
> + Blt->Blue = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Blue;
> + Blt++;
> + Width++;
> + }
> +
> + Blt--;
> + Width--;
> + break;
> +
> + case 4:
> + //
> + // Convert 4-bit (16 colors) BMP Palette to 24-bit color
> + //
> + Index = (*Image) >> 4;
> + Blt->Red = BmpColorMap[Index].Red;
> + Blt->Green = BmpColorMap[Index].Green;
> + Blt->Blue = BmpColorMap[Index].Blue;
> + if (Width < (BmpHeader->PixelWidth - 1)) {
> + Blt++;
> + Width++;
> + Index = (*Image) & 0x0f;
> + Blt->Red = BmpColorMap[Index].Red;
> + Blt->Green = BmpColorMap[Index].Green;
> + Blt->Blue = BmpColorMap[Index].Blue;
> + }
> + break;
> +
> + case 8:
> + //
> + // Convert 8-bit (256 colors) BMP Palette to 24-bit color
> + //
> + Blt->Red = BmpColorMap[*Image].Red;
> + Blt->Green = BmpColorMap[*Image].Green;
> + Blt->Blue = BmpColorMap[*Image].Blue;
> + break;
> +
> + case 24:
> + //
> + // It is 24-bit BMP.
> + //
> + Blt->Blue = *Image++;
> + Blt->Green = *Image++;
> + Blt->Red = *Image;
> + break;
> +
> + default:
> + //
> + // Other bit format BMP is not supported.
> + //
> + if (IsAllocated) {
> + FreePool (*GopBlt);
> + *GopBlt = NULL;
> + }
> + return EFI_UNSUPPORTED;
> + };
> +
> + }
> +
> + ImageIndex = (UINTN) (Image - ImageHeader);
> + if ((ImageIndex % 4) != 0) {
> + //
> + // Bmp Image starts each row on a 32-bit boundary!
> + //
> + Image = Image + (4 - (ImageIndex % 4));
> + }
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +/**
> + Use SystemTable Conout to stop video based Simple Text Out consoles from going
> + to the video device. Put up LogoFile on every video device that is a console.
> +
> + @param[in] LogoFile File name of logo to display on the center of the screen.
> +
> + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed.
> + @retval EFI_UNSUPPORTED Logo not found
> +
> +**/
> +EFI_STATUS
> +EnableQuietBoot (
> + IN EFI_GUID *LogoFile
> + )
> +{
> + EFI_STATUS Status;
> + EFI_OEM_BADGING_PROTOCOL *Badging;
> + UINT32 SizeOfX;
> + UINT32 SizeOfY;
> + INTN DestX;
> + INTN DestY;
> + UINT8 *ImageData;
> + UINTN ImageSize;
> + UINTN BltSize;
> + UINT32 Instance;
> + EFI_BADGING_FORMAT Format;
> + EFI_BADGING_DISPLAY_ATTRIBUTE Attribute;
> + UINTN CoordinateX;
> + UINTN CoordinateY;
> + UINTN Height;
> + UINTN Width;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
> + EFI_UGA_DRAW_PROTOCOL *UgaDraw;
> + UINT32 ColorDepth;
> + UINT32 RefreshRate;
> + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
> + EFI_BOOT_LOGO_PROTOCOL *BootLogo;
> + UINTN NumberOfLogos;
> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LogoBlt;
> + UINTN LogoDestX;
> + UINTN LogoDestY;
> + UINTN LogoHeight;
> + UINTN LogoWidth;
> + UINTN NewDestX;
> + UINTN NewDestY;
> + UINTN NewHeight;
> + UINTN NewWidth;
> + UINT64 BufferSize;
> +
> + UgaDraw = NULL;
> + //
> + // Try to open GOP first
> + //
> + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutputProtocolGuid, (VOID **) &GraphicsOutput);
> + if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + GraphicsOutput = NULL;
> + //
> + // Open GOP failed, try to open UGA
> + //
> + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiUgaDrawProtocolGuid, (VOID **) &UgaDraw);
> + }
> + if (EFI_ERROR (Status)) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Try to open Boot Logo Protocol.
> + //
> + BootLogo = NULL;
> + gBS->LocateProtocol (&gEfiBootLogoProtocolGuid, NULL, (VOID **) &BootLogo);
> +
> + //
> + // Erase Cursor from screen
> + //
> + gST->ConOut->EnableCursor (gST->ConOut, FALSE);
> +
> + Badging = NULL;
> + Status = gBS->LocateProtocol (&gEfiOEMBadgingProtocolGuid, NULL, (VOID **) &Badging);
> +
> + if (GraphicsOutput != NULL) {
> + SizeOfX = GraphicsOutput->Mode->Info->HorizontalResolution;
> + SizeOfY = GraphicsOutput->Mode->Info->VerticalResolution;
> +
> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + Status = UgaDraw->GetMode (UgaDraw, &SizeOfX, &SizeOfY, &ColorDepth, &RefreshRate);
> + if (EFI_ERROR (Status)) {
> + return EFI_UNSUPPORTED;
> + }
> + } else {
> + return EFI_UNSUPPORTED;
> + }
> +
> + Blt = NULL;
> + NumberOfLogos = 0;
> + LogoDestX = 0;
> + LogoDestY = 0;
> + LogoHeight = 0;
> + LogoWidth = 0;
> + NewDestX = 0;
> + NewDestY = 0;
> + NewHeight = 0;
> + NewWidth = 0;
> + Instance = 0;
> + Height = 0;
> + Width = 0;
> + while (1) {
> + ImageData = NULL;
> + ImageSize = 0;
> +
> + if (Badging != NULL) {
> + //
> + // Get image from OEMBadging protocol.
> + //
> + Status = Badging->GetImage (
> + Badging,
> + &Instance,
> + &Format,
> + &ImageData,
> + &ImageSize,
> + &Attribute,
> + &CoordinateX,
> + &CoordinateY
> + );
> + if (EFI_ERROR (Status)) {
> + goto Done;
> + }
> +
> + //
> + // Currently only support BMP format.
> + //
> + if (Format != EfiBadgingFormatBMP) {
> + if (ImageData != NULL) {
> + FreePool (ImageData);
> + }
> + continue;
> + }
> + } else {
> + //
> + // Get the specified image from FV.
> + //
> + Status = GetSectionFromAnyFv (LogoFile, EFI_SECTION_RAW, 0, (VOID **) &ImageData, &ImageSize);
> + if (EFI_ERROR (Status)) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + CoordinateX = 0;
> + CoordinateY = 0;
> + if (!FeaturePcdGet(PcdBootlogoOnlyEnable)) {
> + Attribute = EfiBadgingDisplayAttributeCenter;
> + } else {
> + Attribute = EfiBadgingDisplayAttributeCustomized;
> + }
> + }
> +
> + if (Blt != NULL) {
> + FreePool (Blt);
> + }
> + Blt = NULL;
> + Status = ConvertBmpToGopBlt (
> + ImageData,
> + ImageSize,
> + (VOID **) &Blt,
> + &BltSize,
> + &Height,
> + &Width
> + );
> + if (EFI_ERROR (Status)) {
> + FreePool (ImageData);
> +
> + if (Badging == NULL) {
> + return Status;
> + } else {
> + continue;
> + }
> + }
> +
> + //
> + // Calculate the display position according to Attribute.
> + //
> + switch (Attribute) {
> + case EfiBadgingDisplayAttributeLeftTop:
> + DestX = CoordinateX;
> + DestY = CoordinateY;
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterTop:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = CoordinateY;
> + break;
> +
> + case EfiBadgingDisplayAttributeRightTop:
> + DestX = (SizeOfX - Width - CoordinateX);
> + DestY = CoordinateY;;
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterRight:
> + DestX = (SizeOfX - Width - CoordinateX);
> + DestY = (SizeOfY - Height) / 2;
> + break;
> +
> + case EfiBadgingDisplayAttributeRightBottom:
> + DestX = (SizeOfX - Width - CoordinateX);
> + DestY = (SizeOfY - Height - CoordinateY);
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterBottom:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = (SizeOfY - Height - CoordinateY);
> + break;
> +
> + case EfiBadgingDisplayAttributeLeftBottom:
> + DestX = CoordinateX;
> + DestY = (SizeOfY - Height - CoordinateY);
> + break;
> +
> + case EfiBadgingDisplayAttributeCenterLeft:
> + DestX = CoordinateX;
> + DestY = (SizeOfY - Height) / 2;
> + break;
> +
> + case EfiBadgingDisplayAttributeCenter:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = (SizeOfY - Height) / 2;
> + break;
> +
> + case EfiBadgingDisplayAttributeCustomized:
> + DestX = (SizeOfX - Width) / 2;
> + DestY = ((SizeOfY * 382) / 1000) - Height / 2;
> + break;
> +
> + default:
> + DestX = CoordinateX;
> + DestY = CoordinateY;
> + break;
> + }
> +
> + if ((DestX >= 0) && (DestY >= 0)) {
> + if (GraphicsOutput != NULL) {
> + Status = GraphicsOutput->Blt (
> + GraphicsOutput,
> + Blt,
> + EfiBltBufferToVideo,
> + 0,
> + 0,
> + (UINTN) DestX,
> + (UINTN) DestY,
> + Width,
> + Height,
> + Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
> + );
> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + Status = UgaDraw->Blt (
> + UgaDraw,
> + (EFI_UGA_PIXEL *) Blt,
> + EfiUgaBltBufferToVideo,
> + 0,
> + 0,
> + (UINTN) DestX,
> + (UINTN) DestY,
> + Width,
> + Height,
> + Width * sizeof (EFI_UGA_PIXEL)
> + );
> + } else {
> + Status = EFI_UNSUPPORTED;
> + }
> +
> + //
> + // Report displayed Logo information.
> + //
> + if (!EFI_ERROR (Status)) {
> + NumberOfLogos++;
> +
> + if (LogoWidth == 0) {
> + //
> + // The first Logo.
> + //
> + LogoDestX = (UINTN) DestX;
> + LogoDestY = (UINTN) DestY;
> + LogoWidth = Width;
> + LogoHeight = Height;
> + } else {
> + //
> + // Merge new logo with old one.
> + //
> + NewDestX = MIN ((UINTN) DestX, LogoDestX);
> + NewDestY = MIN ((UINTN) DestY, LogoDestY);
> + NewWidth = MAX ((UINTN) DestX + Width, LogoDestX + LogoWidth) - NewDestX;
> + NewHeight = MAX ((UINTN) DestY + Height, LogoDestY + LogoHeight) - NewDestY;
> +
> + LogoDestX = NewDestX;
> + LogoDestY = NewDestY;
> + LogoWidth = NewWidth;
> + LogoHeight = NewHeight;
> + }
> + }
> + }
> +
> + FreePool (ImageData);
> +
> + if (Badging == NULL) {
> + break;
> + }
> + }
> +
> +Done:
> + if (BootLogo == NULL || NumberOfLogos == 0) {
> + //
> + // No logo displayed.
> + //
> + if (Blt != NULL) {
> + FreePool (Blt);
> + }
> +
> + return Status;
> + }
> +
> + //
> + // Advertise displayed Logo information.
> + //
> + if (NumberOfLogos == 1) {
> + //
> + // Only one logo displayed, use its Blt buffer directly for BootLogo protocol.
> + //
> + LogoBlt = Blt;
> + Status = EFI_SUCCESS;
> + } else {
> + //
> + // More than one Logo displayed, get merged BltBuffer using VideoToBuffer operation.
> + //
> + if (Blt != NULL) {
> + FreePool (Blt);
> + }
> +
> + //
> + // Ensure the LogoHeight * LogoWidth doesn't overflow
> + //
> + if (LogoHeight > DivU64x64Remainder ((UINTN) ~0, LogoWidth, NULL)) {
> + return EFI_UNSUPPORTED;
> + }
> + BufferSize = MultU64x64 (LogoWidth, LogoHeight);
> +
> + //
> + // Ensure the BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
> + //
> + if (BufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
> + return EFI_UNSUPPORTED;
> + }
> +
> + LogoBlt = AllocateZeroPool ((UINTN)BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
> + if (LogoBlt == NULL) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> +
> + if (GraphicsOutput != NULL) {
> + Status = GraphicsOutput->Blt (
> + GraphicsOutput,
> + LogoBlt,
> + EfiBltVideoToBltBuffer,
> + LogoDestX,
> + LogoDestY,
> + 0,
> + 0,
> + LogoWidth,
> + LogoHeight,
> + LogoWidth * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
> + );
> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
> + Status = UgaDraw->Blt (
> + UgaDraw,
> + (EFI_UGA_PIXEL *) LogoBlt,
> + EfiUgaVideoToBltBuffer,
> + LogoDestX,
> + LogoDestY,
> + 0,
> + 0,
> + LogoWidth,
> + LogoHeight,
> + LogoWidth * sizeof (EFI_UGA_PIXEL)
> + );
> + } else {
> + Status = EFI_UNSUPPORTED;
> + }
> + }
> +
> + if (!EFI_ERROR (Status)) {
> + BootLogo->SetBootLogo (BootLogo, LogoBlt, LogoDestX, LogoDestY, LogoWidth, LogoHeight);
> + }
> + FreePool (LogoBlt);
> +
> + return Status;
> +}
> +
> +/**
> + Use SystemTable Conout to turn on video based Simple Text Out consoles. The
> + Simple Text Out screens will now be synced up with all non video output devices
> +
> + @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
> +
> +**/
> +EFI_STATUS
> +DisableQuietBoot (
> + VOID
> + )
> +{
> +
> + //
> + // Enable Cursor on Screen
> + //
> + gST->ConOut->EnableCursor (gST->ConOut, TRUE);
> + return EFI_SUCCESS;
> +}
> +
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-20 10:16 ` Ard Biesheuvel
2018-01-22 9:16 ` Huangming (Mark)
@ 2018-01-23 6:00 ` Huangming (Mark)
1 sibling, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 6:00 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/20 18:16, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Platform/Hisilicon/D05/D05.fdf | 1 +
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
>> 7 files changed, 677 insertions(+), 27 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 77a89fd..710339c 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -506,6 +506,7 @@
>> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>>
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 78ab0c8..97de4d2 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
>> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>>
>> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>
>> #
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> index 808219a..f1927e8 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> @@ -19,6 +19,7 @@
>>
>> #ifndef _HI1610_PLATFORM_H_
>> #define _HI1610_PLATFORM_H_
>> +#include <IndustryStandard/Acpi.h>
>>
>
> Empty line before ^^^ please
>
>> //
>> // ACPI table information used to initialize tables.
>> @@ -44,5 +45,31 @@
>> }
>>
>> #define HI1616_WATCHDOG_COUNT 2
>> +#define HI1616_GIC_STRUCTURE_COUNT 64
>> +
>> +#define HI1616_MPID_TA_BASE 0x10000
>> +#define HI1616_MPID_TB_BASE 0x30000
>> +#define HI1616_MPID_TA_2_BASE 0x50000
>> +#define HI1616_MPID_TB_2_BASE 0x70000
>> +
>> +// Differs from Juno, we have another affinity level beyond cluster and core
>> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +
>> +//
>> +// Multiple APIC Description Table
>> +//
>> +#pragma pack (1)
>> +
>> +typedef struct {
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
>> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> +
>> +#pragma pack ()
>>
>> #endif
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> index 169ee72..33dca03 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> @@ -1,9 +1,9 @@
>> /** @file
>> * Multiple APIC Description Table (MADT)
>> *
>> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
>> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
>
> Please don't touch the copyright statements belonging to other companies
>
>> *
>> * This program and the accompanying materials
>> *
>> @@ -19,34 +19,11 @@
>> *
>> **/
>>
>> -
>> -#include <IndustryStandard/Acpi.h>
>> +#include "Hi1616Platform.h"
>> #include <Library/AcpiLib.h>
>> #include <Library/AcpiNextLib.h>
>> #include <Library/ArmLib.h>
>> #include <Library/PcdLib.h>
>> -#include "Hi1616Platform.h"
>> -
>> -// Differs from Juno, we have another affinity level beyond cluster and core
>> -// 0x20000 is only for socket 0
>> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
>> -
>> -//
>> -// Multiple APIC Description Table
>> -//
>> -#pragma pack (1)
>> -
>> -typedef struct {
>> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
>> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> -
>> -#pragma pack ()
>>
>> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
>> {
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> new file mode 100644
>> index 0000000..eac4736
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> @@ -0,0 +1,447 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#include "Pptt.h"
>> +
>> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
>> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
>> +
>> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
>> + ARM_ACPI_HEADER (
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
>> + EFI_ACPI_DESCRIPTION_HEADER,
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
>> + );
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
>> +{
>> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
>> +};
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
>> +{
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
>> +};
>> +
>
> Please make all of these STATIC ^^^
>
> And functions below as well
>
>> +EFI_STATUS
>> +InitCacheInfo(
>> + )
>> +{
>> + UINT8 Index;
>> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
>> + CSSELR_DATA CsselrData;
>> + CCSIDR_DATA CcsidrData;
>> +
>> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
>> + CsselrData.Data = 0;
>> + CcsidrData.Data = 0;
>> + Type1Attributes.Data = 0;
>> +
>> + if (Index == 0) { //L1I
>
> space after //
>
>> + CsselrData.Bits.InD = 1;
>> + CsselrData.Bits.Level = 0;
>> + Type1Attributes.Bits.CacheType = 1;
>> + } else if (Index == 1) {
>> + Type1Attributes.Bits.CacheType = 0;
>> + CsselrData.Bits.Level = Index -1;
>
> space after -
>
>> + } else {
>> + Type1Attributes.Bits.CacheType = 2;
>> + CsselrData.Bits.Level = Index -1;
>
> and here
>
>> + }
>> +
>> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
>> +
>> + if (CcsidrData.Bits.Wa == 1) {
>> + Type1Attributes.Bits.AllocateType = 1;
>> + if (CcsidrData.Bits.Ra == 1) {
>> + Type1Attributes.Bits.AllocateType++;
>
> Just assign '2' here. BTW don't we have #defines for these constants?
>
>> + }
>> + }
>> +
>> + if (CcsidrData.Bits.Wt == 1) {
>> + Type1Attributes.Bits.WritePolicy = 1;
>> + }
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
>> +
>> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
>> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
>> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
>> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
>> + mPpttCacheType1[Index].Associativity * \
>> + mPpttCacheType1[Index].NumberOfSets;
>> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
>> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>> + }
>> +
>> + // L3
>> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>
> Where do you assign mPpttCacheType1[3].Size/Attributes/... ?
>
>> + return EFI_SUCCESS;
>> +}
>> +
>
> STATIC
>
>> +EFI_STATUS
>> +AddCoreTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo,
>> + IN UINT32 ProcessorId
>
> Please align like
>
> IN VOID *PpttTable,
> IN OUT VOID *PpttTableLengthRemain,
> IN UINT32 Flags,
>
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>
> If *PpttTableLengthRemain is a UINT32 then use a UINT32* as the
> function parameter not VOID*, and drop the cast here.
>
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>
> Please cast PpttTable to UINT8* before adding to it.
I will add UINT8 * to it,
and I will define PpttTable to EFI_ACPI_DESCRIPTION_HEADER * to avoid cast repeatedly.
>
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->AcpiProcessorId = ProcessorId;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>
> Space after sizeof
>
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>
> space after sizeof
>
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>
> STATIC
>
>> +EFI_STATUS
>> +AddClusterTable (
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>
> Alignment as above
>
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
>
> Use a UINT32* type for PpttTableLengthRemain
>
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>
> Use UINT8* cast for PpttTable
>
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>
> Same comments apply to AddScclTable()
>
>> +EFI_STATUS
>> +AddScclTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddSocketTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
>> +
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>
> The functions above look very similar. Would it be possible to merge them?
>
> STATIC
>
>> +VOID
>> +GetApic(
>> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
>> +VOID *PpttTable,
>> +IN UINT32 PpttTableLengthRemain,
>> +IN UINT32 Index1
>> +)
>> +{
>> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
>
> cluster not culster
>
>> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
>> + UINT32 Parent = 0;
>> + UINT32 Flags = 0;
>> + UINT32 ResourceNo = 0;
>
> Empty line
>
>> + //Get APIC data
>
> Space after //
>
>> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
>> + SocketOffset = 0;
>> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
>> + ScclOffset = 0;
>> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
>> + ClusterOffset = 0;
>> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
>> +
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
>> +
>> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
>> + //This processor is unusable
>
> Space after //
>
>> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
>> + return;
>> + }
>> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
>> + //This processor is unusable
>
> and here
>
>> + Index1++;
>> + continue;
>> + }
>> +
>> + if (SocketOffset == 0) {
>> + //Add socket0 for type0 table
>
> and here, plus indentation
>
>> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
>> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + Parent = 0;
>> + Flags = PPTT_TYPE0_SOCKET_FLAG;
>> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ScclOffset == 0) {
>> + //Add socket0die0 for type0 table
>
> and here
>
>> + ResourceNo = 1;
>> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>
> No space before ;
>
>> + Parent = SocketOffset;
>> + Flags = PPTT_TYPE0_DIE_FLAG;
>> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ClusterOffset == 0) {
>> + //Add socket0die0ClusterId for type0 table
>
> Space after // and indentation
>
>
>> + ResourceNo = 1;
>> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>> + Parent = ScclOffset;
>> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
>> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> +
>> + //Add socket0die0ClusterIdCoreId for type0 table
>
> and here
>
>> + ResourceNo = 2;
>> + Parent = ClusterOffset;
>> + Flags = PPTT_TYPE0_CORE_FLAG;
>> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
>> +
>> + Index1++;
>> + }
>> + }
>> + }
>> + }
>> + return ;
>> +}
>> +
>
> STATIC
>
>> +VOID
>> +PpttSetAcpiTable(
>> + IN EFI_EVENT Event,
>> + IN VOID *Context
>> + )
>> +{
>> + UINTN AcpiTableHandle;
>> + EFI_STATUS Status;
>> + UINT8 Checksum;
>> + EFI_ACPI_SDT_HEADER *Table;
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
>> + EFI_ACPI_TABLE_VERSION TableVersion;
>> + VOID *PpttTable;
>> + UINTN TableKey;
>> + UINT32 Index0, Index1;
>> + UINT32 PpttTableLengthRemain = 0;
>> +
>> + gBS->CloseEvent (Event);
>> +
>> + InitCacheInfo ();
>> +
>> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
>> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
>> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
>> +
>> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
>> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
>> + if (EFI_ERROR (Status)) {
>> + break;
>> + }
>> + //Find APIC table
>
> Space after //
>
>> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
>> + continue;
>> + }
>> +
>> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
>> + Index1 = 0;
>> +
>> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
>> + break;
>> + }
>> +
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
>
> Does it make sense to proceed here?
>
>> + }
>> +
>> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>
> No () around PpttTable
> Line length (please check throughout)
>
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
>
> Space before =
>
>> +
>> + AcpiTableHandle = 0;
>> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
>> +
>
> Line length?
>
>> + FreePool (PpttTable);
>> + return ;
>> +}
>> +
>
> STATIC
>
>> +EFI_STATUS
>> +InitPpttTable(
>
> Space before (
> Missing VOID
>
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_EVENT ReadyToBootEvent;
>> +
>> + Status = EfiCreateEventReadyToBootEx (
>> + TPL_NOTIFY,
>> + PpttSetAcpiTable,
>> + NULL,
>> + &ReadyToBootEvent
>> + );
>
> Indentation
>
> Also, can you just move this call to EfiCreateEventReadyToBootEx()
> into the function below?
>
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + return Status;
>> +}
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +PpttEntryPoint(
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
>
> Space between VOID and **
> Line length
>
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
>
> No space after (VOID **)
>
> Also, you have a DEPEX on both protocols, so it is sufficient to use
> ASSERT_EFI_ERROR() here
>
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + InitPpttTable ();
>> +
>> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> new file mode 100644
>> index 0000000..5dc635f
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> @@ -0,0 +1,142 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#ifndef _PPTT_H_
>> +#define _PPTT_H_
>> +
>> +#include <IndustryStandard/Acpi.h>
>> +#include <Library/ArmLib/ArmLibPrivate.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Protocol/AcpiSystemDescriptionTable.h>
>> +#include <Protocol/AcpiTable.h>
>> +#include "../D05AcpiTables/Hi1616Platform.h"
>> +
>> +///
>> +/// "PPTT" Processor Properties Topology Table
>> +///
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
>> +#define EFI_ACPI_MAX_NUM_TABLES 20
>> +
>> +#define PPTT_TABLE_MAX_LEN 0x6000
>> +#define PPTT_SOCKET_NO 0x2
>> +#define PPTT_DIE_NO 0x2
>> +#define PPTT_CULSTER_NO 0x4
>> +#define PPTT_CORE_NO 0x4
>> +#define PPTT_SOCKET_COMPONENT_NO 0x1
>> +#define PPTT_CACHE_NO 0x4
>> +
>> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
>> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
>> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
>> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
>> +#define PPTT_TYPE0_CLUSTER_FLAG 0
>> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
>> +
>> +#define PPTT_TYPE1_SIZE_VALID BIT0
>> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
>> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
>> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
>> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
>> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
>> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
>> +
>> +typedef union {
>> + struct {
>> + UINT32 InD :1;
>> + UINT32 Level :3;
>> + UINT32 Reserved :28;
>> + } Bits;
>> + UINT32 Data;
>> +}CSSELR_DATA;
>
> Space after }
>
>> +
>> +typedef union {
>> + struct {
>> + UINT32 LineSize :3;
>> + UINT32 Associativity :10;
>> + UINT32 NumSets :15;
>> + UINT32 Wa :1;
>> + UINT32 Ra :1;
>> + UINT32 Wb :1;
>> + UINT32 Wt :1;
>> + } Bits;
>> + UINT32 Data;
>> +}CCSIDR_DATA;
>
> and here
>
>> +
>> +//
>> +// Processor Hierarchy Node Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 Parent;
>> + UINT32 AcpiProcessorId;
>> + UINT32 PrivateResourceNo;
>> +} EFI_ACPI_6_2_PPTT_TYPE0;
>> +
>> +//
>> +// Cache Configuration
>> +//
>> +typedef union {
>> + struct {
>> + UINT8 AllocateType :2;
>> + UINT8 CacheType :2;
>> + UINT8 WritePolicy :1;
>> + UINT8 Reserved :3;
>> + } Bits;
>> + UINT8 Data;
>> +}PPTT_TYPE1_ATTRIBUTES;
>
> and here
>
>> +
>> +//
>> +// Cache Type Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 NextLevelOfCache;
>> + UINT32 Size;
>> + UINT32 NumberOfSets;
>> + UINT8 Associativity;
>> + UINT8 Attributes;
>> + UINT16 LineSize;
>> +} EFI_ACPI_6_2_PPTT_TYPE1;
>> +
>> +//
>> +// ID Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 VendorId;
>> + UINT64 Level1Id;
>> + UINT64 Level2Id;
>> + UINT16 MajorRev;
>> + UINT16 MinorRev;
>> + UINT16 SpinRev;
>> +} EFI_ACPI_6_2_PPTT_TYPE2;
>> +
>> +#endif // _PPTT_H_
>> +
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> new file mode 100644
>> index 0000000..ce26b97
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> @@ -0,0 +1,55 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>
> You should probably update these now
>
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0000001A
>
>> + BASE_NAME = AcpiPptt
>> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = PpttEntryPoint
>> +
>> +[Sources.common]
>> + Pptt.c
>> + Pptt.h
>> +
>> +[Packages]
>> + MdePkg/MdePkg.dec
>> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
>> + ArmPkg/ArmPkg.dec
>> +
>> +[LibraryClasses]
>> + ArmLib
>> + HobLib
>> + UefiRuntimeServicesTableLib
>> + UefiDriverEntryPoint
>> + BaseMemoryLib
>> + DebugLib
>> +
>> +[Guids]
>> +
>
> Please remove empty sections
>
>> +
>> +[Protocols]
>> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
>> + gEfiAcpiSdtProtocolGuid
>
> Please use the annotation consistently:
> use ## not #
> annotate all protocols
>
>> +
>> +[Pcd]
>> +
>> +
>> +[Depex]
>> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
>> +
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver
2018-01-22 18:38 ` Leif Lindholm
@ 2018-01-23 6:03 ` Huangming (Mark)
0 siblings, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 6:03 UTC (permalink / raw)
To: Leif Lindholm, Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, zhangjinsong2, mengfanrong, waip23
On 2018/1/23 2:38, Leif Lindholm wrote:
> Please provide a detailed commit message.
> For example, explain that:
> - Generic BDS use configurable build-time, enabled by default.
> (Why? Is this intended to be temporary?)
> - Hisilicon-specific PlatformBootManagerLib added.
> (Why? What features are added compared to default one?)
>
> Minor comments below.
>
> On Thu, Jan 18, 2018 at 11:01:31PM +0800, Ming Huang wrote:
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> ---
>> Platform/Hisilicon/D03/D03.dsc | 24 +
>> Platform/Hisilicon/D03/D03.fdf | 7 +
>> Platform/Hisilicon/D05/D05.dsc | 27 +-
>> Platform/Hisilicon/D05/D05.fdf | 7 +
>> Silicon/Hisilicon/Hisilicon.dsc.inc | 1 +
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 588 +++++++++++++++++
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 89 +++
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
>> 9 files changed, 1481 insertions(+), 2 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index b434f68..f7efff5 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -28,6 +28,7 @@
>> BUILD_TARGETS = DEBUG|RELEASE
>> SKUID_IDENTIFIER = DEFAULT
>> FLASH_DEFINITION = Platform/Hisilicon/$(PLATFORM_NAME)/$(PLATFORM_NAME).fdf
>> + DEFINE GENERIC_BDS = TRUE
>>
>> !include Silicon/Hisilicon/Hisilicon.dsc.inc
>>
>> @@ -68,6 +69,14 @@
>> CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> +!if $(GENERIC_BDS) == TRUE
>> + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
>> + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>> + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
>> + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
>> + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
>> +!endif
>> CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
>>
>> # USB Requirements
>> @@ -188,6 +197,9 @@
>>
>> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
>> gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
>> +!if $(GENERIC_BDS) == TRUE
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
>> +!endif
>>
>> gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
>> gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
>> @@ -405,6 +417,14 @@
>> MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
>> MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>>
>> +!if $(GENERIC_BDS) == TRUE
>> + MdeModulePkg/Application/UiApp/UiApp.inf {
>> + <LibraryClasses>
>> + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
>> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
>> + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
>> + }
>> +!endif
>> MdeModulePkg/Application/HelloWorld/HelloWorld.inf
>> #
>> # Bds
>> @@ -457,7 +477,11 @@
>>
>> MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
>> MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>> +!if $(GENERIC_BDS) == TRUE
>> + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!else
>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!endif
>>
>> #
>> # UEFI application (Shell Embedded Boot Loader)
>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>> index 0b38eb4..0d704b5 100644
>> --- a/Platform/Hisilicon/D03/D03.fdf
>> +++ b/Platform/Hisilicon/D03/D03.fdf
>> @@ -283,6 +283,9 @@ READ_LOCK_STATUS = TRUE
>> INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> !endif #$(INCLUDE_TFTP_COMMAND)
>>
>> +!if $(GENERIC_BDS) == TRUE
>> + INF MdeModulePkg/Application/UiApp/UiApp.inf
>> +!endif
>> #
>> # Bds
>> #
>> @@ -291,7 +294,11 @@ READ_LOCK_STATUS = TRUE
>> INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
>> INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
>> INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>> +!if $(GENERIC_BDS) == TRUE
>> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!else
>> INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!endif
>>
>> [FV.FVMAIN_COMPACT]
>> FvAlignment = 16
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 710339c..57370dc 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -31,7 +31,7 @@
>> DEFINE EDK2_SKIP_PEICORE=0
>> DEFINE NETWORK_IP6_ENABLE = FALSE
>> DEFINE HTTP_BOOT_ENABLE = FALSE
>> -
>> + DEFINE GENERIC_BDS = TRUE
>
> Please don't randomly drop whitespace or move it around.
>
>> !include Silicon/Hisilicon/Hisilicon.dsc.inc
>>
>> [LibraryClasses.common]
>> @@ -84,6 +84,14 @@
>> CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> +!if $(GENERIC_BDS) == TRUE
>> + UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
>> + SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>> + ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
>> + DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
>> + PlatformBootManagerLib|Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> + FileExplorerLib|MdeModulePkg/Library/FileExplorerLib/FileExplorerLib.inf
>> +!endif
>> CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
>>
>> # USB Requirements
>> @@ -119,6 +127,7 @@
>> # It could be set FALSE to save size.
>> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
>>
>> [PcdsFixedAtBuild.common]
>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>> @@ -203,7 +212,9 @@
>>
>> gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
>> gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
>> -
>
> Please don't randomly drop whitespace or move it around.
>
>> +!if $(GENERIC_BDS) == TRUE
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }|VOID*|0x0001006b
>> +!endif
>> gHisiTokenSpaceGuid.PcdSysControlBaseAddress|0x40010000
>> gHisiTokenSpaceGuid.PcdMailBoxAddress|0x0000FFF8
>>
>> @@ -560,6 +571,14 @@
>> MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
>> MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
>>
>> +!if $(GENERIC_BDS) == TRUE
>> + MdeModulePkg/Application/UiApp/UiApp.inf {
>> + <LibraryClasses>
>> + NULL|MdeModulePkg/Library/BootManagerUiLib/BootManagerUiLib.inf
>> + NULL|MdeModulePkg/Library/DeviceManagerUiLib/DeviceManagerUiLib.inf
>> + NULL|MdeModulePkg/Library/BootMaintenanceManagerUiLib/BootMaintenanceManagerUiLib.inf
>> + }
>> +!endif
>> #
>> # Bds
>> #
>> @@ -610,7 +629,11 @@
>> MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
>> MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
>> MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>> +!if $(GENERIC_BDS) == TRUE
>> + MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!else
>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!endif
>> #
>> # UEFI application (Shell Embedded Boot Loader)
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 97de4d2..d209210 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -305,6 +305,9 @@ READ_LOCK_STATUS = TRUE
>> INF ShellPkg/DynamicCommand/TftpDynamicCommand/TftpDynamicCommand.inf
>> !endif #$(INCLUDE_TFTP_COMMAND)
>>
>> +!if $(GENERIC_BDS) == TRUE
>> + INF MdeModulePkg/Application/UiApp/UiApp.inf
>> +!endif
>> #
>> # Bds
>> #
>> @@ -313,7 +316,11 @@ READ_LOCK_STATUS = TRUE
>> INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
>> INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
>> INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
>> +!if $(GENERIC_BDS) == TRUE
>> + INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!else
>> INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> +!endif
>>
>> [FV.FVMAIN_COMPACT]
>> FvAlignment = 16
>> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
>> index cc23673..308064b 100644
>> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
>> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
>> @@ -263,6 +263,7 @@
>> gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|1
>> gEfiMdePkgTokenSpaceGuid.PcdPostCodePropertyMask|0
>> gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|320
>> + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType|4
>>
>> # DEBUG_ASSERT_ENABLED 0x01
>> # DEBUG_PRINT_ENABLED 0x02
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> new file mode 100644
>> index 0000000..5d8d58e
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> @@ -0,0 +1,588 @@
>> +/** @file
>> + Implementation for PlatformBootManagerLib library class interfaces.
>> +
>> + Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials are licensed and made available
>> + under the terms and conditions of the BSD License which accompanies this
>> + distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
>> + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <IndustryStandard/Pci22.h>
>> +#include <Library/DevicePathLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/UefiBootManagerLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Protocol/DevicePath.h>
>> +#include <Protocol/EsrtManagement.h>
>> +#include <Protocol/GenericMemoryTest.h>
>> +#include <Protocol/GraphicsOutput.h>
>> +#include <Protocol/LoadedImage.h>
>> +#include <Protocol/PciIo.h>
>> +#include <Protocol/PciRootBridgeIo.h>
>> +#include <Guid/EventGroup.h>
>> +#include <Guid/TtyTerm.h>
>> +
>> +#include "PlatformBm.h"
>> +
>> +#define DP_NODE_LEN(Type) { (UINT8)sizeof (Type), (UINT8)(sizeof (Type) >> 8) }
>> +
>> +
>> +#pragma pack (1)
>> +typedef struct {
>> + VENDOR_DEVICE_PATH SerialDxe;
>> + UART_DEVICE_PATH Uart;
>> + VENDOR_DEFINED_DEVICE_PATH TermType;
>> + EFI_DEVICE_PATH_PROTOCOL End;
>> +} PLATFORM_SERIAL_CONSOLE;
>> +#pragma pack ()
>> +
>> +#define SERIAL_DXE_FILE_GUID { \
>> + 0xD3987D4B, 0x971A, 0x435F, \
>> + { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } \
>> + }
>> +
>> +EFI_GUID EblAppGuid2 = {0x3CEF354A,0x3B7A,0x4519,{0xAD,0x70,0x72,0xA1,0x34,0x69,0x83,0x11}};
>> +
>> +STATIC PLATFORM_SERIAL_CONSOLE mSerialConsole = {
>> + //
>> + // VENDOR_DEVICE_PATH SerialDxe
>> + //
>> + {
>> + { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, DP_NODE_LEN (VENDOR_DEVICE_PATH) },
>> + SERIAL_DXE_FILE_GUID
>> + },
>> +
>> + //
>> + // UART_DEVICE_PATH Uart
>> + //
>> + {
>> + { MESSAGING_DEVICE_PATH, MSG_UART_DP, DP_NODE_LEN (UART_DEVICE_PATH) },
>> + 0, // Reserved
>> + FixedPcdGet64 (PcdUartDefaultBaudRate), // BaudRate
>> + FixedPcdGet8 (PcdUartDefaultDataBits), // DataBits
>> + FixedPcdGet8 (PcdUartDefaultParity), // Parity
>> + FixedPcdGet8 (PcdUartDefaultStopBits) // StopBits
>> + },
>> +
>> + //
>> + // VENDOR_DEFINED_DEVICE_PATH TermType
>> + //
>> + {
>> + {
>> + MESSAGING_DEVICE_PATH, MSG_VENDOR_DP,
>> + DP_NODE_LEN (VENDOR_DEFINED_DEVICE_PATH)
>> + }
>> + //
>> + // Guid to be filled in dynamically
>> + //
>> + },
>> +
>> + //
>> + // EFI_DEVICE_PATH_PROTOCOL End
>> + //
>> + {
>> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
>> + }
>> +};
>> +
>> +
>> +#pragma pack (1)
>> +typedef struct {
>> + USB_CLASS_DEVICE_PATH Keyboard;
>> + EFI_DEVICE_PATH_PROTOCOL End;
>> +} PLATFORM_USB_KEYBOARD;
>> +#pragma pack ()
>> +
>> +STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
>> + //
>> + // USB_CLASS_DEVICE_PATH Keyboard
>> + //
>> + {
>> + {
>> + MESSAGING_DEVICE_PATH, MSG_USB_CLASS_DP,
>> + DP_NODE_LEN (USB_CLASS_DEVICE_PATH)
>> + },
>> + 0xFFFF, // VendorId: any
>> + 0xFFFF, // ProductId: any
>> + 3, // DeviceClass: HID
>> + 1, // DeviceSubClass: boot
>> + 1 // DeviceProtocol: keyboard
>> + },
>> +
>> + //
>> + // EFI_DEVICE_PATH_PROTOCOL End
>> + //
>> + {
>> + END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE,
>> + DP_NODE_LEN (EFI_DEVICE_PATH_PROTOCOL)
>> + }
>> +};
>> +
>> +
>> +/**
>> + Check if the handle satisfies a particular condition.
>> +
>> + @param[in] Handle The handle to check.
>> + @param[in] ReportText A caller-allocated string passed in for reporting
>> + purposes. It must never be NULL.
>> +
>> + @retval TRUE The condition is satisfied.
>> + @retval FALSE Otherwise. This includes the case when the condition could not
>> + be fully evaluated due to an error.
>> +**/
>> +typedef
>> +BOOLEAN
>> +(EFIAPI *FILTER_FUNCTION) (
>> + IN EFI_HANDLE Handle,
>> + IN CONST CHAR16 *ReportText
>> + );
>> +
>> +
>> +/**
>> + Process a handle.
>> +
>> + @param[in] Handle The handle to process.
>> + @param[in] ReportText A caller-allocated string passed in for reporting
>> + purposes. It must never be NULL.
>> +**/
>> +typedef
>> +VOID
>> +(EFIAPI *CALLBACK_FUNCTION) (
>> + IN EFI_HANDLE Handle,
>> + IN CONST CHAR16 *ReportText
>> + );
>> +
>> +/**
>> + Locate all handles that carry the specified protocol, filter them with a
>> + callback function, and pass each handle that passes the filter to another
>> + callback.
>> +
>> + @param[in] ProtocolGuid The protocol to look for.
>> +
>> + @param[in] Filter The filter function to pass each handle to. If this
>> + parameter is NULL, then all handles are processed.
>> +
>> + @param[in] Process The callback function to pass each handle to that
>> + clears the filter.
>> +**/
>> +STATIC
>> +VOID
>> +FilterAndProcess (
>> + IN EFI_GUID *ProtocolGuid,
>> + IN FILTER_FUNCTION Filter OPTIONAL,
>> + IN CALLBACK_FUNCTION Process
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_HANDLE *Handles;
>> + UINTN NoHandles;
>> + UINTN Idx;
>> +
>> + Status = gBS->LocateHandleBuffer (ByProtocol, ProtocolGuid,
>> + NULL /* SearchKey */, &NoHandles, &Handles);
>> + if (EFI_ERROR (Status)) {
>> + //
>> + // This is not an error, just an informative condition.
>> + //
>> + DEBUG ((DEBUG_VERBOSE, "%a: %g: %r\n", __FUNCTION__, ProtocolGuid,
>> + Status));
>> + return;
>> + }
>> +
>> + ASSERT (NoHandles > 0);
>> + for (Idx = 0; Idx < NoHandles; ++Idx) {
>> + CHAR16 *DevicePathText;
>> + STATIC CHAR16 Fallback[] = L"<device path unavailable>";
>> +
>> + //
>> + // The ConvertDevicePathToText() function handles NULL input transparently.
>> + //
>> + DevicePathText = ConvertDevicePathToText (
>> + DevicePathFromHandle (Handles[Idx]),
>> + FALSE, // DisplayOnly
>> + FALSE // AllowShortcuts
>> + );
>> + if (DevicePathText == NULL) {
>> + DevicePathText = Fallback;
>> + }
>> +
>> + if (Filter == NULL || Filter (Handles[Idx], DevicePathText)) {
>> + Process (Handles[Idx], DevicePathText);
>> + }
>> +
>> + if (DevicePathText != Fallback) {
>> + FreePool (DevicePathText);
>> + }
>> + }
>> + gBS->FreePool (Handles);
>> +}
>> +
>> +
>> +/**
>> + This FILTER_FUNCTION checks if a handle corresponds to a PCI display device.
>> +**/
>> +STATIC
>> +BOOLEAN
>> +EFIAPI
>> +IsPciDisplay (
>> + IN EFI_HANDLE Handle,
>> + IN CONST CHAR16 *ReportText
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_PCI_IO_PROTOCOL *PciIo;
>> + PCI_TYPE00 Pci;
>> +
>> + Status = gBS->HandleProtocol (Handle, &gEfiPciIoProtocolGuid,
>> + (VOID**)&PciIo);
>> + if (EFI_ERROR (Status)) {
>> + //
>> + // This is not an error worth reporting.
>> + //
>> + return FALSE;
>> + }
>> +
>> + Status = PciIo->Pci.Read (PciIo, EfiPciIoWidthUint32, 0 /* Offset */,
>> + sizeof Pci / sizeof (UINT32), &Pci);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "%a: %s: %r\n", __FUNCTION__, ReportText, Status));
>> + return FALSE;
>> + }
>> +
>> + return IS_PCI_DISPLAY (&Pci);
>> +}
>> +
>> +
>> +/**
>> + This CALLBACK_FUNCTION attempts to connect a handle non-recursively, asking
>> + the matching driver to produce all first-level child handles.
>> +**/
>> +STATIC
>> +VOID
>> +EFIAPI
>> +Connect (
>> + IN EFI_HANDLE Handle,
>> + IN CONST CHAR16 *ReportText
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + Status = gBS->ConnectController (
>> + Handle, // ControllerHandle
>> + NULL, // DriverImageHandle
>> + NULL, // RemainingDevicePath -- produce all children
>> + FALSE // Recursive
>> + );
>> + DEBUG ((EFI_ERROR (Status) ? DEBUG_ERROR : DEBUG_VERBOSE, "%a: %s: %r\n",
>> + __FUNCTION__, ReportText, Status));
>> +}
>> +
>> +
>> +/**
>> + This CALLBACK_FUNCTION retrieves the EFI_DEVICE_PATH_PROTOCOL from the
>> + handle, and adds it to ConOut and ErrOut.
>> +**/
>> +STATIC
>> +VOID
>> +EFIAPI
>> +AddOutput (
>> + IN EFI_HANDLE Handle,
>> + IN CONST CHAR16 *ReportText
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
>> +
>> + DevicePath = DevicePathFromHandle (Handle);
>> + if (DevicePath == NULL) {
>> + DEBUG ((DEBUG_ERROR, "%a: %s: handle %p: device path not found\n",
>> + __FUNCTION__, ReportText, Handle));
>> + return;
>> + }
>> +
>> + Status = EfiBootManagerUpdateConsoleVariable (ConOut, DevicePath, NULL);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ConOut: %r\n", __FUNCTION__,
>> + ReportText, Status));
>> + return;
>> + }
>> +
>> + Status = EfiBootManagerUpdateConsoleVariable (ErrOut, DevicePath, NULL);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "%a: %s: adding to ErrOut: %r\n", __FUNCTION__,
>> + ReportText, Status));
>> + return;
>> + }
>> +
>> + DEBUG ((DEBUG_VERBOSE, "%a: %s: added to ConOut and ErrOut\n", __FUNCTION__,
>> + ReportText));
>> +}
>> +
>> +STATIC
>> +VOID
>> +PlatformRegisterFvBootOption (
>> + EFI_GUID *FileGuid,
>> + CHAR16 *Description,
>> + UINT32 Attributes
>> + )
>> +{
>> + EFI_STATUS Status;
>> + INTN OptionIndex;
>> + EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
>> + EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
>> + UINTN BootOptionCount;
>> + MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
>> + EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
>> + EFI_DEVICE_PATH_PROTOCOL *DevicePath;
>> +
>> + Status = gBS->HandleProtocol (
>> + gImageHandle,
>> + &gEfiLoadedImageProtocolGuid,
>> + (VOID **) &LoadedImage
>> + );
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
>> + DevicePath = DevicePathFromHandle (LoadedImage->DeviceHandle);
>> + ASSERT (DevicePath != NULL);
>> + DevicePath = AppendDevicePathNode (
>> + DevicePath,
>> + (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
>> + );
>> + ASSERT (DevicePath != NULL);
>> +
>> + Status = EfiBootManagerInitializeLoadOption (
>> + &NewOption,
>> + LoadOptionNumberUnassigned,
>> + LoadOptionTypeBoot,
>> + Attributes,
>> + Description,
>> + DevicePath,
>> + NULL,
>> + 0
>> + );
>> + ASSERT_EFI_ERROR (Status);
>> + FreePool (DevicePath);
>> +
>> + BootOptions = EfiBootManagerGetLoadOptions (
>> + &BootOptionCount, LoadOptionTypeBoot
>> + );
>> +
>> + OptionIndex = EfiBootManagerFindLoadOption (
>> + &NewOption, BootOptions, BootOptionCount
>> + );
>> +
>> + if (OptionIndex == -1) {
>> + Status = EfiBootManagerAddLoadOptionVariable (&NewOption, MAX_UINTN);
>> + ASSERT_EFI_ERROR (Status);
>> + }
>> + EfiBootManagerFreeLoadOption (&NewOption);
>> + EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
>> +}
>> +
>> +
>> +STATIC
>> +VOID
>> +PlatformRegisterOptionsAndKeys (
>> + VOID
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_INPUT_KEY Enter;
>> + EFI_INPUT_KEY F2;
>> + EFI_INPUT_KEY Esc;
>> + EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
>> +
>> + //
>> + // Register ENTER as CONTINUE key
>> + //
>> + Enter.ScanCode = SCAN_NULL;
>> + Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
>> + Status = EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + //
>> + // Map F2 and ESC to Boot Manager Menu
>> + //
>> + F2.ScanCode = SCAN_F2;
>> + F2.UnicodeChar = CHAR_NULL;
>> + Esc.ScanCode = SCAN_ESC;
>> + Esc.UnicodeChar = CHAR_NULL;
>> +
>> + Status = EfiBootManagerGetBootManagerMenu (&BootOption);
>> + ASSERT_EFI_ERROR (Status);
>> + Status = EfiBootManagerAddKeyOptionVariable (
>> + NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL
>> + );
>> + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
>> + Status = EfiBootManagerAddKeyOptionVariable (
>> + NULL, (UINT16) BootOption.OptionNumber, 0, &Esc, NULL
>> + );
>> + ASSERT (Status == EFI_SUCCESS || Status == EFI_ALREADY_STARTED);
>> +}
>> +
>> +VOID
>> +UpdateMemory (
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_GENERIC_MEMORY_TEST_PROTOCOL* MemoryTest;
>> + BOOLEAN RequireSoftECCInit = FALSE;
>> +
>> + //Add MemoryTest for memmap add above 4G memory.
>> + Status = gBS->LocateProtocol (&gEfiGenericMemTestProtocolGuid, NULL, (VOID**)&MemoryTest);
>
> Line length.
>
>> + if (!EFI_ERROR (Status)) {
>> + (VOID)MemoryTest->MemoryTestInit (MemoryTest, IGNORE, &RequireSoftECCInit);
>> + } else {
>> + DEBUG ((DEBUG_ERROR, "LocateProtocol for GenericMemTestProtocol fail(%r)\n", Status));
>
> Line length.
>
>> + }
>> +
>> + return;
>> +}
>> +
>> +//
>> +// BDS Platform Functions
>> +//
>> +/**
>> + Do the platform init, can be customized by OEM/IBV
>> + Possible things that can be done in PlatformBootManagerBeforeConsole:
>> + > Update console variable: 1. include hot-plug devices;
>> + > 2. Clear ConIn and add SOL for AMT
>> + > Register new Driver#### or Boot####
>> + > Register new Key####: e.g.: F12
>> + > Signal ReadyToLock event
>> + > Authentication action: 1. connect Auth devices;
>> + > 2. Identify auto logon user.
>
> Please don't use ">" in this way, it confuses review (at least for me).
>
>> +**/
>> +VOID
>> +EFIAPI
>> +PlatformBootManagerBeforeConsole (
>> + VOID
>> + )
>> +{
>> + //
>> + // Signal EndOfDxe PI Event
>> + //
>> + EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
>> +
>> + UpdateMemory ();
>> +
>> + //
>> + // Locate the PCI root bridges and make the PCI bus driver connect each,
>> + // non-recursively. This will produce a number of child handles with PciIo on
>> + // them.
>> + //
>> + FilterAndProcess (&gEfiPciRootBridgeIoProtocolGuid, NULL, Connect);
>> +
>> + //
>> + // Find all display class PCI devices (using the handles from the previous
>> + // step), and connect them non-recursively. This should produce a number of
>> + // child handles with GOPs on them.
>> + //
>> + FilterAndProcess (&gEfiPciIoProtocolGuid, IsPciDisplay, Connect);
>> +
>> + //
>> + // Now add the device path of all handles with GOP on them to ConOut and
>> + // ErrOut.
>> + //
>> + FilterAndProcess (&gEfiGraphicsOutputProtocolGuid, NULL, AddOutput);
>> +
>> + //
>> + // Add the hardcoded short-form USB keyboard device path to ConIn.
>> + //
>> + EfiBootManagerUpdateConsoleVariable (ConIn,
>> + (EFI_DEVICE_PATH_PROTOCOL *)&mUsbKeyboard, NULL);
>> +
>> + //
>> + // Add the hardcoded serial console device path to ConIn, ConOut, ErrOut.
>> + //
>> + ASSERT (FixedPcdGet8 (PcdDefaultTerminalType) == 4);
>> + CopyGuid (&mSerialConsole.TermType.Guid, &gEfiTtyTermGuid);
>> +
>> + EfiBootManagerUpdateConsoleVariable (ConIn,
>> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
>> + EfiBootManagerUpdateConsoleVariable (ConOut,
>> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
>> + EfiBootManagerUpdateConsoleVariable (ErrOut,
>> + (EFI_DEVICE_PATH_PROTOCOL *)&mSerialConsole, NULL);
>> +
>> + //
>> + // Register platform-specific boot options and keyboard shortcuts.
>> + //
>> + PlatformRegisterOptionsAndKeys ();
>> +}
>> +
>> +/**
>> + Do the platform specific action after the console is ready
>> + Possible things that can be done in PlatformBootManagerAfterConsole:
>> + > Console post action:
>> + > Dynamically switch output mode from 100x31 to 80x25 for certain senarino
>> + > Signal console ready platform customized event
>> + > Run diagnostics like memory testing
>> + > Connect certain devices
>> + > Dispatch aditional option roms
>> + > Special boot: e.g.: USB boot, enter UI
>
> Please don't use ">" in this way, it confuses review (at least for me).
>
>> +**/
>> +VOID
>> +EFIAPI
>> +PlatformBootManagerAfterConsole (
>> + VOID
>> + )
>> +{
>> + EFI_STATUS Status;
>> + ESRT_MANAGEMENT_PROTOCOL *EsrtManagement = NULL;
>> +
>> + //
>> + // Show the splash screen.
>> + //
>> + EnableQuietBoot (PcdGetPtr (PcdLogoFile));
>> +
>> + //
>> + // Connect the rest of the devices.
>> + //
>> + EfiBootManagerConnectAll ();
>> +
>> + //
>> + // Enumerate all possible boot options.
>> + //
>> + EfiBootManagerRefreshAllBootOption ();
>> +
>> + //
>> + //Sync Esrt Table
>> + //
>> + Status = gBS->LocateProtocol (&gEsrtManagementProtocolGuid, NULL, (VOID **)&EsrtManagement);
>
> Line length.
>
>> + if (!EFI_ERROR (Status)) {
>> + Status = EsrtManagement->SyncEsrtFmp ();
>> + }
>> +
>> + //
>> + // Register UEFI Shell
>> + //
>> + PlatformRegisterFvBootOption (
>> + PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
>> + );
>> +}
>> +
>> +/**
>> + This function is called each second during the boot manager waits the
>> + timeout.
>> +
>> + @param TimeoutRemain The remaining timeout.
>> +**/
>> +VOID
>> +EFIAPI
>> +PlatformBootManagerWaitCallback (
>> + UINT16 TimeoutRemain
>> + )
>> +{
>> + Print(L"\r%-2d seconds left, Press Esc or F2 to enter Setup.", TimeoutRemain);
>
> Space before (.
>
>> +}
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
>> new file mode 100644
>> index 0000000..0a3c626
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
>> @@ -0,0 +1,59 @@
>> +/** @file
>> + Head file for BDS Platform specific code
>> +
>> + Copyright (C) 2015-2016, Red Hat, Inc.
>> + Copyright (c) 2004 - 2008, Intel Corporation. All rights reserved.<BR>
>> + Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials are licensed and made available
>> + under the terms and conditions of the BSD License which accompanies this
>> + distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
>> + WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#ifndef _PLATFORM_BM_H_
>> +#define _PLATFORM_BM_H_
>> +
>> +#include <Library/BaseLib.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/DevicePathLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Library/UefiRuntimeServicesTableLib.h>
>> +
>> +/**
>> + Use SystemTable Conout to stop video based Simple Text Out consoles from
>> + going to the video device. Put up LogoFile on every video device that is a
>> + console.
>> +
>> + @param[in] LogoFile File name of logo to display on the center of the
>> + screen.
>> +
>> + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo
>> + displayed.
>> + @retval EFI_UNSUPPORTED Logo not found
>> +**/
>> +EFI_STATUS
>> +EnableQuietBoot (
>> + IN EFI_GUID *LogoFile
>> + );
>> +
>> +/**
>> + Use SystemTable Conout to turn on video based Simple Text Out consoles. The
>> + Simple Text Out screens will now be synced up with all non video output
>> + devices
>> +
>> + @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
>> +**/
>> +EFI_STATUS
>> +DisableQuietBoot (
>> + VOID
>> + );
>> +
>> +#endif // _PLATFORM_BM_H_
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> new file mode 100644
>> index 0000000..ae274f3
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> @@ -0,0 +1,89 @@
>> +## @file
>> +# Implementation for PlatformBootManagerLib library class interfaces.
>> +#
>> +# Copyright (C) 2015-2016, Red Hat, Inc.
>> +# Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
>> +# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
>> +# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials are licensed and made available
>> +# under the terms and conditions of the BSD License which accompanies this
>> +# distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
>> +# IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0001001a
>
>> + BASE_NAME = PlatformBootManagerLib
>> + FILE_GUID = 92FD2DE3-B9CB-4B35-8141-42AD34D73C9F
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
>> +
>> +#
>> +# The following information is for reference only and not required by the build tools.
>> +#
>> +# VALID_ARCHITECTURES = ARM AARCH64
>> +#
>> +
>> +[Sources]
>> + PlatformBm.c
>> + QuietBoot.c
>> +
>> +[Packages]
>> + IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[LibraryClasses]
>> + BaseLib
>> + BaseMemoryLib
>> + DebugLib
>> + DevicePathLib
>> + DxeServicesLib
>> + MemoryAllocationLib
>> + PcdLib
>> + PrintLib
>> + UefiBootManagerLib
>> + UefiBootServicesTableLib
>> + UefiLib
>> +
>> +[FeaturePcd]
>> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootlogoOnlyEnable
>> + gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
>> +
>> +[FixedPcd]
>> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile
>> + gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile
>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits
>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity
>> + gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits
>> + gEfiMdePkgTokenSpaceGuid.PcdDefaultTerminalType
>> +
>> +[Pcd]
>> + gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
>> +
>> +[Guids]
>> + gEfiFileInfoGuid
>> + gEfiFileSystemInfoGuid
>> + gEfiFileSystemVolumeLabelInfoIdGuid
>> + gEfiEndOfDxeEventGroupGuid
>
> Please sort alphabetically (move gEfiEndOfDxeEventGroupGuid first).
>
>> + gEfiTtyTermGuid
>> +
>> +[Protocols]
>> + gEfiDevicePathProtocolGuid
>> + gEfiFirmwareVolume2ProtocolGuid
>> + gEfiGenericMemTestProtocolGuid
>> + gEfiGraphicsOutputProtocolGuid
>> + gEfiLoadedImageProtocolGuid
>> + gEfiOEMBadgingProtocolGuid
>> + gEfiPciRootBridgeIoProtocolGuid
>> + gEfiSimpleFileSystemProtocolGuid
>> + gEsrtManagementProtocolGuid
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
>> new file mode 100644
>> index 0000000..0bd15da
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
>> @@ -0,0 +1,681 @@
>> +/** @file
>> +Platform BDS function for quiet boot support.
>> +
>> +Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
>> +Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +Copyright (c) 2018, Linaro Ltd. All rights reserved.<BR>
>> +This program and the accompanying materials
>> +are licensed and made available under the terms and conditions of the BSD License
>> +which accompanies this distribution. The full text of the license may be found at
>> +http://opensource.org/licenses/bsd-license.php
>> +
>> +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <IndustryStandard/Bmp.h>
>> +#include <Library/DxeServicesLib.h>
>> +#include <Protocol/BootLogo.h>
>> +#include <Protocol/OEMBadging.h>
>> +#include <Protocol/UgaDraw.h>
>> +
>> +#include "PlatformBm.h"
>> +
>> +/**
>> + Convert a *.BMP graphics image to a GOP blt buffer. If a NULL Blt buffer
>> + is passed in a GopBlt buffer will be allocated by this routine. If a GopBlt
>> + buffer is passed in it will be used if it is big enough.
>> +
>> + @param BmpImage Pointer to BMP file
>> + @param BmpImageSize Number of bytes in BmpImage
>> + @param GopBlt Buffer containing GOP version of BmpImage.
>> + @param GopBltSize Size of GopBlt in bytes.
>> + @param PixelHeight Height of GopBlt/BmpImage in pixels
>> + @param PixelWidth Width of GopBlt/BmpImage in pixels
>> +
>> + @retval EFI_SUCCESS GopBlt and GopBltSize are returned.
>> + @retval EFI_UNSUPPORTED BmpImage is not a valid *.BMP image
>> + @retval EFI_BUFFER_TOO_SMALL The passed in GopBlt buffer is not big enough.
>> + GopBltSize will contain the required size.
>> + @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate.
>> +
>> +**/
>> +STATIC
>> +EFI_STATUS
>> +ConvertBmpToGopBlt (
>> + IN VOID *BmpImage,
>> + IN UINTN BmpImageSize,
>> + IN OUT VOID **GopBlt,
>> + IN OUT UINTN *GopBltSize,
>> + OUT UINTN *PixelHeight,
>> + OUT UINTN *PixelWidth
>> + )
>> +{
>> + UINT8 *Image;
>> + UINT8 *ImageHeader;
>> + BMP_IMAGE_HEADER *BmpHeader;
>> + BMP_COLOR_MAP *BmpColorMap;
>> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer;
>> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
>> + UINT64 BltBufferSize;
>> + UINTN Index;
>> + UINTN Height;
>> + UINTN Width;
>> + UINTN ImageIndex;
>> + UINT32 DataSizePerLine;
>> + BOOLEAN IsAllocated;
>> + UINT32 ColorMapNum;
>> +
>> + if (sizeof (BMP_IMAGE_HEADER) > BmpImageSize) {
>> + return EFI_INVALID_PARAMETER;
>> + }
>> +
>> + BmpHeader = (BMP_IMAGE_HEADER *) BmpImage;
>> +
>> + if (BmpHeader->CharB != 'B' || BmpHeader->CharM != 'M') {
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + //
>> + // Doesn't support compress.
>> + //
>> + if (BmpHeader->CompressionType != 0) {
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + //
>> + // Only support BITMAPINFOHEADER format.
>> + // BITMAPFILEHEADER + BITMAPINFOHEADER = BMP_IMAGE_HEADER
>> + //
>> + if (BmpHeader->HeaderSize != sizeof (BMP_IMAGE_HEADER) - OFFSET_OF(BMP_IMAGE_HEADER, HeaderSize)) {
>
> Line length.
>
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + //
>> + // The data size in each line must be 4 byte alignment.
>> + //
>> + DataSizePerLine = ((BmpHeader->PixelWidth * BmpHeader->BitPerPixel + 31) >> 3) & (~0x3);
>
> Line length.
>
>> + BltBufferSize = MultU64x32 (DataSizePerLine, BmpHeader->PixelHeight);
>> + if (BltBufferSize > (UINT32) ~0) {
>> + return EFI_INVALID_PARAMETER;
>> + }
>> +
>> + if ((BmpHeader->Size != BmpImageSize) ||
>> + (BmpHeader->Size < BmpHeader->ImageOffset) ||
>> + (BmpHeader->Size - BmpHeader->ImageOffset != BmpHeader->PixelHeight * DataSizePerLine)) {
>
> Line length.
>
> In general, this file seems to mainly duplicate generically useful
> functions found in various locations in the edk2 tree.
> Could this instead be broken out into one or several helper libraries
> to keep in edk2?
>
> /
> Leif
>
Yes, this file QuietBoot.c will be deleted and replace with BootLogoLib in edk2 as Ard suggested.
>> + return EFI_INVALID_PARAMETER;
>> + }
>> +
>> + //
>> + // Calculate Color Map offset in the image.
>> + //
>> + Image = BmpImage;
>> + BmpColorMap = (BMP_COLOR_MAP *) (Image + sizeof (BMP_IMAGE_HEADER));
>> + if (BmpHeader->ImageOffset < sizeof (BMP_IMAGE_HEADER)) {
>> + return EFI_INVALID_PARAMETER;
>> + }
>> +
>> + if (BmpHeader->ImageOffset > sizeof (BMP_IMAGE_HEADER)) {
>> + switch (BmpHeader->BitPerPixel) {
>> + case 1:
>> + ColorMapNum = 2;
>> + break;
>> + case 4:
>> + ColorMapNum = 16;
>> + break;
>> + case 8:
>> + ColorMapNum = 256;
>> + break;
>> + default:
>> + ColorMapNum = 0;
>> + break;
>> + }
>> + //
>> + // BMP file may has padding data between the bmp header section and the bmp data section.
>> + //
>> + if (BmpHeader->ImageOffset - sizeof (BMP_IMAGE_HEADER) < sizeof (BMP_COLOR_MAP) * ColorMapNum) {
>> + return EFI_INVALID_PARAMETER;
>> + }
>> + }
>> +
>> + //
>> + // Calculate graphics image data address in the image
>> + //
>> + Image = ((UINT8 *) BmpImage) + BmpHeader->ImageOffset;
>> + ImageHeader = Image;
>> +
>> + //
>> + // Calculate the BltBuffer needed size.
>> + //
>> + BltBufferSize = MultU64x32 ((UINT64) BmpHeader->PixelWidth, BmpHeader->PixelHeight);
>> + //
>> + // Ensure the BltBufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
>> + //
>> + if (BltBufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
>> + return EFI_UNSUPPORTED;
>> + }
>> + BltBufferSize = MultU64x32 (BltBufferSize, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
>> +
>> + IsAllocated = FALSE;
>> + if (*GopBlt == NULL) {
>> + //
>> + // GopBlt is not allocated by caller.
>> + //
>> + *GopBltSize = (UINTN) BltBufferSize;
>> + *GopBlt = AllocatePool (*GopBltSize);
>> + IsAllocated = TRUE;
>> + if (*GopBlt == NULL) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + } else {
>> + //
>> + // GopBlt has been allocated by caller.
>> + //
>> + if (*GopBltSize < (UINTN) BltBufferSize) {
>> + *GopBltSize = (UINTN) BltBufferSize;
>> + return EFI_BUFFER_TOO_SMALL;
>> + }
>> + }
>> +
>> + *PixelWidth = BmpHeader->PixelWidth;
>> + *PixelHeight = BmpHeader->PixelHeight;
>> +
>> + //
>> + // Convert image from BMP to Blt buffer format
>> + //
>> + BltBuffer = *GopBlt;
>> + for (Height = 0; Height < BmpHeader->PixelHeight; Height++) {
>> + Blt = &BltBuffer[(BmpHeader->PixelHeight - Height - 1) * BmpHeader->PixelWidth];
>> + for (Width = 0; Width < BmpHeader->PixelWidth; Width++, Image++, Blt++) {
>> + switch (BmpHeader->BitPerPixel) {
>> + case 1:
>> + //
>> + // Convert 1-bit (2 colors) BMP to 24-bit color
>> + //
>> + for (Index = 0; Index < 8 && Width < BmpHeader->PixelWidth; Index++) {
>> + Blt->Red = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Red;
>> + Blt->Green = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Green;
>> + Blt->Blue = BmpColorMap[((*Image) >> (7 - Index)) & 0x1].Blue;
>> + Blt++;
>> + Width++;
>> + }
>> +
>> + Blt--;
>> + Width--;
>> + break;
>> +
>> + case 4:
>> + //
>> + // Convert 4-bit (16 colors) BMP Palette to 24-bit color
>> + //
>> + Index = (*Image) >> 4;
>> + Blt->Red = BmpColorMap[Index].Red;
>> + Blt->Green = BmpColorMap[Index].Green;
>> + Blt->Blue = BmpColorMap[Index].Blue;
>> + if (Width < (BmpHeader->PixelWidth - 1)) {
>> + Blt++;
>> + Width++;
>> + Index = (*Image) & 0x0f;
>> + Blt->Red = BmpColorMap[Index].Red;
>> + Blt->Green = BmpColorMap[Index].Green;
>> + Blt->Blue = BmpColorMap[Index].Blue;
>> + }
>> + break;
>> +
>> + case 8:
>> + //
>> + // Convert 8-bit (256 colors) BMP Palette to 24-bit color
>> + //
>> + Blt->Red = BmpColorMap[*Image].Red;
>> + Blt->Green = BmpColorMap[*Image].Green;
>> + Blt->Blue = BmpColorMap[*Image].Blue;
>> + break;
>> +
>> + case 24:
>> + //
>> + // It is 24-bit BMP.
>> + //
>> + Blt->Blue = *Image++;
>> + Blt->Green = *Image++;
>> + Blt->Red = *Image;
>> + break;
>> +
>> + default:
>> + //
>> + // Other bit format BMP is not supported.
>> + //
>> + if (IsAllocated) {
>> + FreePool (*GopBlt);
>> + *GopBlt = NULL;
>> + }
>> + return EFI_UNSUPPORTED;
>> + };
>> +
>> + }
>> +
>> + ImageIndex = (UINTN) (Image - ImageHeader);
>> + if ((ImageIndex % 4) != 0) {
>> + //
>> + // Bmp Image starts each row on a 32-bit boundary!
>> + //
>> + Image = Image + (4 - (ImageIndex % 4));
>> + }
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +/**
>> + Use SystemTable Conout to stop video based Simple Text Out consoles from going
>> + to the video device. Put up LogoFile on every video device that is a console.
>> +
>> + @param[in] LogoFile File name of logo to display on the center of the screen.
>> +
>> + @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed.
>> + @retval EFI_UNSUPPORTED Logo not found
>> +
>> +**/
>> +EFI_STATUS
>> +EnableQuietBoot (
>> + IN EFI_GUID *LogoFile
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_OEM_BADGING_PROTOCOL *Badging;
>> + UINT32 SizeOfX;
>> + UINT32 SizeOfY;
>> + INTN DestX;
>> + INTN DestY;
>> + UINT8 *ImageData;
>> + UINTN ImageSize;
>> + UINTN BltSize;
>> + UINT32 Instance;
>> + EFI_BADGING_FORMAT Format;
>> + EFI_BADGING_DISPLAY_ATTRIBUTE Attribute;
>> + UINTN CoordinateX;
>> + UINTN CoordinateY;
>> + UINTN Height;
>> + UINTN Width;
>> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *Blt;
>> + EFI_UGA_DRAW_PROTOCOL *UgaDraw;
>> + UINT32 ColorDepth;
>> + UINT32 RefreshRate;
>> + EFI_GRAPHICS_OUTPUT_PROTOCOL *GraphicsOutput;
>> + EFI_BOOT_LOGO_PROTOCOL *BootLogo;
>> + UINTN NumberOfLogos;
>> + EFI_GRAPHICS_OUTPUT_BLT_PIXEL *LogoBlt;
>> + UINTN LogoDestX;
>> + UINTN LogoDestY;
>> + UINTN LogoHeight;
>> + UINTN LogoWidth;
>> + UINTN NewDestX;
>> + UINTN NewDestY;
>> + UINTN NewHeight;
>> + UINTN NewWidth;
>> + UINT64 BufferSize;
>> +
>> + UgaDraw = NULL;
>> + //
>> + // Try to open GOP first
>> + //
>> + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiGraphicsOutputProtocolGuid, (VOID **) &GraphicsOutput);
>> + if (EFI_ERROR (Status) && FeaturePcdGet (PcdUgaConsumeSupport)) {
>> + GraphicsOutput = NULL;
>> + //
>> + // Open GOP failed, try to open UGA
>> + //
>> + Status = gBS->HandleProtocol (gST->ConsoleOutHandle, &gEfiUgaDrawProtocolGuid, (VOID **) &UgaDraw);
>> + }
>> + if (EFI_ERROR (Status)) {
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + //
>> + // Try to open Boot Logo Protocol.
>> + //
>> + BootLogo = NULL;
>> + gBS->LocateProtocol (&gEfiBootLogoProtocolGuid, NULL, (VOID **) &BootLogo);
>> +
>> + //
>> + // Erase Cursor from screen
>> + //
>> + gST->ConOut->EnableCursor (gST->ConOut, FALSE);
>> +
>> + Badging = NULL;
>> + Status = gBS->LocateProtocol (&gEfiOEMBadgingProtocolGuid, NULL, (VOID **) &Badging);
>> +
>> + if (GraphicsOutput != NULL) {
>> + SizeOfX = GraphicsOutput->Mode->Info->HorizontalResolution;
>> + SizeOfY = GraphicsOutput->Mode->Info->VerticalResolution;
>> +
>> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
>> + Status = UgaDraw->GetMode (UgaDraw, &SizeOfX, &SizeOfY, &ColorDepth, &RefreshRate);
>> + if (EFI_ERROR (Status)) {
>> + return EFI_UNSUPPORTED;
>> + }
>> + } else {
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + Blt = NULL;
>> + NumberOfLogos = 0;
>> + LogoDestX = 0;
>> + LogoDestY = 0;
>> + LogoHeight = 0;
>> + LogoWidth = 0;
>> + NewDestX = 0;
>> + NewDestY = 0;
>> + NewHeight = 0;
>> + NewWidth = 0;
>> + Instance = 0;
>> + Height = 0;
>> + Width = 0;
>> + while (1) {
>> + ImageData = NULL;
>> + ImageSize = 0;
>> +
>> + if (Badging != NULL) {
>> + //
>> + // Get image from OEMBadging protocol.
>> + //
>> + Status = Badging->GetImage (
>> + Badging,
>> + &Instance,
>> + &Format,
>> + &ImageData,
>> + &ImageSize,
>> + &Attribute,
>> + &CoordinateX,
>> + &CoordinateY
>> + );
>> + if (EFI_ERROR (Status)) {
>> + goto Done;
>> + }
>> +
>> + //
>> + // Currently only support BMP format.
>> + //
>> + if (Format != EfiBadgingFormatBMP) {
>> + if (ImageData != NULL) {
>> + FreePool (ImageData);
>> + }
>> + continue;
>> + }
>> + } else {
>> + //
>> + // Get the specified image from FV.
>> + //
>> + Status = GetSectionFromAnyFv (LogoFile, EFI_SECTION_RAW, 0, (VOID **) &ImageData, &ImageSize);
>> + if (EFI_ERROR (Status)) {
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + CoordinateX = 0;
>> + CoordinateY = 0;
>> + if (!FeaturePcdGet(PcdBootlogoOnlyEnable)) {
>> + Attribute = EfiBadgingDisplayAttributeCenter;
>> + } else {
>> + Attribute = EfiBadgingDisplayAttributeCustomized;
>> + }
>> + }
>> +
>> + if (Blt != NULL) {
>> + FreePool (Blt);
>> + }
>> + Blt = NULL;
>> + Status = ConvertBmpToGopBlt (
>> + ImageData,
>> + ImageSize,
>> + (VOID **) &Blt,
>> + &BltSize,
>> + &Height,
>> + &Width
>> + );
>> + if (EFI_ERROR (Status)) {
>> + FreePool (ImageData);
>> +
>> + if (Badging == NULL) {
>> + return Status;
>> + } else {
>> + continue;
>> + }
>> + }
>> +
>> + //
>> + // Calculate the display position according to Attribute.
>> + //
>> + switch (Attribute) {
>> + case EfiBadgingDisplayAttributeLeftTop:
>> + DestX = CoordinateX;
>> + DestY = CoordinateY;
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeCenterTop:
>> + DestX = (SizeOfX - Width) / 2;
>> + DestY = CoordinateY;
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeRightTop:
>> + DestX = (SizeOfX - Width - CoordinateX);
>> + DestY = CoordinateY;;
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeCenterRight:
>> + DestX = (SizeOfX - Width - CoordinateX);
>> + DestY = (SizeOfY - Height) / 2;
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeRightBottom:
>> + DestX = (SizeOfX - Width - CoordinateX);
>> + DestY = (SizeOfY - Height - CoordinateY);
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeCenterBottom:
>> + DestX = (SizeOfX - Width) / 2;
>> + DestY = (SizeOfY - Height - CoordinateY);
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeLeftBottom:
>> + DestX = CoordinateX;
>> + DestY = (SizeOfY - Height - CoordinateY);
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeCenterLeft:
>> + DestX = CoordinateX;
>> + DestY = (SizeOfY - Height) / 2;
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeCenter:
>> + DestX = (SizeOfX - Width) / 2;
>> + DestY = (SizeOfY - Height) / 2;
>> + break;
>> +
>> + case EfiBadgingDisplayAttributeCustomized:
>> + DestX = (SizeOfX - Width) / 2;
>> + DestY = ((SizeOfY * 382) / 1000) - Height / 2;
>> + break;
>> +
>> + default:
>> + DestX = CoordinateX;
>> + DestY = CoordinateY;
>> + break;
>> + }
>> +
>> + if ((DestX >= 0) && (DestY >= 0)) {
>> + if (GraphicsOutput != NULL) {
>> + Status = GraphicsOutput->Blt (
>> + GraphicsOutput,
>> + Blt,
>> + EfiBltBufferToVideo,
>> + 0,
>> + 0,
>> + (UINTN) DestX,
>> + (UINTN) DestY,
>> + Width,
>> + Height,
>> + Width * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
>> + );
>> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
>> + Status = UgaDraw->Blt (
>> + UgaDraw,
>> + (EFI_UGA_PIXEL *) Blt,
>> + EfiUgaBltBufferToVideo,
>> + 0,
>> + 0,
>> + (UINTN) DestX,
>> + (UINTN) DestY,
>> + Width,
>> + Height,
>> + Width * sizeof (EFI_UGA_PIXEL)
>> + );
>> + } else {
>> + Status = EFI_UNSUPPORTED;
>> + }
>> +
>> + //
>> + // Report displayed Logo information.
>> + //
>> + if (!EFI_ERROR (Status)) {
>> + NumberOfLogos++;
>> +
>> + if (LogoWidth == 0) {
>> + //
>> + // The first Logo.
>> + //
>> + LogoDestX = (UINTN) DestX;
>> + LogoDestY = (UINTN) DestY;
>> + LogoWidth = Width;
>> + LogoHeight = Height;
>> + } else {
>> + //
>> + // Merge new logo with old one.
>> + //
>> + NewDestX = MIN ((UINTN) DestX, LogoDestX);
>> + NewDestY = MIN ((UINTN) DestY, LogoDestY);
>> + NewWidth = MAX ((UINTN) DestX + Width, LogoDestX + LogoWidth) - NewDestX;
>> + NewHeight = MAX ((UINTN) DestY + Height, LogoDestY + LogoHeight) - NewDestY;
>> +
>> + LogoDestX = NewDestX;
>> + LogoDestY = NewDestY;
>> + LogoWidth = NewWidth;
>> + LogoHeight = NewHeight;
>> + }
>> + }
>> + }
>> +
>> + FreePool (ImageData);
>> +
>> + if (Badging == NULL) {
>> + break;
>> + }
>> + }
>> +
>> +Done:
>> + if (BootLogo == NULL || NumberOfLogos == 0) {
>> + //
>> + // No logo displayed.
>> + //
>> + if (Blt != NULL) {
>> + FreePool (Blt);
>> + }
>> +
>> + return Status;
>> + }
>> +
>> + //
>> + // Advertise displayed Logo information.
>> + //
>> + if (NumberOfLogos == 1) {
>> + //
>> + // Only one logo displayed, use its Blt buffer directly for BootLogo protocol.
>> + //
>> + LogoBlt = Blt;
>> + Status = EFI_SUCCESS;
>> + } else {
>> + //
>> + // More than one Logo displayed, get merged BltBuffer using VideoToBuffer operation.
>> + //
>> + if (Blt != NULL) {
>> + FreePool (Blt);
>> + }
>> +
>> + //
>> + // Ensure the LogoHeight * LogoWidth doesn't overflow
>> + //
>> + if (LogoHeight > DivU64x64Remainder ((UINTN) ~0, LogoWidth, NULL)) {
>> + return EFI_UNSUPPORTED;
>> + }
>> + BufferSize = MultU64x64 (LogoWidth, LogoHeight);
>> +
>> + //
>> + // Ensure the BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL) doesn't overflow
>> + //
>> + if (BufferSize > DivU64x32 ((UINTN) ~0, sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL))) {
>> + return EFI_UNSUPPORTED;
>> + }
>> +
>> + LogoBlt = AllocateZeroPool ((UINTN)BufferSize * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL));
>> + if (LogoBlt == NULL) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> +
>> + if (GraphicsOutput != NULL) {
>> + Status = GraphicsOutput->Blt (
>> + GraphicsOutput,
>> + LogoBlt,
>> + EfiBltVideoToBltBuffer,
>> + LogoDestX,
>> + LogoDestY,
>> + 0,
>> + 0,
>> + LogoWidth,
>> + LogoHeight,
>> + LogoWidth * sizeof (EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
>> + );
>> + } else if (UgaDraw != NULL && FeaturePcdGet (PcdUgaConsumeSupport)) {
>> + Status = UgaDraw->Blt (
>> + UgaDraw,
>> + (EFI_UGA_PIXEL *) LogoBlt,
>> + EfiUgaVideoToBltBuffer,
>> + LogoDestX,
>> + LogoDestY,
>> + 0,
>> + 0,
>> + LogoWidth,
>> + LogoHeight,
>> + LogoWidth * sizeof (EFI_UGA_PIXEL)
>> + );
>> + } else {
>> + Status = EFI_UNSUPPORTED;
>> + }
>> + }
>> +
>> + if (!EFI_ERROR (Status)) {
>> + BootLogo->SetBootLogo (BootLogo, LogoBlt, LogoDestX, LogoDestY, LogoWidth, LogoHeight);
>> + }
>> + FreePool (LogoBlt);
>> +
>> + return Status;
>> +}
>> +
>> +/**
>> + Use SystemTable Conout to turn on video based Simple Text Out consoles. The
>> + Simple Text Out screens will now be synced up with all non video output devices
>> +
>> + @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
>> +
>> +**/
>> +EFI_STATUS
>> +DisableQuietBoot (
>> + VOID
>> + )
>> +{
>> +
>> + //
>> + // Enable Cursor on Screen
>> + //
>> + gST->ConOut->EnableCursor (gST->ConOut, TRUE);
>> + return EFI_SUCCESS;
>> +}
>> +
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option
2018-01-20 10:41 ` Ard Biesheuvel
@ 2018-01-23 8:28 ` Huangming (Mark)
0 siblings, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 8:28 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
The sources will be modified following below comments.
On 2018/1/20 18:41, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> Modify the feature of BMC set boot option as switching generic
>> BDS. Move main functions to BmcConfigBootLib.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D03/D03.dsc | 1 +
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 ++
>> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 ++++++++++++++++++++
>> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 +++
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 7 +
>> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 1 +
>> Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------------
>> Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +-
>> 9 files changed, 548 insertions(+), 436 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index f7efff5..b2eae7d 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -70,6 +70,7 @@
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> !if $(GENERIC_BDS) == TRUE
>> + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
>> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
>> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>> ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 57370dc..b89cea3 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -85,6 +85,7 @@
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> !if $(GENERIC_BDS) == TRUE
>> + BmcConfigBootLib|Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
>> UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
>> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>> ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
>> diff --git a/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
>> new file mode 100644
>> index 0000000..d937234
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
>> @@ -0,0 +1,31 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#ifndef _BMC_CONFIG_BOOT_LIB_H_
>> +#define _BMC_CONFIG_BOOT_LIB_H_
>> +
>> +VOID
>> +EFIAPI
>> +RestoreBootOrder (
>> + VOID
>> + );
>> +
>> +VOID
>> +EFIAPI
>> +HandleBmcBootType (
>> + VOID
>> + );
>> +
>> +#endif
>> diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
>> new file mode 100644
>> index 0000000..c446f93
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
>> @@ -0,0 +1,454 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +#include <Uefi.h>
>> +#include <Library/BaseLib.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/DevicePathLib.h>
>> +#include <Library/IpmiCmdLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/PrintLib.h>
>> +#include <Library/UefiBootManagerLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Library/UefiRuntimeServicesTableLib.h>
>> +#include <Guid/GlobalVariable.h>
>> +#include <Protocol/DevicePathToText.h>
>> +
>> +GUID gOemBootVariableGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99,
>> + 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} };
>> +
>
> I know you are just moving this around, but this should be defined in
> HisiPkg.dec not here
>
>> +STATIC
>> +UINT16
>> +GetBBSTypeFromFileSysPath (
>> + IN CHAR16 *UsbPathTxt,
>> + IN CHAR16 *FileSysPathTxt,
>> + IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
>> + )
>> +{
>> + EFI_DEVICE_PATH_PROTOCOL *Node;
>> +
>> + if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
>> + Node = FileSysPath;
>> + while (!IsDevicePathEnd (Node)) {
>> + if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
>> + (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
>> + return BBS_TYPE_CDROM;
>> + }
>> + Node = NextDevicePathNode (Node);
>> + }
>> + }
>> +
>> + return BBS_TYPE_UNKNOWN;
>> +}
>> +
>> +STATIC
>> +UINT16
>> +GetBBSTypeFromUsbPath (
>> + IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_HANDLE *FileSystemHandles;
>> + UINTN NumberFileSystemHandles;
>> + UINTN Index;
>> + EFI_DEVICE_PATH_PROTOCOL *FileSysPath;
>> + EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText;
>> + CHAR16 *UsbPathTxt;
>> + CHAR16 *FileSysPathTxt;
>> + UINT16 Result;
>> +
>> + Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText);
>
> line length
>
> Also, if it is an error for gEfiDevicePathToTextProtocolGuid to be
> unavailable, you can add it to your DEPEX instead and just use
> ASSERT_EFI_ERROR() here
>
I will modify as your suggestion.
It is good for reducing the conditional statement.
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status));
>> + return BBS_TYPE_UNKNOWN;
>> + }
>> +
>> + Result = BBS_TYPE_UNKNOWN;
>> + UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
>> + if (UsbPathTxt == NULL) {
>> + return Result;
>> + }
>> +
>> + Status = gBS->LocateHandleBuffer (
>> + ByProtocol,
>> + &gEfiSimpleFileSystemProtocolGuid,
>> + NULL,
>> + &NumberFileSystemHandles,
>> + &FileSystemHandles
>> + );
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
>> + FreePool (UsbPathTxt);
>> + return BBS_TYPE_UNKNOWN;
>> + }
>> +
>> + for (Index = 0; Index < NumberFileSystemHandles; Index++) {
>> + FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
>> + FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
>> +
>> + if (FileSysPathTxt == NULL) {
>> + continue;
>> + }
>> +
>> + Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
>> + FreePool (FileSysPathTxt);
>> +
>> + if (Result != BBS_TYPE_UNKNOWN) {
>> + break;
>> + }
>> + }
>> +
>> + if (NumberFileSystemHandles != 0) {
>> + FreePool (FileSystemHandles);
>> + }
>> +
>> + FreePool (UsbPathTxt);
>> +
>> + return Result;
>> +}
>> +
>> +STATIC
>> +UINT16
>> +GetBBSTypeFromMessagingDevicePath (
>> + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
>> + IN EFI_DEVICE_PATH_PROTOCOL *Node
>> + )
>> +{
>> + VENDOR_DEVICE_PATH *Vendor;
>> + UINT16 Result;
>> +
>> + Result = BBS_TYPE_UNKNOWN;
>> +
>> + switch (DevicePathSubType (Node)) {
>> + case MSG_MAC_ADDR_DP:
>> + Result = BBS_TYPE_EMBEDDED_NETWORK;
>> + break;
>> +
>> + case MSG_USB_DP:
>> + Result = GetBBSTypeFromUsbPath (DevicePath);
>> + if (Result == BBS_TYPE_UNKNOWN) {
>> + Result = BBS_TYPE_USB;
>
> Just one space after =
>
>> + }
>> + break;
>> +
>> + case MSG_SATA_DP:
>> + Result = BBS_TYPE_HARDDRIVE;
>> + break;
>> +
>> + case MSG_VENDOR_DP:
>> + Vendor = (VENDOR_DEVICE_PATH *) (Node);
>> + if ((&Vendor->Guid) != NULL) {
>
> Remove redundant ()
>
>> + if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
>> + Result = BBS_TYPE_HARDDRIVE;
>> + }
>> + }
>> + break;
>> +
>> + default:
>> + Result = BBS_TYPE_UNKNOWN;
>> + break;
>> + }
>> +
>> + return Result;
>> +}
>> +
>> +STATIC
>> +UINT16
>> +GetBBSTypeByDevicePath (
>> + IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
>> + )
>> +{
>> + EFI_DEVICE_PATH_PROTOCOL *Node;
>> + UINT16 Result;
>> +
>> + Result = BBS_TYPE_UNKNOWN;
>> + if (DevicePath == NULL) {
>> + return Result;
>> + }
>> +
>> + Node = DevicePath;
>> + while (!IsDevicePathEnd (Node)) {
>> + switch (DevicePathType (Node)) {
>> + case MEDIA_DEVICE_PATH:
>> + if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
>> + Result = BBS_TYPE_CDROM;
>> + }
>> + break;
>> +
>> + case MESSAGING_DEVICE_PATH:
>> + Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
>> + break;
>> +
>> + default:
>> + Result = BBS_TYPE_UNKNOWN;
>> + break;
>> + }
>> +
>> + if (Result != BBS_TYPE_UNKNOWN) {
>> + break;
>> + }
>> +
>> + Node = NextDevicePathNode (Node);
>> + }
>> +
>> + return Result;
>> +}
>> +
>> +STATIC
>> +EFI_STATUS
>> +GetBmcBootOptionsSetting (
>> + OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
>> + return Status;
>> + }
>> +
>> + if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
>> + return EFI_NOT_FOUND;
>> + }
>> +
>> + if (BmcBootOpt->Persistent) {
>> + BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
>> + } else {
>> + BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
>> + }
>> +
>> + Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
>> + }
>> +
>> + return Status;
>> +}
>> +
>> +VOID
>> +RestoreBootOrder (
>> + VOID
>> + )
>> +{
>> + EFI_STATUS Status;
>> + UINT16 *BootOrder;
>> + UINTN BootOrderSize;
>> +
>> + GetVariable2 (L"BootOrderBackup", &gOemBootVariableGuid, (VOID **) &BootOrder, &BootOrderSize);
>
> line length
>
>> + if (BootOrder == NULL) {
>> + return ;
>> + }
>> +
>> + Print (L"\nRestore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
>> +
>> + Status = gRT->SetVariable (
>> + L"BootOrder",
>> + &gEfiGlobalVariableGuid,
>> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>
> line length
>
>> + BootOrderSize,
>> + BootOrder
>> + );
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
>> + }
>> +
>> + Status = gRT->SetVariable (
>> + L"BootOrderBackup",
>> + &gOemBootVariableGuid,
>> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> + 0,
>> + NULL
>> + );
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
>> + }
>> +
>> + FreePool (BootOrder);
>> +
>> + return;
>
> Remove this return
>
>> +}
>> +
>> +
>
> STATIC
>
>> +VOID
>
> EFIAPI
>
>> +RestoreBootOrderOnReadyToBoot (
>> + IN EFI_EVENT Event,
>> + IN VOID *Context
>> + )
>> +{
>> + // restore BootOrder variable in normal condition.
>> + RestoreBootOrder ();
>> +}
>> +
>> +STATIC
>> +VOID
>> +UpdateBootOrder (
>> + IN UINT16 *NewOrder,
>> + IN UINT16 *BootOrder,
>> + IN UINTN BootOrderSize
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_EVENT Event;
>> +
>> + Status = gRT->SetVariable (
>> + L"BootOrderBackup",
>> + &gOemBootVariableGuid,
>> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> + BootOrderSize,
>> + BootOrder
>> + );
>> + if (EFI_ERROR (Status)) {
>
> no DEBUG()?
>
>> + return;
>> + }
>> +
>> + Status = gRT->SetVariable (
>> + L"BootOrder",
>> + &gEfiGlobalVariableGuid,
>> + EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>
> line length
>
>> + BootOrderSize,
>> + NewOrder
>> + );
>> + if (EFI_ERROR (Status)) {
>
> no DEBUG()?
>
>> + return;
>> + }
>> +
>> + // Register notify function to restore BootOrder variable on ReadyToBoot Event.
>> + Status = gBS->CreateEventEx (
>> + EVT_NOTIFY_SIGNAL,
>> + TPL_CALLBACK,
>> + RestoreBootOrderOnReadyToBoot,
>> + NULL,
>> + &gEfiEventReadyToBootGuid,
>> + &Event
>> + );
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
>> + }
>> +
>> + return;
>
> Remove this
>
>> +}
>> +
>> +STATIC
>> +VOID
>> +SetBootOrder (
>> + IN UINT16 BootType
>> + )
>> +{
>> + EFI_STATUS Status;
>> + UINT16 *NewOrder;
>> + UINT16 *RemainBoots;
>> + UINT16 *BootOrder;
>> + UINTN BootOrderSize;
>> + EFI_BOOT_MANAGER_LOAD_OPTION Option;
>> + CHAR16 OptionName[sizeof ("Boot####")];
>> + UINTN Index;
>> + UINTN SelectCnt;
>> + UINTN RemainCnt;
>> +
>> + GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
>> + if (BootOrder == NULL) {
>> + return ;
>> + }
>> +
>> + NewOrder = AllocatePool (BootOrderSize);
>> + RemainBoots = AllocatePool (BootOrderSize);
>> + if ((NewOrder == NULL) || (RemainBoots == NULL)) {
>> + DEBUG ((DEBUG_ERROR, "Out of resources."));
>> + goto Exit;
>> + }
>> +
>> + SelectCnt = 0;
>> + RemainCnt = 0;
>> +
>> + for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
>> + UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
>> + Status = EfiBootManagerVariableToLoadOption (OptionName, &Option);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
>> + continue;
>> + }
>> +
>> + if (GetBBSTypeByDevicePath (Option.FilePath) == BootType) {
>> + NewOrder[SelectCnt++] = BootOrder[Index];
>> + } else {
>> + RemainBoots[RemainCnt++] = BootOrder[Index];
>> + }
>> + }
>> +
>> + if (SelectCnt != 0) {
>> + // append RemainBoots to NewOrder
>> + for (Index = 0; Index < RemainCnt; Index++) {
>> + NewOrder[SelectCnt + Index] = RemainBoots[Index];
>> + }
>> +
>> + if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
>> + UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
>> + }
>> + }
>> +
>> +Exit:
>> + FreePool (BootOrder);
>> + if (NewOrder != NULL) {
>> + FreePool (NewOrder);
>> + }
>> + if (RemainBoots != NULL) {
>> + FreePool (RemainBoots);
>> + }
>> +
>> + return ;
>
> Remove this
>
>> +}
>> +
>> +VOID
>> +HandleBmcBootType (
>> + VOID
>> + )
>> +{
>> + EFI_STATUS Status;
>> + IPMI_GET_BOOT_OPTION BmcBootOpt;
>> + UINT16 BootType;
>> +
>> + Status = GetBmcBootOptionsSetting (&BmcBootOpt);
>> + if (EFI_ERROR (Status)) {
>> + return;
>> + }
>> +
>> + Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
>> +
>> + switch (BmcBootOpt.BootDeviceSelector) {
>> + case ForcePxe:
>> + BootType = BBS_TYPE_EMBEDDED_NETWORK;
>> + break;
>> +
>> + case ForcePrimaryRemovableMedia:
>> + BootType = BBS_TYPE_USB;
>> + break;
>> +
>> + case ForceDefaultHardDisk:
>> + BootType = BBS_TYPE_HARDDRIVE;
>> + break;
>> +
>> + case ForceDefaultCD:
>> + BootType = BBS_TYPE_CDROM;
>> + break;
>> +
>> + default:
>> + return;
>> + }
>> +
>> + SetBootOrder (BootType);
>> +}
>> +
>> diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
>> new file mode 100644
>> index 0000000..7e407b4
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
>> @@ -0,0 +1,51 @@
>> +#/** @file
>> +#
>> +# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2015, Linaro Limited. All rights reserved.
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +#**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0000001A
>
>> + BASE_NAME = BmcConfigBootLib
>> + FILE_GUID = f174d192-7208-46c1-b9d1-65b2db06ad3b
>> + MODULE_TYPE = BASE
>> + VERSION_STRING = 1.0
>> + LIBRARY_CLASS = BmcConfigBootLib
>> +
>> +[Sources.common]
>> + BmcConfigBootLib.c
>> +
>> +[Packages]
>> + MdePkg/MdePkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[LibraryClasses]
>> + BaseLib
>> + BaseMemoryLib
>> + DebugLib
>> + DevicePathLib
>> + IpmiCmdLib
>> + PcdLib
>> + PrintLib
>> + UefiBootManagerLib
>> +
>> +[BuildOptions]
>> +
>
> Remove empty sections please
>
>> +[Pcd]
>> +
>> +[Guids]
>> + gEfiEventReadyToBootGuid
>> +
>> +[Protocols]
>> + gEfiDevicePathToTextProtocolGuid ## CONSUMES
>> + gEfiSimpleFileSystemProtocolGuid ## CONSUMES
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> index 5d8d58e..845519f 100644
>> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
>> @@ -16,6 +16,7 @@
>> **/
>>
>> #include <IndustryStandard/Pci22.h>
>> +#include <Library/BmcConfigBootLib.h>
>> #include <Library/DevicePathLib.h>
>> #include <Library/PcdLib.h>
>> #include <Library/UefiBootManagerLib.h>
>> @@ -474,6 +475,10 @@ PlatformBootManagerBeforeConsole (
>> //
>> EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);
>>
>> + // restore BootOrder variable if previous BMC boot override attempt
>> + // left it in a modified state
>> + RestoreBootOrder ();
>> +
>> UpdateMemory ();
>>
>> //
>> @@ -570,6 +575,8 @@ PlatformBootManagerAfterConsole (
>> PlatformRegisterFvBootOption (
>> PcdGetPtr (PcdShellFile), L"UEFI Shell", LOAD_OPTION_ACTIVE
>> );
>> +
>> + HandleBmcBootType ();
>> }
>>
>> /**
>> diff --git a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> index ae274f3..7b151a9 100644
>> --- a/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> +++ b/Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
>> @@ -44,6 +44,7 @@
>> [LibraryClasses]
>> BaseLib
>> BaseMemoryLib
>> + BmcConfigBootLib
>> DebugLib
>> DevicePathLib
>> DxeServicesLib
>> diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
>> index dc23e46..20015da 100644
>> --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
>> +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c
>> @@ -20,25 +20,19 @@
>> **/
>>
>> #include <IndustryStandard/Pci22.h>
>> +#include <Library/BmcConfigBootLib.h>
>> #include <Library/DevicePathLib.h>
>> -#include <Library/GenericBdsLib.h>
>> -#include <Library/IpmiCmdLib.h>
>> #include <Library/PcdLib.h>
>> #include <Library/PlatformBdsLib.h>
>> #include <Library/PrintLib.h>
>> #include <Library/UefiLib.h>
>> #include <Protocol/DevicePath.h>
>> -#include <Protocol/DevicePathToText.h>
>> #include <Protocol/GraphicsOutput.h>
>> #include <Protocol/PciIo.h>
>> #include <Protocol/PciRootBridgeIo.h>
>> -#include <Guid/GlobalVariable.h>
>>
>> #include "IntelBdsPlatform.h"
>>
>> -GUID gOemBootVaraibleGuid = {0xb7784577, 0x5aaf, 0x4557, {0xa1, 0x99,
>> - 0xd4, 0xa4, 0x2f, 0x45, 0x06, 0xf8} };
>> -
>> //3CEF354A-3B7A-4519-AD70-72A134698311
>> GUID gEblFileGuid = {0x3CEF354A, 0x3B7A, 0x4519, {0xAD, 0x70,
>> 0x72, 0xA1, 0x34, 0x69, 0x83, 0x11} };
>> @@ -149,432 +143,6 @@ STATIC PLATFORM_USB_KEYBOARD mUsbKeyboard = {
>> }
>> };
>>
>> -STATIC
>> -UINT16
>> -GetBBSTypeFromFileSysPath (
>> - IN CHAR16 *UsbPathTxt,
>> - IN CHAR16 *FileSysPathTxt,
>> - IN EFI_DEVICE_PATH_PROTOCOL *FileSysPath
>> - )
>> -{
>> - EFI_DEVICE_PATH_PROTOCOL *Node;
>> -
>> - if (StrnCmp (UsbPathTxt, FileSysPathTxt, StrLen (UsbPathTxt)) == 0) {
>> - Node = FileSysPath;
>> - while (!IsDevicePathEnd (Node)) {
>> - if ((DevicePathType (Node) == MEDIA_DEVICE_PATH) &&
>> - (DevicePathSubType (Node) == MEDIA_CDROM_DP)) {
>> - return BBS_TYPE_CDROM;
>> - }
>> - Node = NextDevicePathNode (Node);
>> - }
>> - }
>> -
>> - return BBS_TYPE_UNKNOWN;
>> -}
>> -
>> -STATIC
>> -UINT16
>> -GetBBSTypeFromUsbPath (
>> - IN CONST EFI_DEVICE_PATH_PROTOCOL *UsbPath
>> - )
>> -{
>> - EFI_STATUS Status;
>> - EFI_HANDLE *FileSystemHandles;
>> - UINTN NumberFileSystemHandles;
>> - UINTN Index;
>> - EFI_DEVICE_PATH_PROTOCOL *FileSysPath;
>> - EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *DevPathToText;
>> - CHAR16 *UsbPathTxt;
>> - CHAR16 *FileSysPathTxt;
>> - UINT16 Result;
>> -
>> - Status = gBS->LocateProtocol (&gEfiDevicePathToTextProtocolGuid, NULL, (VOID **) &DevPathToText);
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "Locate DevicePathToTextPro %r\n", Status));
>> - return BBS_TYPE_UNKNOWN;
>> - }
>> -
>> - Result = BBS_TYPE_UNKNOWN;
>> - UsbPathTxt = DevPathToText->ConvertDevicePathToText (UsbPath, TRUE, TRUE);
>> - if (UsbPathTxt == NULL) {
>> - return Result;
>> - }
>> -
>> - Status = gBS->LocateHandleBuffer (
>> - ByProtocol,
>> - &gEfiSimpleFileSystemProtocolGuid,
>> - NULL,
>> - &NumberFileSystemHandles,
>> - &FileSystemHandles
>> - );
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "Locate SimpleFileSystemProtocol error(%r)\n", Status));
>> - FreePool (UsbPathTxt);
>> - return BBS_TYPE_UNKNOWN;
>> - }
>> -
>> - for (Index = 0; Index < NumberFileSystemHandles; Index++) {
>> - FileSysPath = DevicePathFromHandle (FileSystemHandles[Index]);
>> - FileSysPathTxt = DevPathToText->ConvertDevicePathToText (FileSysPath, TRUE, TRUE);
>> -
>> - if (FileSysPathTxt == NULL) {
>> - continue;
>> - }
>> -
>> - Result = GetBBSTypeFromFileSysPath (UsbPathTxt, FileSysPathTxt, FileSysPath);
>> - FreePool (FileSysPathTxt);
>> -
>> - if (Result != BBS_TYPE_UNKNOWN) {
>> - break;
>> - }
>> - }
>> -
>> - if (NumberFileSystemHandles != 0) {
>> - FreePool (FileSystemHandles);
>> - }
>> -
>> - FreePool (UsbPathTxt);
>> -
>> - return Result;
>> -}
>> -
>> -STATIC
>> -UINT16
>> -GetBBSTypeFromMessagingDevicePath (
>> - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
>> - IN EFI_DEVICE_PATH_PROTOCOL *Node
>> - )
>> -{
>> - VENDOR_DEVICE_PATH *Vendor;
>> - UINT16 Result;
>> -
>> - Result = BBS_TYPE_UNKNOWN;
>> -
>> - switch (DevicePathSubType (Node)) {
>> - case MSG_MAC_ADDR_DP:
>> - Result = BBS_TYPE_EMBEDDED_NETWORK;
>> - break;
>> -
>> - case MSG_USB_DP:
>> - Result = GetBBSTypeFromUsbPath (DevicePath);
>> - if (Result == BBS_TYPE_UNKNOWN) {
>> - Result = BBS_TYPE_USB;
>> - }
>> - break;
>> -
>> - case MSG_SATA_DP:
>> - Result = BBS_TYPE_HARDDRIVE;
>> - break;
>> -
>> - case MSG_VENDOR_DP:
>> - Vendor = (VENDOR_DEVICE_PATH *) (Node);
>> - if ((&Vendor->Guid) != NULL) {
>> - if (CompareGuid (&Vendor->Guid, &((EFI_GUID) DEVICE_PATH_MESSAGING_SAS))) {
>> - Result = BBS_TYPE_HARDDRIVE;
>> - }
>> - }
>> - break;
>> -
>> - default:
>> - Result = BBS_TYPE_UNKNOWN;
>> - break;
>> - }
>> -
>> - return Result;
>> -}
>> -
>> -STATIC
>> -UINT16
>> -GetBBSTypeByDevicePath (
>> - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
>> - )
>> -{
>> - EFI_DEVICE_PATH_PROTOCOL *Node;
>> - UINT16 Result;
>> -
>> - Result = BBS_TYPE_UNKNOWN;
>> - if (DevicePath == NULL) {
>> - return Result;
>> - }
>> -
>> - Node = DevicePath;
>> - while (!IsDevicePathEnd (Node)) {
>> - switch (DevicePathType (Node)) {
>> - case MEDIA_DEVICE_PATH:
>> - if (DevicePathSubType (Node) == MEDIA_CDROM_DP) {
>> - Result = BBS_TYPE_CDROM;
>> - }
>> - break;
>> -
>> - case MESSAGING_DEVICE_PATH:
>> - Result = GetBBSTypeFromMessagingDevicePath (DevicePath, Node);
>> - break;
>> -
>> - default:
>> - Result = BBS_TYPE_UNKNOWN;
>> - break;
>> - }
>> -
>> - if (Result != BBS_TYPE_UNKNOWN) {
>> - break;
>> - }
>> -
>> - Node = NextDevicePathNode (Node);
>> - }
>> -
>> - return Result;
>> -}
>> -
>> -STATIC
>> -EFI_STATUS
>> -GetBmcBootOptionsSetting (
>> - OUT IPMI_GET_BOOT_OPTION *BmcBootOpt
>> - )
>> -{
>> - EFI_STATUS Status;
>> -
>> - Status = IpmiCmdGetSysBootOptions (BmcBootOpt);
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "Get iBMC BootOpts %r!\n", Status));
>> - return Status;
>> - }
>> -
>> - if (BmcBootOpt->BootFlagsValid != BOOT_OPTION_BOOT_FLAG_VALID) {
>> - return EFI_NOT_FOUND;
>> - }
>> -
>> - if (BmcBootOpt->Persistent) {
>> - BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_VALID;
>> - } else {
>> - BmcBootOpt->BootFlagsValid = BOOT_OPTION_BOOT_FLAG_INVALID;
>> - }
>> -
>> - Status = IpmiCmdSetSysBootOptions (BmcBootOpt);
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "Set iBMC BootOpts %r!\n", Status));
>> - }
>> -
>> - return Status;
>> -}
>> -
>> -STATIC
>> -VOID
>> -RestoreBootOrder (
>> - VOID
>> - )
>> -{
>> - EFI_STATUS Status;
>> - UINT16 *BootOrder;
>> - UINTN BootOrderSize;
>> -
>> - GetVariable2 (L"BootOrderBackup", &gOemBootVaraibleGuid, (VOID **) &BootOrder, &BootOrderSize);
>> - if (BootOrder == NULL) {
>> - return ;
>> - }
>> -
>> - Print (L"Restore BootOrder(%d).\n", BootOrderSize / sizeof (UINT16));
>> -
>> - Status = gRT->SetVariable (
>> - L"BootOrder",
>> - &gEfiGlobalVariableGuid,
>> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> - BootOrderSize,
>> - BootOrder
>> - );
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "SetVariable BootOrder %r!\n", Status));
>> - }
>> -
>> - Status = gRT->SetVariable (
>> - L"BootOrderBackup",
>> - &gOemBootVaraibleGuid,
>> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> - 0,
>> - NULL
>> - );
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "SetVariable BootOrderBackup %r!\n", Status));
>> - }
>> -
>> - FreePool (BootOrder);
>> -
>> - return;
>> -}
>> -
>> -
>> -VOID
>> -RestoreBootOrderOnReadyToBoot (
>> - IN EFI_EVENT Event,
>> - IN VOID *Context
>> - )
>> -{
>> - // restore BootOrder variable in normal condition.
>> - RestoreBootOrder ();
>> -}
>> -
>> -STATIC
>> -VOID
>> -UpdateBootOrder (
>> - IN UINT16 *NewOrder,
>> - IN UINT16 *BootOrder,
>> - IN UINTN BootOrderSize
>> - )
>> -{
>> - EFI_STATUS Status;
>> - EFI_EVENT Event;
>> -
>> - Status = gRT->SetVariable (
>> - L"BootOrderBackup",
>> - &gOemBootVaraibleGuid,
>> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> - BootOrderSize,
>> - BootOrder
>> - );
>> - if (EFI_ERROR (Status)) {
>> - return;
>> - }
>> -
>> - Status = gRT->SetVariable (
>> - L"BootOrder",
>> - &gEfiGlobalVariableGuid,
>> - EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS | EFI_VARIABLE_NON_VOLATILE,
>> - BootOrderSize,
>> - NewOrder
>> - );
>> - if (EFI_ERROR (Status)) {
>> - return;
>> - }
>> -
>> - // Register notify function to restore BootOrder variable on ReadyToBoot Event.
>> - Status = gBS->CreateEventEx (
>> - EVT_NOTIFY_SIGNAL,
>> - TPL_CALLBACK,
>> - RestoreBootOrderOnReadyToBoot,
>> - NULL,
>> - &gEfiEventReadyToBootGuid,
>> - &Event
>> - );
>> - if (EFI_ERROR (Status)) {
>> - DEBUG ((DEBUG_ERROR, "Create ready to boot event %r!\n", Status));
>> - }
>> -
>> - return;
>> -}
>> -
>> -STATIC
>> -VOID
>> -SetBootOrder (
>> - IN UINT16 BootType
>> - )
>> -{
>> - UINT16 *NewOrder;
>> - UINT16 *RemainBoots;
>> - UINT16 *BootOrder;
>> - UINTN BootOrderSize;
>> - CHAR16 OptionName[sizeof ("Boot####")];
>> - UINTN Index;
>> - LIST_ENTRY BootOptionList;
>> - BDS_COMMON_OPTION *Option;
>> - UINTN SelectCnt;
>> - UINTN RemainCnt;
>> -
>> - InitializeListHead (&BootOptionList);
>> -
>> - GetEfiGlobalVariable2 (L"BootOrder", (VOID **) &BootOrder, &BootOrderSize);
>> - if (BootOrder == NULL) {
>> - return ;
>> - }
>> -
>> - NewOrder = AllocatePool (BootOrderSize);
>> - RemainBoots = AllocatePool (BootOrderSize);
>> - if ((NewOrder == NULL) || (RemainBoots == NULL)) {
>> - DEBUG ((DEBUG_ERROR, "Out of resources."));
>> - goto Exit;
>> - }
>> -
>> - SelectCnt = 0;
>> - RemainCnt = 0;
>> -
>> - for (Index = 0; Index < BootOrderSize / sizeof (UINT16); Index++) {
>> - UnicodeSPrint (OptionName, sizeof (OptionName), L"Boot%04x", BootOrder[Index]);
>> - Option = BdsLibVariableToOption (&BootOptionList, OptionName);
>> - if (Option == NULL) {
>> - DEBUG ((DEBUG_ERROR, "Boot%04x is invalid option!\n", BootOrder[Index]));
>> - continue;
>> - }
>> -
>> - if (GetBBSTypeByDevicePath (Option->DevicePath) == BootType) {
>> - NewOrder[SelectCnt++] = BootOrder[Index];
>> - } else {
>> - RemainBoots[RemainCnt++] = BootOrder[Index];
>> - }
>> - }
>> -
>> - if (SelectCnt != 0) {
>> - // append RemainBoots to NewOrder
>> - for (Index = 0; Index < RemainCnt; Index++) {
>> - NewOrder[SelectCnt + Index] = RemainBoots[Index];
>> - }
>> -
>> - if (CompareMem (NewOrder, BootOrder, BootOrderSize) != 0) {
>> - UpdateBootOrder (NewOrder, BootOrder, BootOrderSize);
>> - }
>> - }
>> -
>> -Exit:
>> - FreePool (BootOrder);
>> - if (NewOrder != NULL) {
>> - FreePool (NewOrder);
>> - }
>> - if (RemainBoots != NULL) {
>> - FreePool (RemainBoots);
>> - }
>> -
>> - return ;
>> -}
>> -
>> -STATIC
>> -VOID
>> -HandleBmcBootType (
>> - VOID
>> - )
>> -{
>> - EFI_STATUS Status;
>> - IPMI_GET_BOOT_OPTION BmcBootOpt;
>> - UINT16 BootType;
>> -
>> - Status = GetBmcBootOptionsSetting (&BmcBootOpt);
>> - if (EFI_ERROR (Status)) {
>> - return;
>> - }
>> -
>> - Print (L"Boot Type from BMC is %x\n", BmcBootOpt.BootDeviceSelector);
>> -
>> - switch (BmcBootOpt.BootDeviceSelector) {
>> - case ForcePxe:
>> - BootType = BBS_TYPE_EMBEDDED_NETWORK;
>> - break;
>> -
>> - case ForcePrimaryRemovableMedia:
>> - BootType = BBS_TYPE_USB;
>> - break;
>> -
>> - case ForceDefaultHardDisk:
>> - BootType = BBS_TYPE_HARDDRIVE;
>> - break;
>> -
>> - case ForceDefaultCD:
>> - BootType = BBS_TYPE_CDROM;
>> - break;
>> -
>> - default:
>> - return;
>> - }
>> -
>> - SetBootOrder (BootType);
>> -}
>> -
>> //
>> // BDS Platform Functions
>> //
>> diff --git a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> index 0feec06..793c7dc 100644
>> --- a/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> +++ b/Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> @@ -47,10 +47,10 @@
>> [LibraryClasses]
>> BaseLib
>> BaseMemoryLib
>> + BmcConfigBootLib
>> DebugLib
>> DevicePathLib
>> GenericBdsLib
>> - IpmiCmdLib
>> MemoryAllocationLib
>> PcdLib
>> PrintLib
>> @@ -70,14 +70,12 @@
>>
>> [Guids]
>> gEfiEndOfDxeEventGroupGuid
>> - gEfiEventReadyToBootGuid
>> gEfiFileInfoGuid
>> gEfiFileSystemInfoGuid
>> gEfiFileSystemVolumeLabelInfoIdGuid
>>
>> [Protocols]
>> gEfiDevicePathProtocolGuid
>> - gEfiDevicePathToTextProtocolGuid
>> gEfiGraphicsOutputProtocolGuid
>> gEfiLoadedImageProtocolGuid
>> gEfiPciRootBridgeIoProtocolGuid
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-20 10:50 ` Ard Biesheuvel
@ 2018-01-23 8:53 ` Huangming (Mark)
2018-01-23 9:33 ` Ard Biesheuvel
2018-01-24 11:10 ` Huangming (Mark)
1 sibling, 1 reply; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 8:53 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/20 18:50, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>> Platform/Hisilicon/D03/D03.dsc | 17 +++-
>> Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
>> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>> Platform/Hisilicon/D05/D05.dsc | 19 +++-
>> Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
>> Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
>> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
>> 13 files changed, 641 insertions(+), 3 deletions(-)
>>
>
> Excellent!! Very happy to see this added.
>
>> diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> new file mode 100644
>> index 0000000..fc834d9
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> @@ -0,0 +1,45 @@
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Head]
>> +NumOfUpdate = 3
>> +NumOfRecovery = 0
>> +Update0 = SysFvMain
>> +Update1 = SysCustom
>> +Update2 = SysNvRam
>> +
>> +[SysFvMain]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x00000000 # Base address offset on flash
>> +Length = 0x002D0000 # Length
>> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysCustom]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002F0000 # Base address offset on flash
>> +Length = 0x00010000 # Length
>> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysNvRam]
>> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002D0000 # Base address offset on flash
>> +Length = 0x00020000 # Length
>> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index b2eae7d..69bc7b4 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -66,7 +66,6 @@
>> OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
>>
>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> !if $(GENERIC_BDS) == TRUE
>> @@ -117,6 +116,11 @@
>> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>>
>> +[PcdsDynamicExDefault.common.DEFAULT]
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
>> +
>> [PcdsFixedAtBuild.common]
>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>>
>> @@ -310,6 +314,8 @@
>> Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>>
>> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>> <LibraryClasses>
>> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>> @@ -410,6 +416,9 @@
>>
>> Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> +
>> #
>> # FAT filesystem + GPT/MBR partitioning
>> #
>> @@ -483,6 +492,12 @@
>> !else
>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> !endif
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
>> + <LibraryClasses>
>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>> + }
>> +
>> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>>
>> #
>> # UEFI application (Shell Embedded Boot Loader)
>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>> index 0d704b5..ffddd2d 100644
>> --- a/Platform/Hisilicon/D03/D03.fdf
>> +++ b/Platform/Hisilicon/D03/D03.fdf
>> @@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE
>> INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
>> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> #
>> # Build Shell from latest source code instead of prebuilt binary
>> #
>> @@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE
>>
>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>
>> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
>> SECTION FV_IMAGE = FVMAIN
>> }
>> }
>>
>> +[FV.CapsuleDispatchFv]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>> +
>> +[FV.SystemFirmwareUpdateCargo]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
>> + FD = D03
>> + }
>> +
>> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
>> + FV = CapsuleDispatchFv
>> + }
>> +
>> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
>> + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> + }
>> +
>> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
>> +IMAGE_HEADER_INIT_VERSION = 0x02
>> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
>
> Use a fresh GUID here, and make sure you use a different one for D03/D05 etc.
>
> This is what identifies the platform when using fwupdmgr etc.
>
>
>> +IMAGE_INDEX = 0x1
>> +HARDWARE_INSTANCE = 0x0
>> +MONOTONIC_COUNT = 0x1
>> +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
>> +
>> + FV = SystemFirmwareUpdateCargo
>> +
>> +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
>> +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
>> +CAPSULE_HEADER_SIZE = 0x20
>> +CAPSULE_HEADER_INIT_VERSION = 0x1
>> +
>> + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>>
>> !include Silicon/Hisilicon/Hisilicon.fdf.inc
>>
>> diff --git a/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> new file mode 100644
>> index 0000000..fc834d9
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> @@ -0,0 +1,45 @@
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Head]
>> +NumOfUpdate = 3
>> +NumOfRecovery = 0
>> +Update0 = SysFvMain
>> +Update1 = SysCustom
>> +Update2 = SysNvRam
>> +
>> +[SysFvMain]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x00000000 # Base address offset on flash
>> +Length = 0x002D0000 # Length
>> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysCustom]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002F0000 # Base address offset on flash
>> +Length = 0x00010000 # Length
>> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysNvRam]
>> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002D0000 # Base address offset on flash
>> +Length = 0x00020000 # Length
>> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index b89cea3..b99cda5 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -81,7 +81,6 @@
>> OemAddressMapLib|Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.inf
>>
>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> !if $(GENERIC_BDS) == TRUE
>> @@ -130,6 +129,11 @@
>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>> gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
>>
>> +[PcdsDynamicExDefault.common.DEFAULT]
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
>> +
>> [PcdsFixedAtBuild.common]
>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>>
>> @@ -448,6 +452,8 @@
>> Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
>> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>>
>> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>> <LibraryClasses>
>> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>> @@ -564,6 +570,9 @@
>>
>> Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>>
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> +
>> #
>> # FAT filesystem + GPT/MBR partitioning
>> #
>> @@ -635,6 +644,14 @@
>> !else
>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> !endif
>> +
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
>> + <LibraryClasses>
>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>> + }
>> +
>> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>> +
>> #
>> # UEFI application (Shell Embedded Boot Loader)
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index d209210..9a61c52 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -297,6 +297,8 @@ READ_LOCK_STATUS = TRUE
>> INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
>> INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>>
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> #
>> # Build Shell from latest source code instead of prebuilt binary
>> #
>> @@ -361,12 +363,80 @@ READ_LOCK_STATUS = TRUE
>>
>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>
>> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
>> SECTION FV_IMAGE = FVMAIN
>> }
>> }
>>
>> +[FV.CapsuleDispatchFv]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>> +
>> +[FV.SystemFirmwareUpdateCargo]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
>> + FD = D05
>> + }
>> +
>> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
>> + FV = CapsuleDispatchFv
>> + }
>> +
>> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
>> + Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> + }
>> +
>> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
>> +IMAGE_HEADER_INIT_VERSION = 0x02
>> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
>> +IMAGE_INDEX = 0x1
>> +HARDWARE_INSTANCE = 0x0
>> +MONOTONIC_COUNT = 0x1
>> +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
>> +
>> + FV = SystemFirmwareUpdateCargo
>> +
>> +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
>> +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
>> +CAPSULE_HEADER_SIZE = 0x20
>> +CAPSULE_HEADER_INIT_VERSION = 0x1
>> +
>> + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>>
>> !include Silicon/Hisilicon/Hisilicon.fdf.inc
>>
>> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
>> new file mode 100644
>> index 0000000..465535e
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
>> @@ -0,0 +1,81 @@
>> +/** @file
>> + System Firmware descriptor.
>> +
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials
>> + are licensed and made available under the terms and conditions of the BSD License
>> + which accompanies this distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <PiPei.h>
>> +#include <Guid/EdkiiSystemFmpCapsule.h>
>> +#include <Protocol/FirmwareManagement.h>
>> +
>> +#define PACKAGE_VERSION 0xFFFFFFFF
>> +#define PACKAGE_VERSION_STRING L"Unknown"
>> +
>> +#define CURRENT_FIRMWARE_VERSION 0x00000002
>> +#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002"
>> +#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001
>> +
>> +#define IMAGE_ID SIGNATURE_64('H','W','A', 'R', 'M', '_', 'F', 'd')
>> +#define IMAGE_ID_STRING L"ARMPlatformFd"
>> +
>> +// PcdSystemFmpCapsuleImageTypeIdGuid
>> +#define IMAGE_TYPE_ID_GUID { 0xd34b3d29, 0x0085, 0x4ab3, { 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89 } }
>> +
>> +typedef struct {
>> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor;
>> + // real string data
>> + CHAR16 ImageIdNameStr[sizeof(IMAGE_ID_STRING) / sizeof(CHAR16)];
>> + CHAR16 VersionNameStr[sizeof(CURRENT_FIRMWARE_VERSION_STRING) / sizeof(CHAR16)];
>> + CHAR16 PackageVersionNameStr[sizeof(PACKAGE_VERSION_STRING) / sizeof(CHAR16)];
>> +} IMAGE_DESCRIPTOR;
>> +
>> +IMAGE_DESCRIPTOR mImageDescriptor =
>> +{
>> + {
>> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE,
>> + sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR),
>> + sizeof (IMAGE_DESCRIPTOR),
>> + PACKAGE_VERSION, // PackageVersion
>> + OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersionName
>> + 1, // ImageIndex;
>> + {0x0}, // Reserved
>> + IMAGE_TYPE_ID_GUID, // ImageTypeId;
>> + IMAGE_ID, // ImageId;
>> + OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName;
>> + CURRENT_FIRMWARE_VERSION, // Version;
>> + OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName;
>> + {0x0}, // Reserved2
>> + FixedPcdGet32 (PcdFdSize), // Size;
>> + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
>> + IMAGE_ATTRIBUTE_RESET_REQUIRED |
>> + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
>> + IMAGE_ATTRIBUTE_IN_USE, // AttributesSupported;
>> + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
>> + IMAGE_ATTRIBUTE_RESET_REQUIRED |
>> + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
>> + IMAGE_ATTRIBUTE_IN_USE, // AttributesSetting;
>> + 0x0, // Compatibilities;
>> + LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSupportedImageVersion;
>> + 0x00000000, // LastAttemptVersion;
>> + 0, // LastAttemptStatus;
>> + {0x0}, // Reserved3
>> + 0, // HardwareInstance;
>> + },
>> + // real string data
>> + {IMAGE_ID_STRING},
>> + {CURRENT_FIRMWARE_VERSION_STRING},
>> + {PACKAGE_VERSION_STRING},
>> +};
>> +
>> +VOID* CONST ReferenceAcpiTable = &mImageDescriptor;
>> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> new file mode 100644
>> index 0000000..c38a809
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> @@ -0,0 +1,50 @@
>> +## @file
>> +# System Firmware descriptor.
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>> + BASE_NAME = SystemFirmwareDescriptor
>> + FILE_GUID = 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC
>> + MODULE_TYPE = PEIM
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = SystemFirmwareDescriptorPeimEntry
>> +
>> +[Sources]
>> + SystemFirmwareDescriptorPei.c
>> + SystemFirmwareDescriptor.aslc
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>> + ArmPlatformPkg/ArmPlatformPkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + SignedCapsulePkg/SignedCapsulePkg.dec
>> +
>> +[LibraryClasses]
>> + DebugLib
>> + PcdLib
>> + PeimEntryPoint
>> + PeiServicesLib
>> +
>> +[FixedPcd]
>> + gArmTokenSpaceGuid.PcdFdSize
>> +
>> +[Pcd]
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor
>> +
>> +[Depex]
>> + TRUE
>> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
>> new file mode 100644
>> index 0000000..27c0a71
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
>> @@ -0,0 +1,70 @@
>> +/** @file
>> + System Firmware descriptor producer.
>> +
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials
>> + are licensed and made available under the terms and conditions of the BSD License
>> + which accompanies this distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <PiPei.h>
>> +#include <Guid/EdkiiSystemFmpCapsule.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/PeiServicesLib.h>
>> +#include <Protocol/FirmwareManagement.h>
>> +
>> +/**
>> + Entrypoint for SystemFirmwareDescriptor PEIM.
>> +
>> + @param[in] FileHandle Handle of the file being invoked.
>> + @param[in] PeiServices Describes the list of possible PEI Services.
>> +
>> + @retval EFI_SUCCESS PPI successfully installed.
>> +**/
>> +EFI_STATUS
>> +EFIAPI
>> +SystemFirmwareDescriptorPeimEntry (
>> + IN EFI_PEI_FILE_HANDLE FileHandle,
>> + IN CONST EFI_PEI_SERVICES **PeiServices
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor;
>> + UINTN Size;
>> + UINTN Index;
>> + UINT32 AuthenticationStatus;
>> +
>> + //
>> + // Search RAW section.
>> + //
>> +
>> + Index = 0;
>> + while (TRUE) {
>> + Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Index, FileHandle, (VOID **)&Descriptor, &AuthenticationStatus);
>> + if (EFI_ERROR (Status)) {
>> + // Should not happen, must something wrong in FDF.
>> + DEBUG ((DEBUG_ERROR, "Not found SystemFirmwareDescriptor in fdf !\n"));
>> + return EFI_NOT_FOUND;
>> + }
>> + if (Descriptor->Signature == EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE) {
>> + break;
>> + }
>> + Index++;
>> + }
>> +
>> + DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\n", Descriptor->Length));
>> +
>> + Size = Descriptor->Length;
>> + PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor);
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
>> index 308064b..dfa11d1 100644
>> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
>> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
>> @@ -104,6 +104,15 @@
>> ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
>> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>>
>> + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
>> + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
>> + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>> + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>> + EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
>> + IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
>> + PlatformFlashAccessLib|Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>> +
>> #
>> # It is not possible to prevent the ARM compiler for generic intrinsic functions.
>> # This library provides the instrinsic functions generate by a given compiler.
>> @@ -198,7 +207,7 @@
>> HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
>> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
>> ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
>> SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortRuntimeLib/Dw8250SerialPortRuntimeLib.inf
>> DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
>>
>> diff --git a/Silicon/Hisilicon/Hisilicon.fdf.inc b/Silicon/Hisilicon/Hisilicon.fdf.inc
>> index ee87cd1..986dd75 100644
>> --- a/Silicon/Hisilicon/Hisilicon.fdf.inc
>> +++ b/Silicon/Hisilicon/Hisilicon.fdf.inc
>> @@ -76,6 +76,15 @@
>> }
>> }
>>
>> +[Rule.Common.PEIM.FMP_IMAGE_DESC]
>> + FILE PEIM = $(NAMED_GUID) {
>> + RAW BIN |.acpi
>> + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
>> + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
>> + UI STRING="$(MODULE_NAME)" Optional
>> + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
>> + }
>> +
>> [Rule.Common.DXE_CORE]
>> FILE DXE_CORE = $(NAMED_GUID) {
>> PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
>> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
>> new file mode 100644
>> index 0000000..db5725d
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
>> @@ -0,0 +1,106 @@
>> +/** @file
>> + Platform Flash Access library.
>> +
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials
>> + are licensed and made available under the terms and conditions of the BSD License
>> + which accompanies this distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <PiDxe.h>
>> +#include <Library/BaseLib.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/PlatformFlashAccessLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Protocol/HisiSpiFlashProtocol.h>
>> +
>> +STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress;
>> +STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress;
>> +
>> +HISI_SPI_FLASH_PROTOCOL *mSpiProtocol;
>
> STATIC
>
I agree with all of your comments except this one.
PerformFlashWrite is called in SystemFirmwareUpdateDxe module,
so STATIC can not be added.
>> +
>> +/**
>> + Perform flash write opreation.
>> +
>> + @param[in] FirmwareType The type of firmware.
>> + @param[in] FlashAddress The address of flash device to be accessed.
>> + @param[in] FlashAddressType The type of flash device address.
>> + @param[in] Buffer The pointer to the data buffer.
>> + @param[in] Length The length of data buffer in bytes.
>> +
>> + @retval EFI_SUCCESS The operation returns successfully.
>> + @retval EFI_WRITE_PROTECTED The flash device is read only.
>> + @retval EFI_UNSUPPORTED The flash device access is unsupported.
>> + @retval EFI_INVALID_PARAMETER The input parameter is not valid.
>> +**/
>> +EFI_STATUS
>> +EFIAPI
>> +PerformFlashWrite (
>> + IN PLATFORM_FIRMWARE_TYPE FirmwareType,
>> + IN EFI_PHYSICAL_ADDRESS FlashAddress,
>> + IN FLASH_ADDRESS_TYPE FlashAddressType,
>> + IN VOID *Buffer,
>> + IN UINTN Length
>> + )
>> +{
>> + UINT32 RomAddress;
>> + EFI_STATUS Status;
>> +
>> + DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
>> +
>
> Line length
>
>> + if (FlashAddressType == FlashAddressTypeAbsoluteAddress) {
>> + FlashAddress = FlashAddress - mInternalFdAddress;
>> + }
>> +
>> + RomAddress = (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0BaseAddress);
>> +
>> + DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n"));
>> +
>> + Status = mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, (UINT8 *)Buffer, (UINT32) Length);
>
> Line length
>
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Erase and Write Status = %r \n", Status));
>> + }
>> +
>> + return Status;
>> +}
>> +
>> +/**
>> + Platform Flash Access Lib Constructor.
>> +
>> + @param[in] ImageHandle The firmware allocated handle for the EFI image.
>> + @param[in] SystemTable A pointer to the EFI System Table.
>> +
>> + @retval EFI_SUCCESS Constructor returns successfully.
>> +**/
>> +EFI_STATUS
>> +EFIAPI
>> +PerformFlashAccessLibConstructor (
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBaseAddress);
>> +
>> + mSFCMEM0BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCMEM0BaseAddress);
>> +
>
> Drop the (UINTN) cast, EFI_PHYSICAL_ADDRESS is always 64 bits.
>
>> + DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddress - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress));
>> +
>> + Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID **)&mSpiProtocol);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = %r \n", Status));
>> + }
>> +
>
> Line length
>
>> + return Status;
>> +}
>> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>> new file mode 100644
>> index 0000000..f4533ac
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>> @@ -0,0 +1,51 @@
>> +## @file
>> +# Platform Flash Access library.
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0000001A
>
>> + BASE_NAME = PlatformFlashAccessLibDxe
>> + FILE_GUID = 9168384A-5F66-4CF7-AEB6-845BDEBD3012
>
> Use a fresh GUID
>
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER
>> + CONSTRUCTOR = PerformFlashAccessLibConstructor
>> +
>> +[Sources]
>> + PlatformFlashAccessLibDxe.c
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + SignedCapsulePkg/SignedCapsulePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[LibraryClasses]
>> + BaseMemoryLib
>> + DebugLib
>> + PcdLib
>> + UefiBootServicesTableLib
>> +
>> +[Protocols]
>> + gHisiSpiFlashProtocolGuid
>> +
>> +[FixedPcd]
>> + gArmTokenSpaceGuid.PcdFdBaseAddress
>> + gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress
>> +
>> +[Depex]
>> + gHisiSpiFlashProtocolGuid
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-23 8:53 ` Huangming (Mark)
@ 2018-01-23 9:33 ` Ard Biesheuvel
0 siblings, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-23 9:33 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Ming Huang, edk2-devel@lists.01.org, Leif Lindholm, Mengfanrong,
Jason Zhang, linaro-uefi, guoheyi, waip23, wanghuiqiang
On 23 January 2018 at 08:53, Huangming (Mark) <huangming23@huawei.com> wrote:
>
>
> On 2018/1/20 18:50, Ard Biesheuvel wrote:
>> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>>> ---
>>> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>>> Platform/Hisilicon/D03/D03.dsc | 17 +++-
>>> Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
>>> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>>> Platform/Hisilicon/D05/D05.dsc | 19 +++-
>>> Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
>>> Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
>>> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
>>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
>>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
>>> 13 files changed, 641 insertions(+), 3 deletions(-)
>>>
>>
>> Excellent!! Very happy to see this added.
>>
...
>>> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
>>> new file mode 100644
>>> index 0000000..db5725d
>>> --- /dev/null
>>> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
>>> @@ -0,0 +1,106 @@
>>> +/** @file
>>> + Platform Flash Access library.
>>> +
>>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>>> +
>>> + This program and the accompanying materials
>>> + are licensed and made available under the terms and conditions of the BSD License
>>> + which accompanies this distribution. The full text of the license may be found at
>>> + http://opensource.org/licenses/bsd-license.php
>>> +
>>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>> +
>>> +**/
>>> +
>>> +#include <PiDxe.h>
>>> +#include <Library/BaseLib.h>
>>> +#include <Library/BaseMemoryLib.h>
>>> +#include <Library/DebugLib.h>
>>> +#include <Library/PcdLib.h>
>>> +#include <Library/PlatformFlashAccessLib.h>
>>> +#include <Library/UefiBootServicesTableLib.h>
>>> +#include <Protocol/HisiSpiFlashProtocol.h>
>>> +
>>> +STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress;
>>> +STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress;
>>> +
>>> +HISI_SPI_FLASH_PROTOCOL *mSpiProtocol;
>>
>> STATIC
>>
>
> I agree with all of your comments except this one.
> PerformFlashWrite is called in SystemFirmwareUpdateDxe module,
> so STATIC can not be added.
>
I meant mSpiProtocol not PerformFlashWrite
>>> +
>>> +/**
>>> + Perform flash write opreation.
>>> +
>>> + @param[in] FirmwareType The type of firmware.
>>> + @param[in] FlashAddress The address of flash device to be accessed.
>>> + @param[in] FlashAddressType The type of flash device address.
>>> + @param[in] Buffer The pointer to the data buffer.
>>> + @param[in] Length The length of data buffer in bytes.
>>> +
>>> + @retval EFI_SUCCESS The operation returns successfully.
>>> + @retval EFI_WRITE_PROTECTED The flash device is read only.
>>> + @retval EFI_UNSUPPORTED The flash device access is unsupported.
>>> + @retval EFI_INVALID_PARAMETER The input parameter is not valid.
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +PerformFlashWrite (
>>> + IN PLATFORM_FIRMWARE_TYPE FirmwareType,
>>> + IN EFI_PHYSICAL_ADDRESS FlashAddress,
>>> + IN FLASH_ADDRESS_TYPE FlashAddressType,
>>> + IN VOID *Buffer,
>>> + IN UINTN Length
>>> + )
>>> +{
>>> + UINT32 RomAddress;
>>> + EFI_STATUS Status;
>>> +
>>> + DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
>>> +
>>
>> Line length
>>
>>> + if (FlashAddressType == FlashAddressTypeAbsoluteAddress) {
>>> + FlashAddress = FlashAddress - mInternalFdAddress;
>>> + }
>>> +
>>> + RomAddress = (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0BaseAddress);
>>> +
>>> + DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n"));
>>> +
>>> + Status = mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, (UINT8 *)Buffer, (UINT32) Length);
>>
>> Line length
>>
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_ERROR, "Erase and Write Status = %r \n", Status));
>>> + }
>>> +
>>> + return Status;
>>> +}
>>> +
>>> +/**
>>> + Platform Flash Access Lib Constructor.
>>> +
>>> + @param[in] ImageHandle The firmware allocated handle for the EFI image.
>>> + @param[in] SystemTable A pointer to the EFI System Table.
>>> +
>>> + @retval EFI_SUCCESS Constructor returns successfully.
>>> +**/
>>> +EFI_STATUS
>>> +EFIAPI
>>> +PerformFlashAccessLibConstructor (
>>> + IN EFI_HANDLE ImageHandle,
>>> + IN EFI_SYSTEM_TABLE *SystemTable
>>> + )
>>> +{
>>> + EFI_STATUS Status;
>>> +
>>> + mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBaseAddress);
>>> +
>>> + mSFCMEM0BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCMEM0BaseAddress);
>>> +
>>
>> Drop the (UINTN) cast, EFI_PHYSICAL_ADDRESS is always 64 bits.
>>
>>> + DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddress - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress));
>>> +
>>> + Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID **)&mSpiProtocol);
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = %r \n", Status));
>>> + }
>>> +
>>
>> Line length
>>
>>> + return Status;
>>> +}
>>> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>>> new file mode 100644
>>> index 0000000..f4533ac
>>> --- /dev/null
>>> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>>> @@ -0,0 +1,51 @@
>>> +## @file
>>> +# Platform Flash Access library.
>>> +#
>>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>>> +#
>>> +# This program and the accompanying materials
>>> +# are licensed and made available under the terms and conditions of the BSD License
>>> +# which accompanies this distribution. The full text of the license may be found at
>>> +# http://opensource.org/licenses/bsd-license.php
>>> +#
>>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>> +#
>>> +##
>>> +
>>> +[Defines]
>>> + INF_VERSION = 0x00010005
>>
>> 0x0000001A
>>
>>> + BASE_NAME = PlatformFlashAccessLibDxe
>>> + FILE_GUID = 9168384A-5F66-4CF7-AEB6-845BDEBD3012
>>
>> Use a fresh GUID
>>
>>> + MODULE_TYPE = DXE_DRIVER
>>> + VERSION_STRING = 1.0
>>> + LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER
>>> + CONSTRUCTOR = PerformFlashAccessLibConstructor
>>> +
>>> +[Sources]
>>> + PlatformFlashAccessLibDxe.c
>>> +
>>> +[Packages]
>>> + ArmPkg/ArmPkg.dec
>>> + MdeModulePkg/MdeModulePkg.dec
>>> + MdePkg/MdePkg.dec
>>> + SignedCapsulePkg/SignedCapsulePkg.dec
>>> + Silicon/Hisilicon/HisiPkg.dec
>>> +
>>> +[LibraryClasses]
>>> + BaseMemoryLib
>>> + DebugLib
>>> + PcdLib
>>> + UefiBootServicesTableLib
>>> +
>>> +[Protocols]
>>> + gHisiSpiFlashProtocolGuid
>>> +
>>> +[FixedPcd]
>>> + gArmTokenSpaceGuid.PcdFdBaseAddress
>>> + gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress
>>> +
>>> +[Depex]
>>> + gHisiSpiFlashProtocolGuid
>>> --
>>> 1.9.1
>>>
>>
>> .
>>
>
> --
> Best Regards,
>
> Ming
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02
2018-01-18 15:01 ` [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 Ming Huang
2018-01-20 11:11 ` Ard Biesheuvel
@ 2018-01-23 10:18 ` Leif Lindholm
2018-01-24 1:17 ` Huangming (Mark)
1 sibling, 1 reply; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 10:18 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Thu, Jan 18, 2018 at 11:01:43PM +0800, Ming Huang wrote:
> Replace the old string with short one. The old one is
> too long that can not be show integrallty in Setup nemu.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
NAK
Anything that is not an official Linaro reference platform release is
a development build. The fallback string needs to indicate this.
The current one does this.
The modified version does not.
/
Leif
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +-
> Platform/Hisilicon/D05/D05.dsc | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index 6f1164e..b6b8086 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -171,7 +171,7 @@
> !ifdef $(FIRMWARE_VER)
> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
> !else
> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release"
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D03"
> !endif
>
> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 52ffad5..a599c08 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -190,7 +190,7 @@
> !ifdef $(FIRMWARE_VER)
> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
> !else
> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release"
> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D05"
> !endif
>
> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-18 15:01 ` [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib Ming Huang
2018-01-20 11:11 ` Ard Biesheuvel
@ 2018-01-23 10:23 ` Leif Lindholm
2018-01-27 1:47 ` Huangming (Mark)
1 sibling, 1 reply; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 10:23 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
> OsBootLib can create OS option after upgrade firmware.
I will respond more strongly that Ard did:
I have seen functionality like this implemented in publicly available
systems - laptops, desktops.
Without exception, they end up in bug reports saying "my system
refuses to boot after installation/upgrade".
Without exception, they add to existing negative perceptions of UEFI
in general in certain market spaces.
Presumably this is trying to address a real problem you have faced.
Please bring this issue to the table for discussion, so that we can
agree on an appropriate way of resolving it.
Regardless, this code will not be included in 18.02.
/
Leif
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option
2018-01-18 15:01 ` [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option Ming Huang
2018-01-20 10:41 ` Ard Biesheuvel
@ 2018-01-23 10:28 ` Leif Lindholm
2018-01-23 10:51 ` Huangming (Mark)
1 sibling, 1 reply; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 10:28 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
I don't agree with this subject line - there is no optimization going
on here.
"Break BMC SetBoot option out into separate library" would be a more
accurate subject line.
For the record, I think this is good cleanup even without the dual-BDS
support.
On Thu, Jan 18, 2018 at 11:01:32PM +0800, Ming Huang wrote:
> diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> new file mode 100644
> index 0000000..7e407b4
> --- /dev/null
> +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> @@ -0,0 +1,51 @@
> +#/** @file
> +#
> +# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> +# Copyright (c) 2015, Linaro Limited. All rights reserved.
> +#
> +# This program and the accompanying materials
> +# are licensed and made available under the terms and conditions of the BSD License
> +# which accompanies this distribution. The full text of the license may be found at
> +# http://opensource.org/licenses/bsd-license.php
> +#
> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +#
> +#**/
> +
> +[Defines]
> + INF_VERSION = 0x00010005
0x0001001a
> + BASE_NAME = BmcConfigBootLib
> + FILE_GUID = f174d192-7208-46c1-b9d1-65b2db06ad3b
> + MODULE_TYPE = BASE
> + VERSION_STRING = 1.0
> + LIBRARY_CLASS = BmcConfigBootLib
> +
> +[Sources.common]
> + BmcConfigBootLib.c
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + MdeModulePkg/MdeModulePkg.dec
MdeM before MdeP
/
Leif
> + Silicon/Hisilicon/HisiPkg.dec
> +
> +[LibraryClasses]
> + BaseLib
> + BaseMemoryLib
> + DebugLib
> + DevicePathLib
> + IpmiCmdLib
> + PcdLib
> + PrintLib
> + UefiBootManagerLib
> +
> +[BuildOptions]
> +
> +[Pcd]
> +
> +[Guids]
> + gEfiEventReadyToBootGuid
> +
> +[Protocols]
> + gEfiDevicePathToTextProtocolGuid ## CONSUMES
> + gEfiSimpleFileSystemProtocolGuid ## CONSUMES
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option
2018-01-23 10:28 ` Leif Lindholm
@ 2018-01-23 10:51 ` Huangming (Mark)
0 siblings, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 10:51 UTC (permalink / raw)
To: Leif Lindholm, Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, zhangjinsong2, mengfanrong, waip23
OK, I will modify the subject line and drop the change about PlatformIntelBdsLib.
Also other comments will be handled.
On 2018/1/23 18:28, Leif Lindholm wrote:
> I don't agree with this subject line - there is no optimization going
> on here.
>
> "Break BMC SetBoot option out into separate library" would be a more
> accurate subject line.
>
> For the record, I think this is good cleanup even without the dual-BDS
> support.
>
> On Thu, Jan 18, 2018 at 11:01:32PM +0800, Ming Huang wrote:
>> diff --git a/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
>> new file mode 100644
>> index 0000000..7e407b4
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
>> @@ -0,0 +1,51 @@
>> +#/** @file
>> +#
>> +# Copyright (c) 2015, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2015, Linaro Limited. All rights reserved.
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +#**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0001001a
>
>> + BASE_NAME = BmcConfigBootLib
>> + FILE_GUID = f174d192-7208-46c1-b9d1-65b2db06ad3b
>> + MODULE_TYPE = BASE
>> + VERSION_STRING = 1.0
>> + LIBRARY_CLASS = BmcConfigBootLib
>> +
>> +[Sources.common]
>> + BmcConfigBootLib.c
>> +
>> +[Packages]
>> + MdePkg/MdePkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>
> MdeM before MdeP
>
> /
> Leif
>
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[LibraryClasses]
>> + BaseLib
>> + BaseMemoryLib
>> + DebugLib
>> + DevicePathLib
>> + IpmiCmdLib
>> + PcdLib
>> + PrintLib
>> + UefiBootManagerLib
>> +
>> +[BuildOptions]
>> +
>> +[Pcd]
>> +
>> +[Guids]
>> + gEfiEventReadyToBootGuid
>> +
>> +[Protocols]
>> + gEfiDevicePathToTextProtocolGuid ## CONSUMES
>> + gEfiSimpleFileSystemProtocolGuid ## CONSUMES
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code
2018-01-20 11:00 ` Ard Biesheuvel
@ 2018-01-23 11:01 ` Huangming (Mark)
0 siblings, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 11:01 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/20 19:00, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> 1. Open driver source code.
>> 2. This code includes network sequence correction
>> solution.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D03/D03.dsc | 2 +
>> Platform/Hisilicon/D03/D03.fdf | 2 +-
>> Platform/Hisilicon/D05/D05.dsc | 2 +
>> Platform/Hisilicon/D05/D05.fdf | 3 +-
>> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 ++++++++++++++++++++
>> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 +++++++++
>> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++++++++++++
>> Silicon/Hisilicon/HisiPkg.dec | 1 +
>> Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +++++++
>> 9 files changed, 241 insertions(+), 3 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index 370e17b..b22afe3 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -404,6 +404,8 @@
>>
>> Platform/Hisilicon/D03/Drivers/Ipmi/ipmiInterfaceDxe/IpmiInterfaceDxe.inf
>>
>> + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
>> +
>> MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
>> MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
>> MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>> index 6e43228..e93985b 100644
>> --- a/Platform/Hisilicon/D03/D03.fdf
>> +++ b/Platform/Hisilicon/D03/D03.fdf
>> @@ -242,7 +242,7 @@ READ_LOCK_STATUS = TRUE
>> #Network
>> #
>>
>> - INF Platform/Hisilicon/D03/Drivers/Net/SnpPlatform/SnpPlatform.inf
>> + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
>> INF Platform/Hisilicon/D03/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
>>
>> INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 0d19909..4e19de2 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -541,6 +541,8 @@
>>
>> Platform/Hisilicon/D05/Drivers/Ipmi/IpmiInterfaceDxe/IpmiInterfaceDxe.inf
>>
>> + Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
>> +
>> MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
>> MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
>> MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 9edc679..9873677 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -247,8 +247,7 @@ READ_LOCK_STATUS = TRUE
>> #
>> #Network
>> #
>> -
>> - INF Platform/Hisilicon/D05/Drivers/Net/SnpPlatform/SnpPlatform.inf
>> + INF Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
>> INF Platform/Hisilicon/D05/Drivers/Net/SnpPV600Dxe/SnpPV600Dxe.inf
>>
>> INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
>> diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
>> new file mode 100644
>> index 0000000..385c04a
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
>> @@ -0,0 +1,99 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +
>> +#include "SnpPlatform.h"
>> +
>
> STATIC
>
>> + HISI_PLATFORM_SNP_PROTOCOL mSnpPlatformProtocol[] = {
>> + {
>> + 4,
>> + 1
>> + },
>> + {
>> + 5,
>> + 1
>> + },
>> + {
>> + 2,
>> + 0
>> + },
>> + {
>> + 3,
>> + 0
>> + },
>> + {
>> + 0,
>> + 1
>> + },
>> + {
>> + 1,
>> + 1
>> + },
>> + {
>> + 6,
>> + 0
>> + },
>> + {
>> + 7,
>> + 0
>> + }
>> +};
>> +
>> +#define SNP_CONTROLLER_NUMBER sizeof (mSnpPlatformProtocol) / sizeof (HISI_PLATFORM_SNP_PROTOCOL)
>> +
>
> ARRAY_SIZE()
>
>> +EFI_STATUS
>> +EFIAPI
>> +SnpPlatformInitialize (
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + UINTN Loop;
>> + SNP_PLATFORM_INSTANCE *PrivateData;
>> + EFI_STATUS Status;
>> +
>> + for (Loop = 0; Loop < SNP_CONTROLLER_NUMBER; Loop++) {
>> + if(mSnpPlatformProtocol[Loop].Enable != 1) {
>> + continue;
>> + }
>> + PrivateData = AllocateZeroPool (sizeof(SNP_PLATFORM_INSTANCE));
>> + if (PrivateData == NULL) {
>> + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize error 1\n"));
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> +
>> +
>> + PrivateData->SnpPlatformProtocol = mSnpPlatformProtocol[Loop];
>> +
>> + //
>> + // Install the snp protocol, device path protocol
>> + //
>> + Status = gBS->InstallMultipleProtocolInterfaces (
>> + &PrivateData->Handle,
>> + &gHisiSnpPlatformProtocolGuid,
>> + &PrivateData->SnpPlatformProtocol,
>> + NULL
>> + );
>> + if (EFI_ERROR (Status)) {
>> + FreePool (PrivateData);
>> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status));
>
> Line length
>
> And don't return an error from a loop like this: see the comment in
> reply to the previous patch
>
>> + return Status;
>> + }
>> + }
>> +
>> + DEBUG ((DEBUG_INFO,"SnpPlatformInitialize succes!\n"));
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
>> new file mode 100644
>> index 0000000..031c8d3
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
>> @@ -0,0 +1,43 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +
>> +
>> +#ifndef _SNP_PLATFORM_H_
>> +#define _SNP_PLATFORM_H_
>> +
>> +#include <Uefi.h>
>> +#include <PiDxe.h>
>> +#include <Protocol/SnpPlatformProtocol.h>
>> +#include <Guid/EventGroup.h>
>> +#include <Library/ArmLib.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/BaseLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/DxeServicesTableLib.h>
>> +#include <Library/IoLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/ReportStatusCodeLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiDriverEntryPoint.h>
>> +#include <Library/UefiLib.h>
>> +
>> +typedef struct {
>> + UINTN Signature;
>> + EFI_HANDLE Handle;
>> + HISI_PLATFORM_SNP_PROTOCOL SnpPlatformProtocol;
>> +} SNP_PLATFORM_INSTANCE;
>> +#endif
>
> You can move all of this into the .c file
>
>> diff --git a/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
>> new file mode 100644
>> index 0000000..804224b
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
>> @@ -0,0 +1,60 @@
>> +#/** @file
>> +#
>> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +#**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010019
>> + BASE_NAME = SnpPlatform
>> + FILE_GUID = 102D8FC9-20A4-42eb-AC14-1C98BA5B17A8
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = SnpPlatformInitialize
>> +
>> +[Sources]
>> + SnpPlatform.h
>> + SnpPlatform.c
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>
> ??
>
>> + MdePkg/MdePkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[FeaturePcd]
>> +
>> +
>> +[LibraryClasses]
>> + ArmLib
>> + BaseLib
>> + BaseMemoryLib
>> + CacheMaintenanceLib
>> + DebugLib
>> + DxeServicesTableLib
>> + IoLib
>> + MemoryAllocationLib
>> + PlatformSysCtrlLib
>> + PcdLib
>> + ReportStatusCodeLib
>> + UefiLib
>> + UefiBootServicesTableLib
>> + UefiDriverEntryPoint
>> +
>
> Same question as before: are you really using all of these?
There are some Libs which are not using.
I will delete it.
>> +[Guids]
>> +
>> +[Protocols]
>> + gHisiSnpPlatformProtocolGuid
>> +
>> +[Depex]
>> + TRUE
>> +
>> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
>> index 9fa94fd..2bb6518 100644
>> --- a/Silicon/Hisilicon/HisiPkg.dec
>> +++ b/Silicon/Hisilicon/HisiPkg.dec
>> @@ -38,6 +38,7 @@
>> gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}}
>> gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
>> gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
>> + gHisiSnpPlatformProtocolGuid = {0x81321f27, 0xff58, 0x4a1d, {0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f}}
>>
>> [Guids]
>> gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
>> diff --git a/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
>> new file mode 100644
>> index 0000000..0d9f0b4
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
>> @@ -0,0 +1,32 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#ifndef _SNP_PLATFORM_PROTOCOL_H_
>> +#define _SNP_PLATFORM_PROTOCOL_H_
>> +#define HISI_SNP_PLATFORM_PROTOCOL_GUID \
>> + { \
>> + 0x81321f27, 0xff58, 0x4a1d, 0x99, 0x97, 0xd, 0xcc, 0xfa, 0x82, 0xf4, 0x6f \
>> + }
>> +
>> +typedef struct _HISI_PLATFORM_SNP_PROTOCOL HISI_PLATFORM_SNP_PROTOCOL;
>> +
>> +struct _HISI_PLATFORM_SNP_PROTOCOL {
>> + UINT32 ControllerId;
>> + UINT32 Enable;
>> +};
>> +
>> +extern EFI_GUID gHisiSnpPlatformProtocolGuid;
>> +
>> +#endif
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code
2018-01-20 10:57 ` Ard Biesheuvel
@ 2018-01-23 11:01 ` Huangming (Mark)
0 siblings, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-23 11:01 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, Jason Zhang, wanghuiqiang, guoheyi, waip23,
Mengfanrong
I agree with all of your comments and will modify the sources soon.
On 2018/1/20 18:57, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D03/D03.dsc | 2 +-
>> Platform/Hisilicon/D03/D03.fdf | 3 +-
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Platform/Hisilicon/D05/D05.fdf | 2 +-
>> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 ++++++++++++++++++++
>> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 +++++++++++
>> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++++++++++++++
>> Silicon/Hisilicon/HisiPkg.dec | 2 +
>> Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++++++++++++
>> Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +++
>> 10 files changed, 270 insertions(+), 4 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index 69bc7b4..370e17b 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -474,7 +474,7 @@
>> Platform/Hisilicon/D03/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
>> Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
>> Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
>> -
>> + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
>> Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
>>
>>
>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>> index ffddd2d..6e43228 100644
>> --- a/Platform/Hisilicon/D03/D03.fdf
>> +++ b/Platform/Hisilicon/D03/D03.fdf
>> @@ -271,8 +271,7 @@ READ_LOCK_STATUS = TRUE
>> # VGA Driver
>> #
>> INF Platform/Hisilicon/D03/Drivers/Sm750Dxe/UefiSmi.inf
>> -
>> - INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
>> + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
>> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>
>> INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index b99cda5..0d19909 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -627,6 +627,7 @@
>> Platform/Hisilicon/D05/Drivers/ReportPciePlugDidVidToBmc/ReportPciePlugDidVidToBmc.inf
>> Silicon/Hisilicon/Drivers/Smbios/AddSmbiosType9/AddSmbiosType9.inf
>> Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
>> + Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
>> MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
>> Silicon/Hisilicon/Drivers/Smbios/MemorySubClassDxe/MemorySubClassDxe.inf
>>
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 9a61c52..9edc679 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -294,7 +294,7 @@ READ_LOCK_STATUS = TRUE
>> #
>> INF Platform/Hisilicon/D05/Drivers/Sm750Dxe/UefiSmi.inf
>> INF MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
>> - INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
>> + INF Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
>> INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>>
>> INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
>> new file mode 100644
>> index 0000000..d57905e
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
>> @@ -0,0 +1,89 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +
>> +#include "SasPlatform.h"
>> +#include <Library/OemDevicePath.h>
>> +#include <Library/DevicePathLib.h>
>> +
>> +#define SAS0BusAddr 0xc3000000
>> +#define SAS1BusAddr 0xa2000000
>> +#define SAS2BusAddr 0xa3000000
>> +
>> +#define SAS0ResetAddr 0xc0000000
>> +#define SAS1ResetAddr 0xa0000000
>> +#define SAS2ResetAddr 0xa0000000
>> +
>
> STATIC
>
>> +HISI_PLATFORM_SAS_PROTOCOL mSasPlatformProtocol[] = {
>> + {
>> + 0,
>> + FALSE,
>> + SAS0BusAddr,
>> + SAS0ResetAddr
>> + },
>> + {
>> + 1,
>> + TRUE,
>> + SAS1BusAddr,
>> + SAS1ResetAddr
>> + },
>> + {
>> + 2,
>> + FALSE,
>> + SAS2BusAddr,
>> + SAS2ResetAddr
>> + }
>> +};
>> +#define SAS_CONTROLLER_NUMBER sizeof (mSasPlatformProtocol) / sizeof (HISI_PLATFORM_SAS_PROTOCOL)
>> +
>
> Use ARRAY_SIZE
>
>> +EFI_STATUS
>> +EFIAPI
>> +SasPlatformInitialize (
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + UINTN Loop;
>> + SAS_PLATFORM_INSTANCE *PrivateData;
>> + EFI_STATUS Status;
>> +
>> + for (Loop = 0; Loop < SAS_CONTROLLER_NUMBER; Loop++) {
>> + if (mSasPlatformProtocol[Loop].Enable != TRUE) {
>> + continue;
>> + }
>> + PrivateData = AllocateZeroPool (sizeof(SAS_PLATFORM_INSTANCE));
>> + if (PrivateData == NULL) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> +
>> + PrivateData->SasPlatformProtocol = mSasPlatformProtocol[Loop];
>> +
>> + Status = gBS->InstallMultipleProtocolInterfaces (
>> + &PrivateData->Handle,
>> + &gHisiPlatformSasProtocolGuid,
>> + &PrivateData->SasPlatformProtocol,
>> + NULL
>
> indentation
>
>> + );
>> + if (EFI_ERROR (Status)) {
>> + FreePool (PrivateData);
>> + DEBUG ((DEBUG_ERROR, "[%a]:[%dL] InstallProtocolInterface fail. %r\n", __FUNCTION__, __LINE__, Status));
>> + return Status;
>
> Don't return error from a loop like this: the driver will unload but
> the protocols installed in prior iterations will still remain
>
>> + }
>> + }
>> +
>> + DEBUG ((DEBUG_INFO, "sas platform init dirver Ok!!!\n"));
>
> driver not dirver
>
>> + return EFI_SUCCESS;
>> +}
>> +
>> diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
>> new file mode 100644
>> index 0000000..a3e99dd
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
>> @@ -0,0 +1,49 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +
>> +
>> +#ifndef _SAS_PLATFORM_H_
>> +#define _SAS_PLATFORM_H_
>> +
>> +#include <Uefi.h>
>> +#include <PiDxe.h>
>> +#include <Guid/EventGroup.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/UefiDriverEntryPoint.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Library/BaseLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/IoLib.h>
>> +#include <Library/ArmLib.h>
>> +#include <Library/DxeServicesTableLib.h>
>> +
>> +#include <Library/ReportStatusCodeLib.h>
>> +#include <Protocol/PlatformSasProtocol.h>
>> +
>> +
>> +
>> +typedef struct {
>> + UINTN Signature;
>> + EFI_HANDLE Handle;
>> + HISI_PLATFORM_SAS_PROTOCOL SasPlatformProtocol;
>> +} SAS_PLATFORM_INSTANCE;
>> +
>> +
>> +#endif // _SAS_PLATFORM_H_
>> +
>
> Just move all of this in to the .c file
>
>> diff --git a/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
>> new file mode 100644
>> index 0000000..6237f50
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
>> @@ -0,0 +1,61 @@
>> +#/** @file
>> +#
>> +# Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +#**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010019
>> + BASE_NAME = SasPlatform
>> + FILE_GUID = 67B9CDE8-257D-44f9-9DE7-39DE866E3539
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = SasPlatformInitialize
>> +
>> +[Sources]
>> + SasPlatform.h
>> + SasPlatform.c
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>
> Does your code use ArmPkg?
>
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[FeaturePcd]
>> +
>
> Remove empty sections
>
>> +
>> +[LibraryClasses]
>> + ArmLib
>> + BaseLib
>> + BaseMemoryLib
>> + CacheMaintenanceLib
>> + DebugLib
>> + DxeServicesTableLib
>> + IoLib
>> + MemoryAllocationLib
>> + PcdLib
>> + PlatformSysCtrlLib
>> + ReportStatusCodeLib
>> + UefiBootServicesTableLib
>> + UefiDriverEntryPoint
>> + UefiLib
>> +
>
> Does your code really use all of these?
>
>> +[Guids]
>> + gEfiHisiSocControllerGuid
>> +
>> +[Protocols]
>> + gHisiPlatformSasProtocolGuid
>> + gEfiDevicePathProtocolGuid
>> +
>> +[Depex]
>> + TRUE
>> diff --git a/Silicon/Hisilicon/HisiPkg.dec b/Silicon/Hisilicon/HisiPkg.dec
>> index 81ba3be..9fa94fd 100644
>> --- a/Silicon/Hisilicon/HisiPkg.dec
>> +++ b/Silicon/Hisilicon/HisiPkg.dec
>> @@ -37,12 +37,14 @@
>> gBmcInfoProtocolGuid = {0x43fa6ffd, 0x35e4, 0x479e, {0xab, 0xec, 0x5, 0x3, 0xf6, 0x48, 0x0, 0xf5}}
>> gSataEnableFlagProtocolGuid = {0xc2b3c770, 0x8b4a, 0x4796, {0xb2, 0xcf, 0x1d, 0xee, 0x44, 0xd0, 0x32, 0xf3}}
>> gPlatformSasProtocolGuid = {0x40e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x5d}}
>> + gHisiPlatformSasProtocolGuid = {0x20e9829f, 0x3a2c, 0x479a, {0x9a, 0x93, 0x45, 0x7d, 0x13, 0x50, 0x96, 0x6d}}
>>
>> [Guids]
>> gHisiTokenSpaceGuid = {0xc8bc553e, 0x12bf, 0x11e6, {0x97, 0x4f, 0x87, 0xf7, 0x7c, 0xfd, 0x52, 0x1d}}
>>
>> gHisiEfiMemoryMapGuid = {0xf8870015, 0x6994, 0x4b98, {0x95, 0xa2, 0xbd, 0x56, 0xda, 0x91, 0xc0, 0x7f}}
>> gVersionInfoHobGuid = {0xe13a14c, 0x859c, 0x4f22, {0x82, 0xbd, 0x18, 0xe, 0xe1, 0x42, 0x12, 0xbf}}
>> + gEfiHisiSocControllerGuid = {0xee369cc3, 0xa743, 0x5382, {0x75, 0x64, 0x53, 0xe4, 0x31, 0x19, 0x38, 0x35}}
>>
>> [LibraryClasses]
>> PlatformSysCtrlLib|Include/Library/PlatformSysCtrlLib.h
>> diff --git a/Silicon/Hisilicon/Include/Library/OemDevicePath.h b/Silicon/Hisilicon/Include/Library/OemDevicePath.h
>> new file mode 100644
>> index 0000000..ec8cd02
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Include/Library/OemDevicePath.h
>> @@ -0,0 +1,54 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2015 - 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#ifndef _OEM_DEVICE_PATH_H_
>> +#define _OEM_DEVICE_PATH_H_
>> +#include <Protocol/DevicePath.h>
>> +
>> +typedef enum
>> +{
>> + C_NIC = 1,
>> + C_SATA = 2,
>> + C_SAS = 3,
>> + C_USB = 4,
>> +} CONTROLLER_TYPE;
>> +
>> +typedef struct{
>> + VENDOR_DEVICE_PATH Vender;
>> + UINT8 ControllerType;
>> + UINT8 Socket;
>> + UINT8 Port;
>> +} EXT_VENDOR_DEVICE_PATH;
>> +
>> +typedef struct{
>> + UINT16 BootIndex;
>> + UINT16 Port;
>> +}SATADES;
>
> Space after }
>
>> +
>> +typedef struct{
>> + UINT16 BootIndex;
>> + UINT16 ParentPortNumber;
>> + UINT16 InterfaceNumber;
>> +}USBDES;
>> +
>
> and here
>
>> +typedef struct{
>> + UINT16 BootIndex;
>> + UINT16 Port;
>> +}PXEDES;
>> +
>
> and here
>
>> +extern EFI_GUID gEfiHisiSocControllerGuid;
>
> You don't need this
>
>> +
>> +#endif
>> +
>> diff --git a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
>> index 1e1892b..dbd215a 100644
>> --- a/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
>> +++ b/Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h
>> @@ -34,4 +34,15 @@ struct _PLATFORM_SAS_PROTOCOL {
>> SAS_INIT Init;
>> };
>>
>
> Please create a separate header file for the below
>
>> +typedef struct _HISI_PLATFORM_SAS_PROTOCOL HISI_PLATFORM_SAS_PROTOCOL;
>> +
>> +struct _HISI_PLATFORM_SAS_PROTOCOL {
>> + UINT32 ControllerId;
>> + BOOLEAN Enable;
>> + UINT64 BaseAddr;
>> + UINT64 ResetAddr;
>> +};
>> +
>> +extern EFI_GUID gHisiPlatformSasProtocolGuid;
>> +
>> #endif
>> --
>> 1.9.1
>>
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code
2018-01-18 15:01 ` [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code Ming Huang
2018-01-20 10:57 ` Ard Biesheuvel
@ 2018-01-23 14:04 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:04 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Thu, Jan 18, 2018 at 11:01:34PM +0800, Ming Huang wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
Could you add a small description of what this component does?
As part of the commit message?
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-18 15:01 ` [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support Ming Huang
2018-01-20 10:50 ` Ard Biesheuvel
@ 2018-01-23 14:06 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:06 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Thu, Jan 18, 2018 at 11:01:33PM +0800, Ming Huang wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
Can you add a description of this support to the commit message?
For example, does this support updating the boot CPU firmware only, or
does it also permit system controllers and BMC?
Other than that, I have no comments beyond Ard's.
/
Leif
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code
2018-01-18 15:01 ` [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform " Ming Huang
2018-01-20 11:00 ` Ard Biesheuvel
@ 2018-01-23 14:07 ` Leif Lindholm
2018-01-24 12:31 ` Huangming (Mark)
1 sibling, 1 reply; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:07 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
On Thu, Jan 18, 2018 at 11:01:35PM +0800, Ming Huang wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> 1. Open driver source code.
Please describe what this driver does.
> 2. This code includes network sequence correction
> solution.
Which correction?
Is there an existing bug report somewhere this can refer to?
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4
2018-01-18 15:01 ` [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 Ming Huang
2018-01-20 11:01 ` Ard Biesheuvel
@ 2018-01-23 14:15 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:15 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
The patch is good, but the subject is too broad, and the message could
be more descriptive.
Subject should say something like "Indicate use of ProcessorFamily2 in
type 4 table".
Message should point out that ProcessorFamily2 is already specified as
ProcessorFamilyARM in the existing table.
Regards,
Leif
On Thu, Jan 18, 2018 at 11:01:36PM +0800, Ming Huang wrote:
> modify processorFamily of type 4 to ProcessorFamilyIndicatorFamily2,
> indicator to obtain the processor family from the Processor Family 2 field.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> index 61473e8..c9903ba 100644
> --- a/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> +++ b/Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> @@ -125,7 +125,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = {
> },
> 1, //Socket
> CentralProcessor, //ProcessorType
> - ProcessorFamilyOther, //ProcessorFamily
> + ProcessorFamilyIndicatorFamily2, //ProcessorFamily
> 2, //ProcessorManufacture
> { //ProcessorId
> { //Signature
> @@ -172,7 +172,7 @@ SMBIOS_TABLE_TYPE4 mSmbiosProcessorTable[] = {
> },
> 1, //Socket
> CentralProcessor, //ProcessorType
> - ProcessorFamilyOther, //ProcessorFamily
> + ProcessorFamilyIndicatorFamily2, //ProcessorFamily
> 2, //ProcessorManufacture
> { //ProcessorId
> { //Signature
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
2018-01-18 15:01 ` [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver Ming Huang
2018-01-20 11:05 ` Ard Biesheuvel
@ 2018-01-23 14:21 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:21 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23,
GongChengYa
On Thu, Jan 18, 2018 at 11:01:38PM +0800, Ming Huang wrote:
> In SCT test,we find SP805 watchdog driver can't reset when timeout
> so we use another driver in MdeModulePkg.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: GongChengYa <gongchengya1@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 2 +-
> Platform/Hisilicon/D05/D05.fdf | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 4e19de2..79890ef 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -515,7 +515,7 @@
>
> ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
> #
> #ACPI
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 9873677..d05e227 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -193,7 +193,7 @@ READ_LOCK_STATUS = TRUE
> INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
>
> #
> # FAT filesystem + GPT/MBR partitioning
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 10/14] Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
2018-01-18 15:01 ` [PATCH edk2-platforms v1 10/14] Hisilicon/D03: " Ming Huang
2018-01-20 11:05 ` Ard Biesheuvel
@ 2018-01-23 14:21 ` Leif Lindholm
1 sibling, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:21 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23,
GongChengYa
On Thu, Jan 18, 2018 at 11:01:39PM +0800, Ming Huang wrote:
> In SCT test,we find SP805 watchdog driver can't reset when timeout
> so we use another driver in MdeModulePkg.
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> Signed-off-by: GongChengYa <gongchengya1@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
> Platform/Hisilicon/D03/D03.dsc | 2 +-
> Platform/Hisilicon/D03/D03.fdf | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
> index b22afe3..88c08dd 100644
> --- a/Platform/Hisilicon/D03/D03.dsc
> +++ b/Platform/Hisilicon/D03/D03.dsc
> @@ -379,7 +379,7 @@
>
> ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
> IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf
> #
> #ACPI
> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
> index e93985b..5b7bb1d 100644
> --- a/Platform/Hisilicon/D03/D03.fdf
> +++ b/Platform/Hisilicon/D03/D03.fdf
> @@ -189,7 +189,7 @@ READ_LOCK_STATUS = TRUE
> INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
> INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
>
> - INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
> + INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
>
> #
> # FAT filesystem + GPT/MBR partitioning
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
` (14 preceding siblings ...)
2018-01-22 13:26 ` [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Leif Lindholm
@ 2018-01-23 14:24 ` Leif Lindholm
15 siblings, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-23 14:24 UTC (permalink / raw)
To: Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
I have no further comments on this series beyond the patches I have
already responded to - in general it is in good shape and addresses
most if not all changes we had requested for the 18.02 cycle.
/
Leif
On Thu, Jan 18, 2018 at 11:01:29PM +0800, Ming Huang wrote:
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
>
> *** BLURB HERE ***
>
> Jason Zhang (4):
> Hisilicon/D05: Add PPTT support
> Hisilicon D03/D05: Add capsule upgrade support
> Hisilicon D03/D05: Open SasPlatform source code
> Hisilicon D03/D05: Open SnpPlatform source code
>
> Ming Huang (9):
> Hisilicon D03/D05：Switch to Generic BDS driver
> Hisilicon D03/D05: Optimize the feature of BMC set boot option
> Hisilicon/Smbios: modify type 4
> Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver.
> Hisilicon/D03: Replace SP805Watchdog by WatchdogTimer driver.
> Hisilicon/D05/ACPI: Add ITS PXM
> Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM
> Hisilicon/Library: Add OsBootLib
> Hisilicon D03/D05: Update firmware version to 18.02
>
> Yan Zhang (1):
> Hisilicon/PCIe: Disable PCIe ASPM
>
> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++
> Platform/Hisilicon/D03/D03.dsc | 51 +-
> Platform/Hisilicon/D03/D03.fdf | 84 ++-
> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 ++
> Platform/Hisilicon/D05/D05.dsc | 56 +-
> Platform/Hisilicon/D05/D05.fdf | 85 ++-
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c | 89 +++
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h | 49 ++
> Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf | 61 ++
> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c | 4 +-
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c | 99 +++
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h | 43 ++
> Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf | 60 ++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 ++
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 ++
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.c | 71 ++
> Silicon/Hisilicon/Hi1610/Drivers/PcieInit1610/PcieInitLib.h | 2 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Srat.aslc | 10 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Hns.asl | 9 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Pci.asl | 34 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Sas.asl | 19 +-
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 +++++++++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 ++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 ++
> Silicon/Hisilicon/HisiPkg.dec | 3 +
> Silicon/Hisilicon/Hisilicon.dsc.inc | 12 +-
> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 +
> Silicon/Hisilicon/Include/Library/AcpiNextLib.h | 10 +-
> Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h | 31 +
> Silicon/Hisilicon/Include/Library/OemDevicePath.h | 54 ++
> Silicon/Hisilicon/Include/Library/OsBootLib.h | 47 ++
> Silicon/Hisilicon/Include/Protocol/PlatformSasProtocol.h | 11 +
> Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h | 32 +
> Silicon/Hisilicon/Include/Regs/HisiPcieV1RegOffset.h | 2 +
> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c | 454 +++++++++++++
> Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf | 51 ++
> Silicon/Hisilicon/Library/OsBootLib/OsBoot.h | 124 ++++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c | 217 +++++++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf | 59 ++
> Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c | 514 +++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c | 601 +++++++++++++++++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h | 59 ++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf | 91 +++
> Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c | 681 ++++++++++++++++++++
> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 +++
> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++
> Silicon/Hisilicon/Library/PlatformIntelBdsLib/IntelBdsPlatform.c | 434 +------------
> Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf | 4 +-
> 51 files changed, 4987 insertions(+), 489 deletions(-)
> create mode 100644 Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> create mode 100644 Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
> create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.c
> create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.h
> create mode 100644 Silicon/Hisilicon/Drivers/SasPlatform/SasPlatform.inf
> create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.c
> create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.h
> create mode 100644 Silicon/Hisilicon/Drivers/SnpPlatform/SnpPlatform.inf
> create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
> create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
> create mode 100644 Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
> create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> create mode 100644 Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> create mode 100644 Silicon/Hisilicon/Include/Library/BmcConfigBootLib.h
> create mode 100644 Silicon/Hisilicon/Include/Library/OemDevicePath.h
> create mode 100644 Silicon/Hisilicon/Include/Library/OsBootLib.h
> create mode 100644 Silicon/Hisilicon/Include/Protocol/SnpPlatformProtocol.h
> create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.c
> create mode 100644 Silicon/Hisilicon/Library/BmcConfigBootLib/BmcConfigBootLib.inf
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBoot.h
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.c
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLib.inf
> create mode 100644 Silicon/Hisilicon/Library/OsBootLib/OsBootLibMisc.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBm.h
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
> create mode 100644 Silicon/Hisilicon/Library/PlatformBootManagerLib/QuietBoot.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
> create mode 100644 Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>
> --
> 1.9.1
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
2018-01-20 10:16 ` Ard Biesheuvel
2018-01-22 13:53 ` Leif Lindholm
@ 2018-01-23 21:29 ` Jeremy Linton
2018-01-24 7:57 ` Huangming (Mark)
2018-01-25 5:56 ` Huangming (Mark)
2 siblings, 2 replies; 72+ messages in thread
From: Jeremy Linton @ 2018-01-23 21:29 UTC (permalink / raw)
To: Ming Huang, leif.lindholm, linaro-uefi, edk2-devel,
graeme.gregory
Cc: huangming23, ard.biesheuvel, zhangjinsong2, wanghuiqiang, guoheyi,
waip23, mengfanrong
Hi,
On 01/18/2018 09:01 AM, Ming Huang wrote:
> From: Jason Zhang <zhangjinsong2@huawei.com>
>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> Signed-off-by: Ming Huang <huangming23@huawei.com>
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> ---
> Platform/Hisilicon/D05/D05.dsc | 1 +
> Platform/Hisilicon/D05/D05.fdf | 1 +
> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
> 7 files changed, 677 insertions(+), 27 deletions(-)
>
> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> index 77a89fd..710339c 100644
> --- a/Platform/Hisilicon/D05/D05.dsc
> +++ b/Platform/Hisilicon/D05/D05.dsc
> @@ -506,6 +506,7 @@
> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>
> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>
> #
> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> index 78ab0c8..97de4d2 100644
> --- a/Platform/Hisilicon/D05/D05.fdf
> +++ b/Platform/Hisilicon/D05/D05.fdf
> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>
> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>
> #
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> index 808219a..f1927e8 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> @@ -19,6 +19,7 @@
>
> #ifndef _HI1610_PLATFORM_H_
> #define _HI1610_PLATFORM_H_
> +#include <IndustryStandard/Acpi.h>
>
> //
> // ACPI table information used to initialize tables.
> @@ -44,5 +45,31 @@
> }
>
> #define HI1616_WATCHDOG_COUNT 2
> +#define HI1616_GIC_STRUCTURE_COUNT 64
> +
> +#define HI1616_MPID_TA_BASE 0x10000
> +#define HI1616_MPID_TB_BASE 0x30000
> +#define HI1616_MPID_TA_2_BASE 0x50000
> +#define HI1616_MPID_TB_2_BASE 0x70000
> +
> +// Differs from Juno, we have another affinity level beyond cluster and core
> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
> +
> +//
> +// Multiple APIC Description Table
> +//
> +#pragma pack (1)
> +
> +typedef struct {
> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> +
> +#pragma pack ()
>
> #endif
> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> index 169ee72..33dca03 100644
> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> @@ -1,9 +1,9 @@
> /** @file
> * Multiple APIC Description Table (MADT)
> *
> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
> *
> * This program and the accompanying materials
> *
> @@ -19,34 +19,11 @@
> *
> **/
>
> -
> -#include <IndustryStandard/Acpi.h>
> +#include "Hi1616Platform.h"
> #include <Library/AcpiLib.h>
> #include <Library/AcpiNextLib.h>
> #include <Library/ArmLib.h>
> #include <Library/PcdLib.h>
> -#include "Hi1616Platform.h"
> -
> -// Differs from Juno, we have another affinity level beyond cluster and core
> -// 0x20000 is only for socket 0
> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
> -
> -//
> -// Multiple APIC Description Table
> -//
> -#pragma pack (1)
> -
> -typedef struct {
> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> -
> -#pragma pack ()
>
> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> {
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> new file mode 100644
> index 0000000..eac4736
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> @@ -0,0 +1,447 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> +*
> +**/
> +
> +#include "Pptt.h"
> +
> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
> +
> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
> + ARM_ACPI_HEADER (
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
> + EFI_ACPI_DESCRIPTION_HEADER,
> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
> + );
> +
> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
> +{
> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
> +};
> +
> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
> +{
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
> +};
> +
> +EFI_STATUS
> +InitCacheInfo(
> + )
> +{
> + UINT8 Index;
> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
> + CSSELR_DATA CsselrData;
> + CCSIDR_DATA CcsidrData;
> +
> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
> + CsselrData.Data = 0;
> + CcsidrData.Data = 0;
> + Type1Attributes.Data = 0;
> +
> + if (Index == 0) { //L1I
> + CsselrData.Bits.InD = 1;
> + CsselrData.Bits.Level = 0;
> + Type1Attributes.Bits.CacheType = 1;
> + } else if (Index == 1) {
> + Type1Attributes.Bits.CacheType = 0;
> + CsselrData.Bits.Level = Index -1;
> + } else {
> + Type1Attributes.Bits.CacheType = 2;
> + CsselrData.Bits.Level = Index -1;
> + }
> +
> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
> +
> + if (CcsidrData.Bits.Wa == 1) {
> + Type1Attributes.Bits.AllocateType = 1;
> + if (CcsidrData.Bits.Ra == 1) {
> + Type1Attributes.Bits.AllocateType++;
> + }
> + }
> +
> + if (CcsidrData.Bits.Wt == 1) {
> + Type1Attributes.Bits.WritePolicy = 1;
> + }
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
> +
> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
> + mPpttCacheType1[Index].Associativity * \
> + mPpttCacheType1[Index].NumberOfSets;
> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> + PPTT_TYPE1_LINE_SIZE_VALID;
> +
> + }
> +
> + // L3
> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> + PPTT_TYPE1_LINE_SIZE_VALID;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddCoreTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo,
> + IN UINT32 ProcessorId
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> + UINT8 Index;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->AcpiProcessorId = ProcessorId;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddClusterTable (
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> +
> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddScclTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> + UINT32 *PrivateResource;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> +
> + // Add cache type structure
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> +
> + return EFI_SUCCESS;
> +}
> +
> +EFI_STATUS
> +AddSocketTable(
> + IN VOID *PpttTable,
> + IN OUT VOID *PpttTableLengthRemain,
> + IN UINT32 Flags,
> + IN UINT32 Parent,
> + IN UINT32 ResourceNo
> + )
> +{
> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
> + UINT32 *PrivateResource;
> + UINT8 Index;
> +
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + PpttType0->Type = 0;
> + PpttType0->Flags = Flags;
> + PpttType0->Parent= Parent;
> + PpttType0->PrivateResourceNo = ResourceNo;
> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> +
> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
> +
> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
> + return EFI_OUT_OF_RESOURCES;
> + }
> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
> + }
> +
> + return EFI_SUCCESS;
> +}
> +
> +VOID
> +GetApic(
> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
> +VOID *PpttTable,
> +IN UINT32 PpttTableLengthRemain,
> +IN UINT32 Index1
> +)
> +{
> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
> + UINT32 Parent = 0;
> + UINT32 Flags = 0;
> + UINT32 ResourceNo = 0;
> + //Get APIC data
> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
> + SocketOffset = 0;
> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
> + ScclOffset = 0;
> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
> + ClusterOffset = 0;
> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
> +
> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
> +
> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
> + //This processor is unusable
> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
> + return;
> + }
> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
> + //This processor is unusable
> + Index1++;
> + continue;
> + }
> +
> + if (SocketOffset == 0) {
> + //Add socket0 for type0 table
> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> + Parent = 0;
> + Flags = PPTT_TYPE0_SOCKET_FLAG;
> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> + if (ScclOffset == 0) {
> + //Add socket0die0 for type0 table
> + ResourceNo = 1;
> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> + Parent = SocketOffset;
> + Flags = PPTT_TYPE0_DIE_FLAG;
> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> + if (ClusterOffset == 0) {
> + //Add socket0die0ClusterId for type0 table
> + ResourceNo = 1;
> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> + Parent = ScclOffset;
> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> + }
> +
> + //Add socket0die0ClusterIdCoreId for type0 table
> + ResourceNo = 2;
> + Parent = ClusterOffset;
> + Flags = PPTT_TYPE0_CORE_FLAG;
> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
> +
> + Index1++;
> + }
> + }
> + }
> + }
> + return ;
> +}
> +
> +VOID
> +PpttSetAcpiTable(
> + IN EFI_EVENT Event,
> + IN VOID *Context
> + )
> +{
> + UINTN AcpiTableHandle;
> + EFI_STATUS Status;
> + UINT8 Checksum;
> + EFI_ACPI_SDT_HEADER *Table;
> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
> + EFI_ACPI_TABLE_VERSION TableVersion;
> + VOID *PpttTable;
> + UINTN TableKey;
> + UINT32 Index0, Index1;
> + UINT32 PpttTableLengthRemain = 0;
> +
> + gBS->CloseEvent (Event);
> +
> + InitCacheInfo ();
> +
> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
> +
> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
> + if (EFI_ERROR (Status)) {
> + break;
> + }
> + //Find APIC table
> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
> + continue;
> + }
> +
> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
> + Index1 = 0;
> +
> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
> + break;
> + }
> +
> + if (EFI_ERROR (Status)) {
> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
> + }
> +
> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
> +
> + AcpiTableHandle = 0;
> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
> +
> + FreePool (PpttTable);
> + return ;
> +}
> +
> +EFI_STATUS
> +InitPpttTable(
> + )
> +{
> + EFI_STATUS Status;
> + EFI_EVENT ReadyToBootEvent;
> +
> + Status = EfiCreateEventReadyToBootEx (
> + TPL_NOTIFY,
> + PpttSetAcpiTable,
> + NULL,
> + &ReadyToBootEvent
> + );
> + ASSERT_EFI_ERROR (Status);
> +
> + return Status;
> +}
> +
> +EFI_STATUS
> +EFIAPI
> +PpttEntryPoint(
> + IN EFI_HANDLE ImageHandle,
> + IN EFI_SYSTEM_TABLE *SystemTable
> + )
> +{
> + EFI_STATUS Status;
> +
> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
> + if (EFI_ERROR (Status)) {
> + return EFI_ABORTED;
> + }
> +
> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
> + if (EFI_ERROR (Status)) {
> + return EFI_ABORTED;
> + }
> +
> + InitPpttTable ();
> +
> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
> +
> + return EFI_SUCCESS;
> +}
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> new file mode 100644
> index 0000000..5dc635f
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> @@ -0,0 +1,142 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> +*
> +**/
> +
> +#ifndef _PPTT_H_
> +#define _PPTT_H_
> +
> +#include <IndustryStandard/Acpi.h>
> +#include <Library/ArmLib/ArmLibPrivate.h>
> +#include <Library/BaseMemoryLib.h>
> +#include <Library/DebugLib.h>
> +#include <Library/MemoryAllocationLib.h>
> +#include <Library/UefiBootServicesTableLib.h>
> +#include <Library/UefiLib.h>
> +#include <Protocol/AcpiSystemDescriptionTable.h>
> +#include <Protocol/AcpiTable.h>
> +#include "../D05AcpiTables/Hi1616Platform.h"
> +
> +///
> +/// "PPTT" Processor Properties Topology Table
> +///
> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
> +#define EFI_ACPI_MAX_NUM_TABLES 20
> +
> +#define PPTT_TABLE_MAX_LEN 0x6000
> +#define PPTT_SOCKET_NO 0x2
> +#define PPTT_DIE_NO 0x2
> +#define PPTT_CULSTER_NO 0x4
> +#define PPTT_CORE_NO 0x4
> +#define PPTT_SOCKET_COMPONENT_NO 0x1
> +#define PPTT_CACHE_NO 0x4
> +
> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
First most of these definitions should be in the common acpi 6.2
header.. I actually have a patch for that sitting around (along with the
juno table) but you have basically the same thing here..
For the parts not defined by ACPI I would leave them in this file
(SOCKET & DIE flag).
That said, I think DIE_FLAG here should be 0. You will mess up the
topology view if you put that on the DIE. Further, while the spec
doesn't ban marking every node in the tree with that flag, I'm trying to
clarify the spec so it says that the flag can only be set once between a
given processor node and the root.
I understand why you probably did this, but it should be under user
control (via a HII option). The SRAT domains need to start basically
where the die flag is set at the moment. Hopefully in the future we will
have an actual flag (that to is in the works) to put here but until that
is the case it should default to 0 (unless you allow the user to shift
the physical socket from the actual socket to the die). Either way that
will be HiSi specific behavior and not in the general header.
Thanks,
> +#define PPTT_TYPE0_CLUSTER_FLAG 0
> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
> +
> +#define PPTT_TYPE1_SIZE_VALID BIT0
> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
> +
> +typedef union {
> + struct {
> + UINT32 InD :1;
> + UINT32 Level :3;
> + UINT32 Reserved :28;
> + } Bits;
> + UINT32 Data;
> +}CSSELR_DATA;
> +
> +typedef union {
> + struct {
> + UINT32 LineSize :3;
> + UINT32 Associativity :10;
> + UINT32 NumSets :15;
> + UINT32 Wa :1;
> + UINT32 Ra :1;
> + UINT32 Wb :1;
> + UINT32 Wt :1;
> + } Bits;
> + UINT32 Data;
> +}CCSIDR_DATA;
> +
> +//
> +// Processor Hierarchy Node Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 Flags;
> + UINT32 Parent;
> + UINT32 AcpiProcessorId;
> + UINT32 PrivateResourceNo;
> +} EFI_ACPI_6_2_PPTT_TYPE0;
> +
> +//
> +// Cache Configuration
> +//
> +typedef union {
> + struct {
> + UINT8 AllocateType :2;
> + UINT8 CacheType :2;
> + UINT8 WritePolicy :1;
> + UINT8 Reserved :3;
> + } Bits;
> + UINT8 Data;
> +}PPTT_TYPE1_ATTRIBUTES;
> +
> +//
> +// Cache Type Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 Flags;
> + UINT32 NextLevelOfCache;
> + UINT32 Size;
> + UINT32 NumberOfSets;
> + UINT8 Associativity;
> + UINT8 Attributes;
> + UINT16 LineSize;
> +} EFI_ACPI_6_2_PPTT_TYPE1;
> +
> +//
> +// ID Structure
> +//
> +typedef struct {
> + UINT8 Type;
> + UINT8 Length;
> + UINT16 Reserved;
> + UINT32 VendorId;
> + UINT64 Level1Id;
> + UINT64 Level2Id;
> + UINT16 MajorRev;
> + UINT16 MinorRev;
> + UINT16 SpinRev;
> +} EFI_ACPI_6_2_PPTT_TYPE2;
> +
> +#endif // _PPTT_H_
> +
> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> new file mode 100644
> index 0000000..ce26b97
> --- /dev/null
> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> @@ -0,0 +1,55 @@
> +/** @file
> +*
> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
> +*
> +* This program and the accompanying materials
> +* are licensed and made available under the terms and conditions of the BSD License
> +* which accompanies this distribution. The full text of the license may be found at
> +* http://opensource.org/licenses/bsd-license.php
> +*
> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +*
> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> +*
> +**/
> +
> +[Defines]
> + INF_VERSION = 0x00010005
> + BASE_NAME = AcpiPptt
> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
> + MODULE_TYPE = DXE_DRIVER
> + VERSION_STRING = 1.0
> + ENTRY_POINT = PpttEntryPoint
> +
> +[Sources.common]
> + Pptt.c
> + Pptt.h
> +
> +[Packages]
> + MdePkg/MdePkg.dec
> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
> + ArmPkg/ArmPkg.dec
> +
> +[LibraryClasses]
> + ArmLib
> + HobLib
> + UefiRuntimeServicesTableLib
> + UefiDriverEntryPoint
> + BaseMemoryLib
> + DebugLib
> +
> +[Guids]
> +
> +
> +[Protocols]
> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> + gEfiAcpiSdtProtocolGuid
> +
> +[Pcd]
> +
> +
> +[Depex]
> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
> +
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02
2018-01-23 10:18 ` Leif Lindholm
@ 2018-01-24 1:17 ` Huangming (Mark)
2018-01-24 7:54 ` Leif Lindholm
0 siblings, 1 reply; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-24 1:17 UTC (permalink / raw)
To: Leif Lindholm, Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, zhangjinsong2, mengfanrong, waip23
On 2018/1/23 18:18, Leif Lindholm wrote:
> On Thu, Jan 18, 2018 at 11:01:43PM +0800, Ming Huang wrote:
>> Replace the old string with short one. The old one is
>> too long that can not be show integrallty in Setup nemu.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>
> NAK
>
> Anything that is not an official Linaro reference platform release is
> a development build. The fallback string needs to indicate this.
> The current one does this.
> The modified version does not.
>
> /
> Leif
>
Is the below version string ok?
"Development build 18.02 for Hisilicon D03"
>> ---
>> Platform/Hisilicon/D03/D03.dsc | 2 +-
>> Platform/Hisilicon/D05/D05.dsc | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index 6f1164e..b6b8086 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -171,7 +171,7 @@
>> !ifdef $(FIRMWARE_VER)
>> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
>> !else
>> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D03 UEFI 17.10 Release"
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D03"
>> !endif
>>
>> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 52ffad5..a599c08 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -190,7 +190,7 @@
>> !ifdef $(FIRMWARE_VER)
>> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(FIRMWARE_VER)"
>> !else
>> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development build base on Hisilicon D05 UEFI 17.10 Release"
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02 for Hisilicon D05"
>> !endif
>>
>> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02
2018-01-24 1:17 ` Huangming (Mark)
@ 2018-01-24 7:54 ` Leif Lindholm
0 siblings, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-24 7:54 UTC (permalink / raw)
To: Ming Huang
Cc: Heyi Guo, Linaro UEFI, edk2-devel, graeme.gregory, ard.biesheuvel,
guoheyi, wanghuiqiang, zhangjinsong2, mengfanrong, waip23
On 24 Jan 2018 01:17, "Huangming (Mark)" <huangming23@huawei.com> wrote:
On 2018/1/23 18:18, Leif Lindholm wrote:
> On Thu, Jan 18, 2018 at 11:01:43PM +0800, Ming Huang wrote:
>> Replace the old string with short one. The old one is
>> too long that can not be show integrallty in Setup nemu.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>
> NAK
>
> Anything that is not an official Linaro reference platform release is
> a development build. The fallback string needs to indicate this.
> The current one does this.
> The modified version does not.
>
> /
> Leif
>
Is the below version string ok?
"Development build 18.02 for Hisilicon D03"
Sure, that works.
/
Leif
>> ---
>> Platform/Hisilicon/D03/D03.dsc | 2 +-
>> Platform/Hisilicon/D05/D05.dsc | 2 +-
>> 2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.
dsc
>> index 6f1164e..b6b8086 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -171,7 +171,7 @@
>> !ifdef $(FIRMWARE_VER)
>> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(
FIRMWARE_VER)"
>> !else
>> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development
build base on Hisilicon D03 UEFI 17.10 Release"
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02
for Hisilicon D03"
>> !endif
>>
>> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.
dsc
>> index 52ffad5..a599c08 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -190,7 +190,7 @@
>> !ifdef $(FIRMWARE_VER)
>> gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"$(
FIRMWARE_VER)"
>> !else
>> - gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"Development
build base on Hisilicon D05 UEFI 17.10 Release"
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareVersionString|L"RP 18.02
for Hisilicon D05"
>> !endif
>>
>> gHisiTokenSpaceGuid.PcdBiosVersionString|L"10.01.01T18"
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-23 21:29 ` Jeremy Linton
@ 2018-01-24 7:57 ` Huangming (Mark)
2018-01-25 5:56 ` Huangming (Mark)
1 sibling, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-24 7:57 UTC (permalink / raw)
To: Jeremy Linton, Ming Huang, leif.lindholm, linaro-uefi, edk2-devel,
graeme.gregory
Cc: ard.biesheuvel, zhangjinsong2, wanghuiqiang, guoheyi, waip23,
mengfanrong
On 2018/1/24 5:29, Jeremy Linton wrote:
> Hi,
>
>
> On 01/18/2018 09:01 AM, Ming Huang wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Platform/Hisilicon/D05/D05.fdf | 1 +
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
>> 7 files changed, 677 insertions(+), 27 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 77a89fd..710339c 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -506,6 +506,7 @@
>> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 78ab0c8..97de4d2 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
>> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> #
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> index 808219a..f1927e8 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> @@ -19,6 +19,7 @@
>> #ifndef _HI1610_PLATFORM_H_
>> #define _HI1610_PLATFORM_H_
>> +#include <IndustryStandard/Acpi.h>
>> //
>> // ACPI table information used to initialize tables.
>> @@ -44,5 +45,31 @@
>> }
>> #define HI1616_WATCHDOG_COUNT 2
>> +#define HI1616_GIC_STRUCTURE_COUNT 64
>> +
>> +#define HI1616_MPID_TA_BASE 0x10000
>> +#define HI1616_MPID_TB_BASE 0x30000
>> +#define HI1616_MPID_TA_2_BASE 0x50000
>> +#define HI1616_MPID_TB_2_BASE 0x70000
>> +
>> +// Differs from Juno, we have another affinity level beyond cluster and core
>> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +
>> +//
>> +// Multiple APIC Description Table
>> +//
>> +#pragma pack (1)
>> +
>> +typedef struct {
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
>> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> +
>> +#pragma pack ()
>> #endif
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> index 169ee72..33dca03 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> @@ -1,9 +1,9 @@
>> /** @file
>> * Multiple APIC Description Table (MADT)
>> *
>> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
>> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
>> *
>> * This program and the accompanying materials
>> *
>> @@ -19,34 +19,11 @@
>> *
>> **/
>> -
>> -#include <IndustryStandard/Acpi.h>
>> +#include "Hi1616Platform.h"
>> #include <Library/AcpiLib.h>
>> #include <Library/AcpiNextLib.h>
>> #include <Library/ArmLib.h>
>> #include <Library/PcdLib.h>
>> -#include "Hi1616Platform.h"
>> -
>> -// Differs from Juno, we have another affinity level beyond cluster and core
>> -// 0x20000 is only for socket 0
>> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
>> -
>> -//
>> -// Multiple APIC Description Table
>> -//
>> -#pragma pack (1)
>> -
>> -typedef struct {
>> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
>> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> -
>> -#pragma pack ()
>> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
>> {
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> new file mode 100644
>> index 0000000..eac4736
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> @@ -0,0 +1,447 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#include "Pptt.h"
>> +
>> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
>> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
>> +
>> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
>> + ARM_ACPI_HEADER (
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
>> + EFI_ACPI_DESCRIPTION_HEADER,
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
>> + );
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
>> +{
>> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
>> +};
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
>> +{
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
>> +};
>> +
>> +EFI_STATUS
>> +InitCacheInfo(
>> + )
>> +{
>> + UINT8 Index;
>> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
>> + CSSELR_DATA CsselrData;
>> + CCSIDR_DATA CcsidrData;
>> +
>> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
>> + CsselrData.Data = 0;
>> + CcsidrData.Data = 0;
>> + Type1Attributes.Data = 0;
>> +
>> + if (Index == 0) { //L1I
>> + CsselrData.Bits.InD = 1;
>> + CsselrData.Bits.Level = 0;
>> + Type1Attributes.Bits.CacheType = 1;
>> + } else if (Index == 1) {
>> + Type1Attributes.Bits.CacheType = 0;
>> + CsselrData.Bits.Level = Index -1;
>> + } else {
>> + Type1Attributes.Bits.CacheType = 2;
>> + CsselrData.Bits.Level = Index -1;
>> + }
>> +
>> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
>> +
>> + if (CcsidrData.Bits.Wa == 1) {
>> + Type1Attributes.Bits.AllocateType = 1;
>> + if (CcsidrData.Bits.Ra == 1) {
>> + Type1Attributes.Bits.AllocateType++;
>> + }
>> + }
>> +
>> + if (CcsidrData.Bits.Wt == 1) {
>> + Type1Attributes.Bits.WritePolicy = 1;
>> + }
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
>> +
>> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
>> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
>> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
>> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
>> + mPpttCacheType1[Index].Associativity * \
>> + mPpttCacheType1[Index].NumberOfSets;
>> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
>> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>> + }
>> +
>> + // L3
>> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddCoreTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo,
>> + IN UINT32 ProcessorId
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->AcpiProcessorId = ProcessorId;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddClusterTable (
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddScclTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddSocketTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
>> +
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +VOID
>> +GetApic(
>> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
>> +VOID *PpttTable,
>> +IN UINT32 PpttTableLengthRemain,
>> +IN UINT32 Index1
>> +)
>> +{
>> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
>> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
>> + UINT32 Parent = 0;
>> + UINT32 Flags = 0;
>> + UINT32 ResourceNo = 0;
>> + //Get APIC data
>> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
>> + SocketOffset = 0;
>> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
>> + ScclOffset = 0;
>> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
>> + ClusterOffset = 0;
>> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
>> +
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
>> +
>> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
>> + //This processor is unusable
>> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
>> + return;
>> + }
>> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
>> + //This processor is unusable
>> + Index1++;
>> + continue;
>> + }
>> +
>> + if (SocketOffset == 0) {
>> + //Add socket0 for type0 table
>> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
>> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + Parent = 0;
>> + Flags = PPTT_TYPE0_SOCKET_FLAG;
>> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ScclOffset == 0) {
>> + //Add socket0die0 for type0 table
>> + ResourceNo = 1;
>> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>> + Parent = SocketOffset;
>> + Flags = PPTT_TYPE0_DIE_FLAG;
>> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ClusterOffset == 0) {
>> + //Add socket0die0ClusterId for type0 table
>> + ResourceNo = 1;
>> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>> + Parent = ScclOffset;
>> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
>> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> +
>> + //Add socket0die0ClusterIdCoreId for type0 table
>> + ResourceNo = 2;
>> + Parent = ClusterOffset;
>> + Flags = PPTT_TYPE0_CORE_FLAG;
>> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
>> +
>> + Index1++;
>> + }
>> + }
>> + }
>> + }
>> + return ;
>> +}
>> +
>> +VOID
>> +PpttSetAcpiTable(
>> + IN EFI_EVENT Event,
>> + IN VOID *Context
>> + )
>> +{
>> + UINTN AcpiTableHandle;
>> + EFI_STATUS Status;
>> + UINT8 Checksum;
>> + EFI_ACPI_SDT_HEADER *Table;
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
>> + EFI_ACPI_TABLE_VERSION TableVersion;
>> + VOID *PpttTable;
>> + UINTN TableKey;
>> + UINT32 Index0, Index1;
>> + UINT32 PpttTableLengthRemain = 0;
>> +
>> + gBS->CloseEvent (Event);
>> +
>> + InitCacheInfo ();
>> +
>> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
>> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
>> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
>> +
>> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
>> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
>> + if (EFI_ERROR (Status)) {
>> + break;
>> + }
>> + //Find APIC table
>> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
>> + continue;
>> + }
>> +
>> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
>> + Index1 = 0;
>> +
>> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
>> + break;
>> + }
>> +
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
>> + }
>> +
>> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
>> +
>> + AcpiTableHandle = 0;
>> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
>> +
>> + FreePool (PpttTable);
>> + return ;
>> +}
>> +
>> +EFI_STATUS
>> +InitPpttTable(
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_EVENT ReadyToBootEvent;
>> +
>> + Status = EfiCreateEventReadyToBootEx (
>> + TPL_NOTIFY,
>> + PpttSetAcpiTable,
>> + NULL,
>> + &ReadyToBootEvent
>> + );
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + return Status;
>> +}
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +PpttEntryPoint(
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + InitPpttTable ();
>> +
>> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> new file mode 100644
>> index 0000000..5dc635f
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> @@ -0,0 +1,142 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#ifndef _PPTT_H_
>> +#define _PPTT_H_
>> +
>> +#include <IndustryStandard/Acpi.h>
>> +#include <Library/ArmLib/ArmLibPrivate.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Protocol/AcpiSystemDescriptionTable.h>
>> +#include <Protocol/AcpiTable.h>
>> +#include "../D05AcpiTables/Hi1616Platform.h"
>> +
>> +///
>> +/// "PPTT" Processor Properties Topology Table
>> +///
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
>> +#define EFI_ACPI_MAX_NUM_TABLES 20
>> +
>> +#define PPTT_TABLE_MAX_LEN 0x6000
>> +#define PPTT_SOCKET_NO 0x2
>> +#define PPTT_DIE_NO 0x2
>> +#define PPTT_CULSTER_NO 0x4
>> +#define PPTT_CORE_NO 0x4
>> +#define PPTT_SOCKET_COMPONENT_NO 0x1
>> +#define PPTT_CACHE_NO 0x4
>> +
>> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
>> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
>> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
>> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
>
> First most of these definitions should be in the common acpi 6.2 header.. I actually have a patch for that sitting around (along with the juno table) but you have basically the same thing here..
>
> For the parts not defined by ACPI I would leave them in this file (SOCKET & DIE flag).
>
> That said, I think DIE_FLAG here should be 0. You will mess up the topology view if you put that on the DIE. Further, while the spec doesn't ban marking every node in the tree with that flag, I'm trying to clarify the spec so it says that the flag can only be set once between a given processor node and the root.
>
> I understand why you probably did this, but it should be under user control (via a HII option). The SRAT domains need to start basically where the die flag is set at the moment. Hopefully in the future we will have an actual flag (that to is in the works) to put here but until that is the case it should default to 0 (unless you allow the user to shift the physical socket from the actual socket to the die). Either way that will be HiSi specific behavior and not in the general header.
>
>
> Thanks,
>
>
I agree with you that DIE_FLAG should be alway 0, so it is not necessary to control by user via a HII option.
the definitions will be replace with those in the common acpi 6.2 header.
Thanks.
>> +#define PPTT_TYPE0_CLUSTER_FLAG 0
>> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
>> +
>> +#define PPTT_TYPE1_SIZE_VALID BIT0
>> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
>> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
>> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
>> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
>> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
>> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
>> +
>> +typedef union {
>> + struct {
>> + UINT32 InD :1;
>> + UINT32 Level :3;
>> + UINT32 Reserved :28;
>> + } Bits;
>> + UINT32 Data;
>> +}CSSELR_DATA;
>> +
>> +typedef union {
>> + struct {
>> + UINT32 LineSize :3;
>> + UINT32 Associativity :10;
>> + UINT32 NumSets :15;
>> + UINT32 Wa :1;
>> + UINT32 Ra :1;
>> + UINT32 Wb :1;
>> + UINT32 Wt :1;
>> + } Bits;
>> + UINT32 Data;
>> +}CCSIDR_DATA;
>> +
>> +//
>> +// Processor Hierarchy Node Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 Parent;
>> + UINT32 AcpiProcessorId;
>> + UINT32 PrivateResourceNo;
>> +} EFI_ACPI_6_2_PPTT_TYPE0;
>> +
>> +//
>> +// Cache Configuration
>> +//
>> +typedef union {
>> + struct {
>> + UINT8 AllocateType :2;
>> + UINT8 CacheType :2;
>> + UINT8 WritePolicy :1;
>> + UINT8 Reserved :3;
>> + } Bits;
>> + UINT8 Data;
>> +}PPTT_TYPE1_ATTRIBUTES;
>> +
>> +//
>> +// Cache Type Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 NextLevelOfCache;
>> + UINT32 Size;
>> + UINT32 NumberOfSets;
>> + UINT8 Associativity;
>> + UINT8 Attributes;
>> + UINT16 LineSize;
>> +} EFI_ACPI_6_2_PPTT_TYPE1;
>> +
>> +//
>> +// ID Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 VendorId;
>> + UINT64 Level1Id;
>> + UINT64 Level2Id;
>> + UINT16 MajorRev;
>> + UINT16 MinorRev;
>> + UINT16 SpinRev;
>> +} EFI_ACPI_6_2_PPTT_TYPE2;
>> +
>> +#endif // _PPTT_H_
>> +
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> new file mode 100644
>> index 0000000..ce26b97
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> @@ -0,0 +1,55 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>> + BASE_NAME = AcpiPptt
>> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = PpttEntryPoint
>> +
>> +[Sources.common]
>> + Pptt.c
>> + Pptt.h
>> +
>> +[Packages]
>> + MdePkg/MdePkg.dec
>> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
>> + ArmPkg/ArmPkg.dec
>> +
>> +[LibraryClasses]
>> + ArmLib
>> + HobLib
>> + UefiRuntimeServicesTableLib
>> + UefiDriverEntryPoint
>> + BaseMemoryLib
>> + DebugLib
>> +
>> +[Guids]
>> +
>> +
>> +[Protocols]
>> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
>> + gEfiAcpiSdtProtocolGuid
>> +
>> +[Pcd]
>> +
>> +
>> +[Depex]
>> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
>> +
>>
>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-20 10:50 ` Ard Biesheuvel
2018-01-23 8:53 ` Huangming (Mark)
@ 2018-01-24 11:10 ` Huangming (Mark)
2018-01-24 11:21 ` Ard Biesheuvel
1 sibling, 1 reply; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-24 11:10 UTC (permalink / raw)
To: Ard Biesheuvel, Ming Huang
Cc: Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/20 18:50, Ard Biesheuvel wrote:
> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>> Platform/Hisilicon/D03/D03.dsc | 17 +++-
>> Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
>> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>> Platform/Hisilicon/D05/D05.dsc | 19 +++-
>> Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
>> Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
>> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
>> 13 files changed, 641 insertions(+), 3 deletions(-)
>>
>
> Excellent!! Very happy to see this added.
>
>> diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> new file mode 100644
>> index 0000000..fc834d9
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> @@ -0,0 +1,45 @@
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Head]
>> +NumOfUpdate = 3
>> +NumOfRecovery = 0
>> +Update0 = SysFvMain
>> +Update1 = SysCustom
>> +Update2 = SysNvRam
>> +
>> +[SysFvMain]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x00000000 # Base address offset on flash
>> +Length = 0x002D0000 # Length
>> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysCustom]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002F0000 # Base address offset on flash
>> +Length = 0x00010000 # Length
>> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysNvRam]
>> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002D0000 # Base address offset on flash
>> +Length = 0x00020000 # Length
>> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>> index b2eae7d..69bc7b4 100644
>> --- a/Platform/Hisilicon/D03/D03.dsc
>> +++ b/Platform/Hisilicon/D03/D03.dsc
>> @@ -66,7 +66,6 @@
>> OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
>>
>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> !if $(GENERIC_BDS) == TRUE
>> @@ -117,6 +116,11 @@
>> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>>
>> +[PcdsDynamicExDefault.common.DEFAULT]
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
>> +
>> [PcdsFixedAtBuild.common]
>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>>
>> @@ -310,6 +314,8 @@
>> Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>>
>> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>> <LibraryClasses>
>> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>> @@ -410,6 +416,9 @@
>>
>> Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> +
>> #
>> # FAT filesystem + GPT/MBR partitioning
>> #
>> @@ -483,6 +492,12 @@
>> !else
>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> !endif
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
>> + <LibraryClasses>
>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>> + }
>> +
>> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>>
>> #
>> # UEFI application (Shell Embedded Boot Loader)
>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>> index 0d704b5..ffddd2d 100644
>> --- a/Platform/Hisilicon/D03/D03.fdf
>> +++ b/Platform/Hisilicon/D03/D03.fdf
>> @@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE
>> INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
>> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> #
>> # Build Shell from latest source code instead of prebuilt binary
>> #
>> @@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE
>>
>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>
>> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
>> SECTION FV_IMAGE = FVMAIN
>> }
>> }
>>
>> +[FV.CapsuleDispatchFv]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>> +
>> +[FV.SystemFirmwareUpdateCargo]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
>> + FD = D03
>> + }
>> +
>> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
>> + FV = CapsuleDispatchFv
>> + }
>> +
>> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
>> + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> + }
>> +
>> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
>> +IMAGE_HEADER_INIT_VERSION = 0x02
>> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
>
> Use a fresh GUID here, and make sure you use a different one for D03/D05 etc.
>
> This is what identifies the platform when using fwupdmgr etc.
>
>
IMAGE_TYPE_ID in D0x.fdf is need to equal to IMAGE_TYPE_ID_GUID in
Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc,
so D0x is used the same guid.
I will change the guid to a fresh one.
Thanks.
>> +IMAGE_INDEX = 0x1
>> +HARDWARE_INSTANCE = 0x0
>> +MONOTONIC_COUNT = 0x1
>> +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
>> +
>> + FV = SystemFirmwareUpdateCargo
>> +
>> +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
>> +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
>> +CAPSULE_HEADER_SIZE = 0x20
>> +CAPSULE_HEADER_INIT_VERSION = 0x1
>> +
>> + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>>
>> !include Silicon/Hisilicon/Hisilicon.fdf.inc
>>
>> diff --git a/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> new file mode 100644
>> index 0000000..fc834d9
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> @@ -0,0 +1,45 @@
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Head]
>> +NumOfUpdate = 3
>> +NumOfRecovery = 0
>> +Update0 = SysFvMain
>> +Update1 = SysCustom
>> +Update2 = SysNvRam
>> +
>> +[SysFvMain]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x00000000 # Base address offset on flash
>> +Length = 0x002D0000 # Length
>> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysCustom]
>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002F0000 # Base address offset on flash
>> +Length = 0x00010000 # Length
>> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> +
>> +[SysNvRam]
>> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>> +BaseAddress = 0x002D0000 # Base address offset on flash
>> +Length = 0x00020000 # Length
>> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index b89cea3..b99cda5 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -81,7 +81,6 @@
>> OemAddressMapLib|Platform/Hisilicon/D05/Library/OemAddressMapD05/OemAddressMapD05.inf
>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1616/Library/PlatformSysCtrlLibHi1616/PlatformSysCtrlLibHi1616.inf
>>
>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>> !if $(GENERIC_BDS) == TRUE
>> @@ -130,6 +129,11 @@
>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>> gEfiMdeModulePkgTokenSpaceGuid.PcdHiiOsRuntimeSupport|FALSE
>>
>> +[PcdsDynamicExDefault.common.DEFAULT]
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
>> +
>> [PcdsFixedAtBuild.common]
>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>>
>> @@ -448,6 +452,8 @@
>> Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
>> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>>
>> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>> <LibraryClasses>
>> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>> @@ -564,6 +570,9 @@
>>
>> Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>>
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> +
>> #
>> # FAT filesystem + GPT/MBR partitioning
>> #
>> @@ -635,6 +644,14 @@
>> !else
>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>> !endif
>> +
>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
>> + <LibraryClasses>
>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>> + }
>> +
>> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>> +
>> #
>> # UEFI application (Shell Embedded Boot Loader)
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index d209210..9a61c52 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -297,6 +297,8 @@ READ_LOCK_STATUS = TRUE
>> INF Platform/Hisilicon/D05/Drivers/SasPlatform/SasPlatform.inf
>> INF Platform/Hisilicon/D05/Drivers/Sas/SasDxeDriver.inf
>>
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>> #
>> # Build Shell from latest source code instead of prebuilt binary
>> #
>> @@ -361,12 +363,80 @@ READ_LOCK_STATUS = TRUE
>>
>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>
>> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> +
>> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
>> SECTION FV_IMAGE = FVMAIN
>> }
>> }
>>
>> +[FV.CapsuleDispatchFv]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>> +
>> +[FV.SystemFirmwareUpdateCargo]
>> +FvAlignment = 16
>> +ERASE_POLARITY = 1
>> +MEMORY_MAPPED = TRUE
>> +STICKY_WRITE = TRUE
>> +LOCK_CAP = TRUE
>> +LOCK_STATUS = TRUE
>> +WRITE_DISABLED_CAP = TRUE
>> +WRITE_ENABLED_CAP = TRUE
>> +WRITE_STATUS = TRUE
>> +WRITE_LOCK_CAP = TRUE
>> +WRITE_LOCK_STATUS = TRUE
>> +READ_DISABLED_CAP = TRUE
>> +READ_ENABLED_CAP = TRUE
>> +READ_STATUS = TRUE
>> +READ_LOCK_CAP = TRUE
>> +READ_LOCK_STATUS = TRUE
>> +
>> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
>> + FD = D05
>> + }
>> +
>> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
>> + FV = CapsuleDispatchFv
>> + }
>> +
>> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
>> + Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>> + }
>> +
>> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
>> +IMAGE_HEADER_INIT_VERSION = 0x02
>> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
>> +IMAGE_INDEX = 0x1
>> +HARDWARE_INSTANCE = 0x0
>> +MONOTONIC_COUNT = 0x1
>> +CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
>> +
>> + FV = SystemFirmwareUpdateCargo
>> +
>> +[Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7]
>> +CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
>> +CAPSULE_HEADER_SIZE = 0x20
>> +CAPSULE_HEADER_INIT_VERSION = 0x1
>> +
>> + FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
>>
>> !include Silicon/Hisilicon/Hisilicon.fdf.inc
>>
>> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
>> new file mode 100644
>> index 0000000..465535e
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc
>> @@ -0,0 +1,81 @@
>> +/** @file
>> + System Firmware descriptor.
>> +
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials
>> + are licensed and made available under the terms and conditions of the BSD License
>> + which accompanies this distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <PiPei.h>
>> +#include <Guid/EdkiiSystemFmpCapsule.h>
>> +#include <Protocol/FirmwareManagement.h>
>> +
>> +#define PACKAGE_VERSION 0xFFFFFFFF
>> +#define PACKAGE_VERSION_STRING L"Unknown"
>> +
>> +#define CURRENT_FIRMWARE_VERSION 0x00000002
>> +#define CURRENT_FIRMWARE_VERSION_STRING L"0x00000002"
>> +#define LOWEST_SUPPORTED_FIRMWARE_VERSION 0x00000001
>> +
>> +#define IMAGE_ID SIGNATURE_64('H','W','A', 'R', 'M', '_', 'F', 'd')
>> +#define IMAGE_ID_STRING L"ARMPlatformFd"
>> +
>> +// PcdSystemFmpCapsuleImageTypeIdGuid
>> +#define IMAGE_TYPE_ID_GUID { 0xd34b3d29, 0x0085, 0x4ab3, { 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89 } }
>> +
>> +typedef struct {
>> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR Descriptor;
>> + // real string data
>> + CHAR16 ImageIdNameStr[sizeof(IMAGE_ID_STRING) / sizeof(CHAR16)];
>> + CHAR16 VersionNameStr[sizeof(CURRENT_FIRMWARE_VERSION_STRING) / sizeof(CHAR16)];
>> + CHAR16 PackageVersionNameStr[sizeof(PACKAGE_VERSION_STRING) / sizeof(CHAR16)];
>> +} IMAGE_DESCRIPTOR;
>> +
>> +IMAGE_DESCRIPTOR mImageDescriptor =
>> +{
>> + {
>> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE,
>> + sizeof (EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR),
>> + sizeof (IMAGE_DESCRIPTOR),
>> + PACKAGE_VERSION, // PackageVersion
>> + OFFSET_OF (IMAGE_DESCRIPTOR, PackageVersionNameStr), // PackageVersionName
>> + 1, // ImageIndex;
>> + {0x0}, // Reserved
>> + IMAGE_TYPE_ID_GUID, // ImageTypeId;
>> + IMAGE_ID, // ImageId;
>> + OFFSET_OF (IMAGE_DESCRIPTOR, ImageIdNameStr), // ImageIdName;
>> + CURRENT_FIRMWARE_VERSION, // Version;
>> + OFFSET_OF (IMAGE_DESCRIPTOR, VersionNameStr), // VersionName;
>> + {0x0}, // Reserved2
>> + FixedPcdGet32 (PcdFdSize), // Size;
>> + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
>> + IMAGE_ATTRIBUTE_RESET_REQUIRED |
>> + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
>> + IMAGE_ATTRIBUTE_IN_USE, // AttributesSupported;
>> + IMAGE_ATTRIBUTE_IMAGE_UPDATABLE |
>> + IMAGE_ATTRIBUTE_RESET_REQUIRED |
>> + IMAGE_ATTRIBUTE_AUTHENTICATION_REQUIRED |
>> + IMAGE_ATTRIBUTE_IN_USE, // AttributesSetting;
>> + 0x0, // Compatibilities;
>> + LOWEST_SUPPORTED_FIRMWARE_VERSION, // LowestSupportedImageVersion;
>> + 0x00000000, // LastAttemptVersion;
>> + 0, // LastAttemptStatus;
>> + {0x0}, // Reserved3
>> + 0, // HardwareInstance;
>> + },
>> + // real string data
>> + {IMAGE_ID_STRING},
>> + {CURRENT_FIRMWARE_VERSION_STRING},
>> + {PACKAGE_VERSION_STRING},
>> +};
>> +
>> +VOID* CONST ReferenceAcpiTable = &mImageDescriptor;
>> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> new file mode 100644
>> index 0000000..c38a809
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>> @@ -0,0 +1,50 @@
>> +## @file
>> +# System Firmware descriptor.
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>> + BASE_NAME = SystemFirmwareDescriptor
>> + FILE_GUID = 90B2B846-CA6D-4D6E-A8D3-C140A8E110AC
>> + MODULE_TYPE = PEIM
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = SystemFirmwareDescriptorPeimEntry
>> +
>> +[Sources]
>> + SystemFirmwareDescriptorPei.c
>> + SystemFirmwareDescriptor.aslc
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>> + ArmPlatformPkg/ArmPlatformPkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + SignedCapsulePkg/SignedCapsulePkg.dec
>> +
>> +[LibraryClasses]
>> + DebugLib
>> + PcdLib
>> + PeimEntryPoint
>> + PeiServicesLib
>> +
>> +[FixedPcd]
>> + gArmTokenSpaceGuid.PcdFdSize
>> +
>> +[Pcd]
>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor
>> +
>> +[Depex]
>> + TRUE
>> diff --git a/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
>> new file mode 100644
>> index 0000000..27c0a71
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c
>> @@ -0,0 +1,70 @@
>> +/** @file
>> + System Firmware descriptor producer.
>> +
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials
>> + are licensed and made available under the terms and conditions of the BSD License
>> + which accompanies this distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <PiPei.h>
>> +#include <Guid/EdkiiSystemFmpCapsule.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/PeiServicesLib.h>
>> +#include <Protocol/FirmwareManagement.h>
>> +
>> +/**
>> + Entrypoint for SystemFirmwareDescriptor PEIM.
>> +
>> + @param[in] FileHandle Handle of the file being invoked.
>> + @param[in] PeiServices Describes the list of possible PEI Services.
>> +
>> + @retval EFI_SUCCESS PPI successfully installed.
>> +**/
>> +EFI_STATUS
>> +EFIAPI
>> +SystemFirmwareDescriptorPeimEntry (
>> + IN EFI_PEI_FILE_HANDLE FileHandle,
>> + IN CONST EFI_PEI_SERVICES **PeiServices
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR *Descriptor;
>> + UINTN Size;
>> + UINTN Index;
>> + UINT32 AuthenticationStatus;
>> +
>> + //
>> + // Search RAW section.
>> + //
>> +
>> + Index = 0;
>> + while (TRUE) {
>> + Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Index, FileHandle, (VOID **)&Descriptor, &AuthenticationStatus);
>> + if (EFI_ERROR (Status)) {
>> + // Should not happen, must something wrong in FDF.
>> + DEBUG ((DEBUG_ERROR, "Not found SystemFirmwareDescriptor in fdf !\n"));
>> + return EFI_NOT_FOUND;
>> + }
>> + if (Descriptor->Signature == EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR_SIGNATURE) {
>> + break;
>> + }
>> + Index++;
>> + }
>> +
>> + DEBUG ((DEBUG_INFO, "EDKII_SYSTEM_FIRMWARE_IMAGE_DESCRIPTOR size - 0x%x\n", Descriptor->Length));
>> +
>> + Size = Descriptor->Length;
>> + PcdSetPtrS (PcdEdkiiSystemFirmwareImageDescriptor, &Size, Descriptor);
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Hisilicon.dsc.inc b/Silicon/Hisilicon/Hisilicon.dsc.inc
>> index 308064b..dfa11d1 100644
>> --- a/Silicon/Hisilicon/Hisilicon.dsc.inc
>> +++ b/Silicon/Hisilicon/Hisilicon.dsc.inc
>> @@ -104,6 +104,15 @@
>> ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
>> SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
>>
>> + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeCapsuleLib.inf
>> + OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
>> + IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
>> + BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>> + EdkiiSystemCapsuleLib|SignedCapsulePkg/Library/EdkiiSystemCapsuleLib/EdkiiSystemCapsuleLib.inf
>> + IniParsingLib|SignedCapsulePkg/Library/IniParsingLib/IniParsingLib.inf
>> + PlatformFlashAccessLib|Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>> +
>> #
>> # It is not possible to prevent the ARM compiler for generic intrinsic functions.
>> # This library provides the instrinsic functions generate by a given compiler.
>> @@ -198,7 +207,7 @@
>> HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
>> MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
>> ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>> + CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibFmp/DxeRuntimeCapsuleLib.inf
>> SerialPortLib|Silicon/Hisilicon/Library/Dw8250SerialPortRuntimeLib/Dw8250SerialPortRuntimeLib.inf
>> DebugLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
>>
>> diff --git a/Silicon/Hisilicon/Hisilicon.fdf.inc b/Silicon/Hisilicon/Hisilicon.fdf.inc
>> index ee87cd1..986dd75 100644
>> --- a/Silicon/Hisilicon/Hisilicon.fdf.inc
>> +++ b/Silicon/Hisilicon/Hisilicon.fdf.inc
>> @@ -76,6 +76,15 @@
>> }
>> }
>>
>> +[Rule.Common.PEIM.FMP_IMAGE_DESC]
>> + FILE PEIM = $(NAMED_GUID) {
>> + RAW BIN |.acpi
>> + PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
>> + PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
>> + UI STRING="$(MODULE_NAME)" Optional
>> + VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
>> + }
>> +
>> [Rule.Common.DXE_CORE]
>> FILE DXE_CORE = $(NAMED_GUID) {
>> PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
>> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
>> new file mode 100644
>> index 0000000..db5725d
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c
>> @@ -0,0 +1,106 @@
>> +/** @file
>> + Platform Flash Access library.
>> +
>> + Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> + Copyright (c) 2018, Linaro Limited. All rights reserved.
>> + Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +
>> + This program and the accompanying materials
>> + are licensed and made available under the terms and conditions of the BSD License
>> + which accompanies this distribution. The full text of the license may be found at
>> + http://opensource.org/licenses/bsd-license.php
>> +
>> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +
>> +**/
>> +
>> +#include <PiDxe.h>
>> +#include <Library/BaseLib.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/PcdLib.h>
>> +#include <Library/PlatformFlashAccessLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Protocol/HisiSpiFlashProtocol.h>
>> +
>> +STATIC EFI_PHYSICAL_ADDRESS mInternalFdAddress;
>> +STATIC EFI_PHYSICAL_ADDRESS mSFCMEM0BaseAddress;
>> +
>> +HISI_SPI_FLASH_PROTOCOL *mSpiProtocol;
>
> STATIC
>
>> +
>> +/**
>> + Perform flash write opreation.
>> +
>> + @param[in] FirmwareType The type of firmware.
>> + @param[in] FlashAddress The address of flash device to be accessed.
>> + @param[in] FlashAddressType The type of flash device address.
>> + @param[in] Buffer The pointer to the data buffer.
>> + @param[in] Length The length of data buffer in bytes.
>> +
>> + @retval EFI_SUCCESS The operation returns successfully.
>> + @retval EFI_WRITE_PROTECTED The flash device is read only.
>> + @retval EFI_UNSUPPORTED The flash device access is unsupported.
>> + @retval EFI_INVALID_PARAMETER The input parameter is not valid.
>> +**/
>> +EFI_STATUS
>> +EFIAPI
>> +PerformFlashWrite (
>> + IN PLATFORM_FIRMWARE_TYPE FirmwareType,
>> + IN EFI_PHYSICAL_ADDRESS FlashAddress,
>> + IN FLASH_ADDRESS_TYPE FlashAddressType,
>> + IN VOID *Buffer,
>> + IN UINTN Length
>> + )
>> +{
>> + UINT32 RomAddress;
>> + EFI_STATUS Status;
>> +
>> + DEBUG ((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));
>> +
>
> Line length
>
>> + if (FlashAddressType == FlashAddressTypeAbsoluteAddress) {
>> + FlashAddress = FlashAddress - mInternalFdAddress;
>> + }
>> +
>> + RomAddress = (UINT32)FlashAddress + (mInternalFdAddress - mSFCMEM0BaseAddress);
>> +
>> + DEBUG ((DEBUG_INFO, "Erase and Write Flash Start\n"));
>> +
>> + Status = mSpiProtocol->EraseWrite (mSpiProtocol, (UINT32) RomAddress, (UINT8 *)Buffer, (UINT32) Length);
>
> Line length
>
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Erase and Write Status = %r \n", Status));
>> + }
>> +
>> + return Status;
>> +}
>> +
>> +/**
>> + Platform Flash Access Lib Constructor.
>> +
>> + @param[in] ImageHandle The firmware allocated handle for the EFI image.
>> + @param[in] SystemTable A pointer to the EFI System Table.
>> +
>> + @retval EFI_SUCCESS Constructor returns successfully.
>> +**/
>> +EFI_STATUS
>> +EFIAPI
>> +PerformFlashAccessLibConstructor (
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdFdBaseAddress);
>> +
>> + mSFCMEM0BaseAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) PcdGet64 (PcdSFCMEM0BaseAddress);
>> +
>
> Drop the (UINTN) cast, EFI_PHYSICAL_ADDRESS is always 64 bits.
>
>> + DEBUG ((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x, PcdSFCMEM0BaseAddress - 0x%x \n", mInternalFdAddress, mSFCMEM0BaseAddress));
>> +
>> + Status = gBS->LocateProtocol (&gHisiSpiFlashProtocolGuid, NULL, (VOID **)&mSpiProtocol);
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "LocateProtocol gHisiSpiFlashProtocolGuid Status = %r \n", Status));
>> + }
>> +
>
> Line length
>
>> + return Status;
>> +}
>> diff --git a/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>> new file mode 100644
>> index 0000000..f4533ac
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf
>> @@ -0,0 +1,51 @@
>> +## @file
>> +# Platform Flash Access library.
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +##
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>
> 0x0000001A
>
>> + BASE_NAME = PlatformFlashAccessLibDxe
>> + FILE_GUID = 9168384A-5F66-4CF7-AEB6-845BDEBD3012
>
> Use a fresh GUID
>
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + LIBRARY_CLASS = PlatformFlashAccessLib|DXE_DRIVER
>> + CONSTRUCTOR = PerformFlashAccessLibConstructor
>> +
>> +[Sources]
>> + PlatformFlashAccessLibDxe.c
>> +
>> +[Packages]
>> + ArmPkg/ArmPkg.dec
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + SignedCapsulePkg/SignedCapsulePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[LibraryClasses]
>> + BaseMemoryLib
>> + DebugLib
>> + PcdLib
>> + UefiBootServicesTableLib
>> +
>> +[Protocols]
>> + gHisiSpiFlashProtocolGuid
>> +
>> +[FixedPcd]
>> + gArmTokenSpaceGuid.PcdFdBaseAddress
>> + gHisiTokenSpaceGuid.PcdSFCMEM0BaseAddress
>> +
>> +[Depex]
>> + gHisiSpiFlashProtocolGuid
>> --
>> 1.9.1
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-24 11:10 ` Huangming (Mark)
@ 2018-01-24 11:21 ` Ard Biesheuvel
2018-01-25 0:53 ` Huangming (Mark)
0 siblings, 1 reply; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-24 11:21 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Ming Huang, Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 24 January 2018 at 11:10, Huangming (Mark) <huangming23@huawei.com> wrote:
>
>
> On 2018/1/20 18:50, Ard Biesheuvel wrote:
>> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>>> ---
>>> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>>> Platform/Hisilicon/D03/D03.dsc | 17 +++-
>>> Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
>>> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>>> Platform/Hisilicon/D05/D05.dsc | 19 +++-
>>> Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
>>> Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
>>> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
>>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
>>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
>>> 13 files changed, 641 insertions(+), 3 deletions(-)
>>>
>>
>> Excellent!! Very happy to see this added.
>>
>>> diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>>> new file mode 100644
>>> index 0000000..fc834d9
>>> --- /dev/null
>>> +++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>>> @@ -0,0 +1,45 @@
>>> +#
>>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>>> +#
>>> +# This program and the accompanying materials
>>> +# are licensed and made available under the terms and conditions of the BSD License
>>> +# which accompanies this distribution. The full text of the license may be found at
>>> +# http://opensource.org/licenses/bsd-license.php
>>> +#
>>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>> +#
>>> +##
>>> +
>>> +[Head]
>>> +NumOfUpdate = 3
>>> +NumOfRecovery = 0
>>> +Update0 = SysFvMain
>>> +Update1 = SysCustom
>>> +Update2 = SysNvRam
>>> +
>>> +[SysFvMain]
>>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>>> +BaseAddress = 0x00000000 # Base address offset on flash
>>> +Length = 0x002D0000 # Length
>>> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
>>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>>> +
>>> +[SysCustom]
>>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>>> +BaseAddress = 0x002F0000 # Base address offset on flash
>>> +Length = 0x00010000 # Length
>>> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
>>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>>> +
>>> +[SysNvRam]
>>> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
>>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>>> +BaseAddress = 0x002D0000 # Base address offset on flash
>>> +Length = 0x00020000 # Length
>>> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
>>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>>> index b2eae7d..69bc7b4 100644
>>> --- a/Platform/Hisilicon/D03/D03.dsc
>>> +++ b/Platform/Hisilicon/D03/D03.dsc
>>> @@ -66,7 +66,6 @@
>>> OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
>>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
>>>
>>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>>> !if $(GENERIC_BDS) == TRUE
>>> @@ -117,6 +116,11 @@
>>> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>>>
>>> +[PcdsDynamicExDefault.common.DEFAULT]
>>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
>>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
>>> +
>>> [PcdsFixedAtBuild.common]
>>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>>>
>>> @@ -310,6 +314,8 @@
>>> Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>>> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>>>
>>> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>> +
>>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>>> <LibraryClasses>
>>> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>>> @@ -410,6 +416,9 @@
>>>
>>> Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>>
>>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>>> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>>> +
>>> #
>>> # FAT filesystem + GPT/MBR partitioning
>>> #
>>> @@ -483,6 +492,12 @@
>>> !else
>>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>>> !endif
>>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
>>> + <LibraryClasses>
>>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>>> + }
>>> +
>>> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>>>
>>> #
>>> # UEFI application (Shell Embedded Boot Loader)
>>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>>> index 0d704b5..ffddd2d 100644
>>> --- a/Platform/Hisilicon/D03/D03.fdf
>>> +++ b/Platform/Hisilicon/D03/D03.fdf
>>> @@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE
>>> INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
>>> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>>
>>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>>> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>>> #
>>> # Build Shell from latest source code instead of prebuilt binary
>>> #
>>> @@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE
>>>
>>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>>
>>> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>> +
>>> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
>>> SECTION FV_IMAGE = FVMAIN
>>> }
>>> }
>>>
>>> +[FV.CapsuleDispatchFv]
>>> +FvAlignment = 16
>>> +ERASE_POLARITY = 1
>>> +MEMORY_MAPPED = TRUE
>>> +STICKY_WRITE = TRUE
>>> +LOCK_CAP = TRUE
>>> +LOCK_STATUS = TRUE
>>> +WRITE_DISABLED_CAP = TRUE
>>> +WRITE_ENABLED_CAP = TRUE
>>> +WRITE_STATUS = TRUE
>>> +WRITE_LOCK_CAP = TRUE
>>> +WRITE_LOCK_STATUS = TRUE
>>> +READ_DISABLED_CAP = TRUE
>>> +READ_ENABLED_CAP = TRUE
>>> +READ_STATUS = TRUE
>>> +READ_LOCK_CAP = TRUE
>>> +READ_LOCK_STATUS = TRUE
>>> +
>>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>>> +
>>> +[FV.SystemFirmwareUpdateCargo]
>>> +FvAlignment = 16
>>> +ERASE_POLARITY = 1
>>> +MEMORY_MAPPED = TRUE
>>> +STICKY_WRITE = TRUE
>>> +LOCK_CAP = TRUE
>>> +LOCK_STATUS = TRUE
>>> +WRITE_DISABLED_CAP = TRUE
>>> +WRITE_ENABLED_CAP = TRUE
>>> +WRITE_STATUS = TRUE
>>> +WRITE_LOCK_CAP = TRUE
>>> +WRITE_LOCK_STATUS = TRUE
>>> +READ_DISABLED_CAP = TRUE
>>> +READ_ENABLED_CAP = TRUE
>>> +READ_STATUS = TRUE
>>> +READ_LOCK_CAP = TRUE
>>> +READ_LOCK_STATUS = TRUE
>>> +
>>> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
>>> + FD = D03
>>> + }
>>> +
>>> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
>>> + FV = CapsuleDispatchFv
>>> + }
>>> +
>>> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
>>> + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>>> + }
>>> +
>>> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
>>> +IMAGE_HEADER_INIT_VERSION = 0x02
>>> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
>>
>> Use a fresh GUID here, and make sure you use a different one for D03/D05 etc.
>>
>> This is what identifies the platform when using fwupdmgr etc.
>>
>>
>
> IMAGE_TYPE_ID in D0x.fdf is need to equal to IMAGE_TYPE_ID_GUID in
> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc,
> so D0x is used the same guid.
No. Instead, you need a different version of
SystemFirmwareDescriptor.aslc for D03 and D05, and use different GUIDs
for each.
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code
2018-01-23 14:07 ` Leif Lindholm
@ 2018-01-24 12:31 ` Huangming (Mark)
2018-01-24 13:47 ` Leif Lindholm
0 siblings, 1 reply; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-24 12:31 UTC (permalink / raw)
To: Leif Lindholm, Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, zhangjinsong2, mengfanrong, waip23
On 2018/1/23 22:07, Leif Lindholm wrote:
> On Thu, Jan 18, 2018 at 11:01:35PM +0800, Ming Huang wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> 1. Open driver source code.
>
> Please describe what this driver does.
>
>> 2. This code includes network sequence correction
>> solution.
>
> Which correction?
> Is there an existing bug report somewhere this can refer to?
>
> .
>
Fixed bug:Confusing Ethernet port sequence.
Move the most right Ethernet port (when looking from the front of the chassis)
to the first one in BootManage for PXE boot.
https://bugs.linaro.org/show_bug.cgi?id=2657
Thanks.
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform source code
2018-01-24 12:31 ` Huangming (Mark)
@ 2018-01-24 13:47 ` Leif Lindholm
0 siblings, 0 replies; 72+ messages in thread
From: Leif Lindholm @ 2018-01-24 13:47 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Ming Huang, linaro-uefi, edk2-devel, graeme.gregory,
ard.biesheuvel, guoheyi, wanghuiqiang, zhangjinsong2, mengfanrong,
waip23
On Wed, Jan 24, 2018 at 08:31:38PM +0800, Huangming (Mark) wrote:
> On 2018/1/23 22:07, Leif Lindholm wrote:
> > On Thu, Jan 18, 2018 at 11:01:35PM +0800, Ming Huang wrote:
> >> From: Jason Zhang <zhangjinsong2@huawei.com>
> >>
> >> 1. Open driver source code.
> >
> > Please describe what this driver does.
> >
> >> 2. This code includes network sequence correction
> >> solution.
> >
> > Which correction?
> > Is there an existing bug report somewhere this can refer to?
> >
> > .
> >
>
> Fixed bug:Confusing Ethernet port sequence.
> Move the most right Ethernet port (when looking from the front of the chassis)
> to the first one in BootManage for PXE boot.
> https://bugs.linaro.org/show_bug.cgi?id=2657
Yes, that works - please add in v2.
/
Leif
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-22 13:53 ` Leif Lindholm
2018-01-22 14:15 ` Leif Lindholm
@ 2018-01-24 13:49 ` graeme.gregory
1 sibling, 0 replies; 72+ messages in thread
From: graeme.gregory @ 2018-01-24 13:49 UTC (permalink / raw)
To: Leif Lindholm
Cc: Ming Huang, linaro-uefi, edk2-devel, ard.biesheuvel, guoheyi,
wanghuiqiang, huangming23, zhangjinsong2, mengfanrong, waip23
[-- Attachment #1: Type: text/plain, Size: 34651 bytes --]
On Mon, Jan 22, 2018 at 01:53:18PM +0000, Leif Lindholm wrote:
> Detailed commit description, please.
>
> Graeme - any comments on ACPIness?
>
I think Jeremy probably gave it a much more in depth review than I can
below.
Once he is happy Ill be happy.
Graeme
> On Thu, Jan 18, 2018 at 11:01:30PM +0800, Ming Huang wrote:
> > From: Jason Zhang <zhangjinsong2@huawei.com>
> >
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
> > Signed-off-by: Ming Huang <huangming23@huawei.com>
> > Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
> > ---
> > Platform/Hisilicon/D05/D05.dsc | 1 +
> > Platform/Hisilicon/D05/D05.fdf | 1 +
> > Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
> > Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
> > Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
> > Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
> > Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
> > 7 files changed, 677 insertions(+), 27 deletions(-)
> >
> > diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
> > index 77a89fd..710339c 100644
> > --- a/Platform/Hisilicon/D05/D05.dsc
> > +++ b/Platform/Hisilicon/D05/D05.dsc
> > @@ -506,6 +506,7 @@
> > MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
> >
> > Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> > + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> > Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
> >
> > #
> > diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
> > index 78ab0c8..97de4d2 100644
> > --- a/Platform/Hisilicon/D05/D05.fdf
> > +++ b/Platform/Hisilicon/D05/D05.fdf
> > @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
> > INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
> >
> > INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
> > + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> > INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
> >
> > #
> > diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> > index 808219a..f1927e8 100644
> > --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
> > +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>
> As far as I can tell, all of the changes to this file (and the
> resulting counterpart in
> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc) are
> non-functional.
>
> Please break these changes out as a separate patch.
> This is good cleanup, but unrelated to the stated change.
>
> > @@ -19,6 +19,7 @@
> >
> > #ifndef _HI1610_PLATFORM_H_
> > #define _HI1610_PLATFORM_H_
> > +#include <IndustryStandard/Acpi.h>
> >
> > //
> > // ACPI table information used to initialize tables.
> > @@ -44,5 +45,31 @@
> > }
> >
> > #define HI1616_WATCHDOG_COUNT 2
> > +#define HI1616_GIC_STRUCTURE_COUNT 64
> > +
> > +#define HI1616_MPID_TA_BASE 0x10000
> > +#define HI1616_MPID_TB_BASE 0x30000
> > +#define HI1616_MPID_TA_2_BASE 0x50000
> > +#define HI1616_MPID_TB_2_BASE 0x70000
> > +
> > +// Differs from Juno, we have another affinity level beyond cluster and core
> > +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
> > +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
> > +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
> > +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
> > +
> > +//
> > +// Multiple APIC Description Table
> > +//
> > +#pragma pack (1)
> > +
> > +typedef struct {
> > + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> > + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
> > + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> > + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> > +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> > +
> > +#pragma pack ()
> >
> > #endif
> > diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> > index 169ee72..33dca03 100644
> > --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> > +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
> > @@ -1,9 +1,9 @@
> > /** @file
> > * Multiple APIC Description Table (MADT)
> > *
> > -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
> > -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
> > -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
> > +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
> > +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
> > +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
>
> As mentioned by Ard elsewhere in the series - please only update your
> own copyright dates. (I will not point this out through the rest of
> the review, but please address throughout for v2.)
>
> > *
> > * This program and the accompanying materials
> > *
> > @@ -19,34 +19,11 @@
> > *
> > **/
> >
> > -
> > -#include <IndustryStandard/Acpi.h>
> > +#include "Hi1616Platform.h"
> > #include <Library/AcpiLib.h>
> > #include <Library/AcpiNextLib.h>
> > #include <Library/ArmLib.h>
> > #include <Library/PcdLib.h>
> > -#include "Hi1616Platform.h"
>
> The above modifications are unnecessary.
> - First there is a spurious whitespace deletion.
> - Then there is a deletion of an include of an IndustryStandard header
> file that is provably used later in this scope.
> - Finally there is a (seemingly) spurious move of a local include
> statement.
>
> I understand the thinking behind the latter two, but I prefer the
> clarity of explicitly including <IndustryStandard/Acpi.h> even though
> "Hi1616Platform.h" now pulls it in - so please leave the above
> unchanged.
>
> > -
> > -// Differs from Juno, we have another affinity level beyond cluster and core
> > -// 0x20000 is only for socket 0
> > -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
> > -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
> > -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
> > -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
> > -
> > -//
> > -// Multiple APIC Description Table
> > -//
> > -#pragma pack (1)
> > -
> > -typedef struct {
> > - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
> > - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
> > - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
> > - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
> > -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
> > -
> > -#pragma pack ()
> >
> > EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> > {
> > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> > new file mode 100644
> > index 0000000..eac4736
> > --- /dev/null
> > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
> > @@ -0,0 +1,447 @@
> > +/** @file
> > +*
> > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> > +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>
> Should probably say 2018 by now?
>
> > +*
> > +* This program and the accompanying materials
> > +* are licensed and made available under the terms and conditions of the BSD License
> > +* which accompanies this distribution. The full text of the license may be found at
> > +* http://opensource.org/licenses/bsd-license.php
> > +*
> > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +*
> > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>
> I'm sure it is, but these now reside under
> Platform/ARM/JunoPkg/AcpiTables.
>
> > +*
> > +**/
> > +
> > +#include "Pptt.h"
> > +
> > +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
> > +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
> > +
> > +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
> > + ARM_ACPI_HEADER (
> > + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
> > + EFI_ACPI_DESCRIPTION_HEADER,
> > + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
> > + );
> > +
> > +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
> > +{
> > + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
> > +};
> > +
> > +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
> > +{
> > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
> > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
> > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
> > + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
> > +};
> > +
> > +EFI_STATUS
> > +InitCacheInfo(
> > + )
> > +{
> > + UINT8 Index;
> > + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
> > + CSSELR_DATA CsselrData;
> > + CCSIDR_DATA CcsidrData;
> > +
> > + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
> > + CsselrData.Data = 0;
> > + CcsidrData.Data = 0;
> > + Type1Attributes.Data = 0;
> > +
> > + if (Index == 0) { //L1I
> > + CsselrData.Bits.InD = 1;
> > + CsselrData.Bits.Level = 0;
> > + Type1Attributes.Bits.CacheType = 1;
> > + } else if (Index == 1) {
> > + Type1Attributes.Bits.CacheType = 0;
> > + CsselrData.Bits.Level = Index -1;
> > + } else {
> > + Type1Attributes.Bits.CacheType = 2;
> > + CsselrData.Bits.Level = Index -1;
> > + }
> > +
> > + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
> > +
> > + if (CcsidrData.Bits.Wa == 1) {
> > + Type1Attributes.Bits.AllocateType = 1;
> > + if (CcsidrData.Bits.Ra == 1) {
> > + Type1Attributes.Bits.AllocateType++;
> > + }
> > + }
> > +
> > + if (CcsidrData.Bits.Wt == 1) {
> > + Type1Attributes.Bits.WritePolicy = 1;
> > + }
> > + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
> > +
> > + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
> > + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
> > + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
> > + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
> > + mPpttCacheType1[Index].Associativity * \
> > + mPpttCacheType1[Index].NumberOfSets;
> > + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
> > + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> > + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> > + PPTT_TYPE1_LINE_SIZE_VALID;
> > +
> > + }
> > +
> > + // L3
> > + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
> > + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
> > + PPTT_TYPE1_LINE_SIZE_VALID;
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +EFI_STATUS
> > +AddCoreTable(
> > + IN VOID *PpttTable,
> > + IN OUT VOID *PpttTableLengthRemain,
> > + IN UINT32 Flags,
> > + IN UINT32 Parent,
> > + IN UINT32 ResourceNo,
> > + IN UINT32 ProcessorId
> > + )
> > +{
> > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> > + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> > + UINT32 *PrivateResource;
> > + UINT8 Index;
> > +
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + PpttType0->Type = 0;
> > + PpttType0->Flags = Flags;
> > + PpttType0->Parent= Parent;
> > + PpttType0->AcpiProcessorId = ProcessorId;
> > + PpttType0->PrivateResourceNo = ResourceNo;
> > + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> > +
> > + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> > + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> > +
> > + // Add cache type structure
> > + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> > + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> > + }
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +EFI_STATUS
> > +AddClusterTable (
> > + IN VOID *PpttTable,
> > + IN OUT VOID *PpttTableLengthRemain,
> > + IN UINT32 Flags,
> > + IN UINT32 Parent,
> > + IN UINT32 ResourceNo
> > + )
> > +{
> > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> > + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> > + UINT32 *PrivateResource;
> > +
> > + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + PpttType0->Type = 0;
> > + PpttType0->Flags = Flags;
> > + PpttType0->Parent= Parent;
> > + PpttType0->PrivateResourceNo = ResourceNo;
> > + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> > +
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> > + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> > +
> > + // Add cache type structure
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> > + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +EFI_STATUS
> > +AddScclTable(
> > + IN VOID *PpttTable,
> > + IN OUT VOID *PpttTableLengthRemain,
> > + IN UINT32 Flags,
> > + IN UINT32 Parent,
> > + IN UINT32 ResourceNo
> > + )
> > +{
> > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> > + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
> > + UINT32 *PrivateResource;
> > +
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + PpttType0->Type = 0;
> > + PpttType0->Flags = Flags;
> > + PpttType0->Parent= Parent;
> > + PpttType0->PrivateResourceNo = ResourceNo;
> > + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> > +
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> > + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> > +
> > + // Add cache type structure
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> > + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +EFI_STATUS
> > +AddSocketTable(
> > + IN VOID *PpttTable,
> > + IN OUT VOID *PpttTableLengthRemain,
> > + IN UINT32 Flags,
> > + IN UINT32 Parent,
> > + IN UINT32 ResourceNo
> > + )
> > +{
> > + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
> > + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
> > + UINT32 *PrivateResource;
> > + UINT8 Index;
> > +
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + PpttType0->Type = 0;
> > + PpttType0->Flags = Flags;
> > + PpttType0->Parent= Parent;
> > + PpttType0->PrivateResourceNo = ResourceNo;
> > + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
> > +
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
> > + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
> > + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
> > +
> > + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
> > + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
> > + return EFI_OUT_OF_RESOURCES;
> > + }
> > + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> > + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
> > + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
> > + }
> > +
> > + return EFI_SUCCESS;
> > +}
> > +
> > +VOID
> > +GetApic(
> > +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
> > +VOID *PpttTable,
> > +IN UINT32 PpttTableLengthRemain,
> > +IN UINT32 Index1
> > +)
> > +{
> > + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
> > + UINT32 SocketOffset, ScclOffset, ClusterOffset;
> > + UINT32 Parent = 0;
> > + UINT32 Flags = 0;
> > + UINT32 ResourceNo = 0;
> > + //Get APIC data
> > + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
> > + SocketOffset = 0;
> > + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
> > + ScclOffset = 0;
> > + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
> > + ClusterOffset = 0;
> > + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
> > +
> > + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
> > +
> > + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
> > + //This processor is unusable
> > + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
> > + return;
> > + }
> > + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
> > + //This processor is unusable
> > + Index1++;
> > + continue;
> > + }
> > +
> > + if (SocketOffset == 0) {
> > + //Add socket0 for type0 table
> > + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
> > + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
> > + Parent = 0;
> > + Flags = PPTT_TYPE0_SOCKET_FLAG;
> > + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> > + }
> > + if (ScclOffset == 0) {
> > + //Add socket0die0 for type0 table
> > + ResourceNo = 1;
> > + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> > + Parent = SocketOffset;
> > + Flags = PPTT_TYPE0_DIE_FLAG;
> > + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> > + }
> > + if (ClusterOffset == 0) {
> > + //Add socket0die0ClusterId for type0 table
> > + ResourceNo = 1;
> > + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
> > + Parent = ScclOffset;
> > + Flags = PPTT_TYPE0_CLUSTER_FLAG;
> > + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
> > + }
> > +
> > + //Add socket0die0ClusterIdCoreId for type0 table
> > + ResourceNo = 2;
> > + Parent = ClusterOffset;
> > + Flags = PPTT_TYPE0_CORE_FLAG;
> > + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
> > +
> > + Index1++;
> > + }
> > + }
> > + }
> > + }
> > + return ;
> > +}
> > +
> > +VOID
> > +PpttSetAcpiTable(
> > + IN EFI_EVENT Event,
> > + IN VOID *Context
> > + )
> > +{
> > + UINTN AcpiTableHandle;
> > + EFI_STATUS Status;
> > + UINT8 Checksum;
> > + EFI_ACPI_SDT_HEADER *Table;
> > + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
> > + EFI_ACPI_TABLE_VERSION TableVersion;
> > + VOID *PpttTable;
> > + UINTN TableKey;
> > + UINT32 Index0, Index1;
> > + UINT32 PpttTableLengthRemain = 0;
> > +
> > + gBS->CloseEvent (Event);
> > +
> > + InitCacheInfo ();
> > +
> > + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
> > + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
> > + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
> > +
> > + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
> > + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
> > + if (EFI_ERROR (Status)) {
> > + break;
> > + }
> > + //Find APIC table
> > + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
> > + continue;
> > + }
> > +
> > + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
> > + Index1 = 0;
> > +
> > + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
> > + break;
> > + }
> > +
> > + if (EFI_ERROR (Status)) {
> > + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
> > + }
> > +
> > + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
> > + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
> > +
> > + AcpiTableHandle = 0;
> > + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
> > +
> > + FreePool (PpttTable);
> > + return ;
> > +}
> > +
> > +EFI_STATUS
> > +InitPpttTable(
> > + )
> > +{
> > + EFI_STATUS Status;
> > + EFI_EVENT ReadyToBootEvent;
> > +
> > + Status = EfiCreateEventReadyToBootEx (
> > + TPL_NOTIFY,
> > + PpttSetAcpiTable,
> > + NULL,
> > + &ReadyToBootEvent
> > + );
> > + ASSERT_EFI_ERROR (Status);
> > +
> > + return Status;
> > +}
> > +
> > +EFI_STATUS
> > +EFIAPI
> > +PpttEntryPoint(
> > + IN EFI_HANDLE ImageHandle,
> > + IN EFI_SYSTEM_TABLE *SystemTable
> > + )
> > +{
> > + EFI_STATUS Status;
> > +
> > + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
> > + if (EFI_ERROR (Status)) {
> > + return EFI_ABORTED;
> > + }
> > +
> > + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
> > + if (EFI_ERROR (Status)) {
> > + return EFI_ABORTED;
> > + }
> > +
> > + InitPpttTable ();
> > +
> > + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
> > +
> > + return EFI_SUCCESS;
> > +}
> > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> > new file mode 100644
> > index 0000000..5dc635f
> > --- /dev/null
> > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
> > @@ -0,0 +1,142 @@
> > +/** @file
> > +*
> > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> > +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>
> 2018?
>
> > +*
> > +* This program and the accompanying materials
> > +* are licensed and made available under the terms and conditions of the BSD License
> > +* which accompanies this distribution. The full text of the license may be found at
> > +* http://opensource.org/licenses/bsd-license.php
> > +*
> > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +*
> > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>
> Platform/ARM/JunoPkg/AcpiTables.
>
> > +*
> > +**/
> > +
> > +#ifndef _PPTT_H_
> > +#define _PPTT_H_
> > +
> > +#include <IndustryStandard/Acpi.h>
> > +#include <Library/ArmLib/ArmLibPrivate.h>
> > +#include <Library/BaseMemoryLib.h>
> > +#include <Library/DebugLib.h>
> > +#include <Library/MemoryAllocationLib.h>
> > +#include <Library/UefiBootServicesTableLib.h>
> > +#include <Library/UefiLib.h>
> > +#include <Protocol/AcpiSystemDescriptionTable.h>
> > +#include <Protocol/AcpiTable.h>
> > +#include "../D05AcpiTables/Hi1616Platform.h"
> > +
> > +///
> > +/// "PPTT" Processor Properties Topology Table
> > +///
> > +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
> > +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
> > +#define EFI_ACPI_MAX_NUM_TABLES 20
> > +
> > +#define PPTT_TABLE_MAX_LEN 0x6000
> > +#define PPTT_SOCKET_NO 0x2
> > +#define PPTT_DIE_NO 0x2
> > +#define PPTT_CULSTER_NO 0x4
> > +#define PPTT_CORE_NO 0x4
> > +#define PPTT_SOCKET_COMPONENT_NO 0x1
> > +#define PPTT_CACHE_NO 0x4
> > +
> > +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
> > +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
> > +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
> > +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
> > +#define PPTT_TYPE0_CLUSTER_FLAG 0
> > +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
> > +
> > +#define PPTT_TYPE1_SIZE_VALID BIT0
> > +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
> > +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
> > +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
> > +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
> > +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
> > +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
> > +
> > +typedef union {
> > + struct {
> > + UINT32 InD :1;
> > + UINT32 Level :3;
> > + UINT32 Reserved :28;
> > + } Bits;
> > + UINT32 Data;
> > +}CSSELR_DATA;
> > +
> > +typedef union {
> > + struct {
> > + UINT32 LineSize :3;
> > + UINT32 Associativity :10;
> > + UINT32 NumSets :15;
> > + UINT32 Wa :1;
> > + UINT32 Ra :1;
> > + UINT32 Wb :1;
> > + UINT32 Wt :1;
> > + } Bits;
> > + UINT32 Data;
> > +}CCSIDR_DATA;
> > +
> > +//
> > +// Processor Hierarchy Node Structure
> > +//
> > +typedef struct {
> > + UINT8 Type;
> > + UINT8 Length;
> > + UINT16 Reserved;
> > + UINT32 Flags;
> > + UINT32 Parent;
> > + UINT32 AcpiProcessorId;
> > + UINT32 PrivateResourceNo;
> > +} EFI_ACPI_6_2_PPTT_TYPE0;
> > +
> > +//
> > +// Cache Configuration
> > +//
> > +typedef union {
> > + struct {
> > + UINT8 AllocateType :2;
> > + UINT8 CacheType :2;
> > + UINT8 WritePolicy :1;
> > + UINT8 Reserved :3;
> > + } Bits;
> > + UINT8 Data;
> > +}PPTT_TYPE1_ATTRIBUTES;
> > +
> > +//
> > +// Cache Type Structure
> > +//
> > +typedef struct {
> > + UINT8 Type;
> > + UINT8 Length;
> > + UINT16 Reserved;
> > + UINT32 Flags;
> > + UINT32 NextLevelOfCache;
> > + UINT32 Size;
> > + UINT32 NumberOfSets;
> > + UINT8 Associativity;
> > + UINT8 Attributes;
> > + UINT16 LineSize;
> > +} EFI_ACPI_6_2_PPTT_TYPE1;
> > +
> > +//
> > +// ID Structure
> > +//
> > +typedef struct {
> > + UINT8 Type;
> > + UINT8 Length;
> > + UINT16 Reserved;
> > + UINT32 VendorId;
> > + UINT64 Level1Id;
> > + UINT64 Level2Id;
> > + UINT16 MajorRev;
> > + UINT16 MinorRev;
> > + UINT16 SpinRev;
> > +} EFI_ACPI_6_2_PPTT_TYPE2;
> > +
> > +#endif // _PPTT_H_
> > +
> > diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> > new file mode 100644
> > index 0000000..ce26b97
> > --- /dev/null
> > +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
> > @@ -0,0 +1,55 @@
> > +/** @file
> > +*
> > +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
> > +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>
> 2018?
>
> > +*
> > +* This program and the accompanying materials
> > +* are licensed and made available under the terms and conditions of the BSD License
> > +* which accompanies this distribution. The full text of the license may be found at
> > +* http://opensource.org/licenses/bsd-license.php
> > +*
> > +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> > +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> > +*
> > +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>
> Platform/ARM/JunoPkg/AcpiTables.
>
> > +*
> > +**/
> > +
> > +[Defines]
> > + INF_VERSION = 0x00010005
>
> A new .inf should probably claim 0x00010020.
>
> > + BASE_NAME = AcpiPptt
> > + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
> > + MODULE_TYPE = DXE_DRIVER
> > + VERSION_STRING = 1.0
> > + ENTRY_POINT = PpttEntryPoint
> > +
> > +[Sources.common]
> > + Pptt.c
> > + Pptt.h
> > +
> > +[Packages]
> > + MdePkg/MdePkg.dec
> > + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
>
> This is incorrect - path resolution should be using PACKAGES_PATH and
> refer only to Silicon/Hisilicon/HisiPkg.dec.
>
> > + ArmPkg/ArmPkg.dec
>
> Please sort these alphabetically.
>
> > +
> > +[LibraryClasses]
> > + ArmLib
> > + HobLib
> > + UefiRuntimeServicesTableLib
> > + UefiDriverEntryPoint
> > + BaseMemoryLib
> > + DebugLib
>
> Please sort these alphabetically.
>
> > +
> > +[Guids]
> > +
> > +
> > +[Protocols]
> > + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
> > + gEfiAcpiSdtProtocolGuid
>
> Please sort these alphabetically (where there is not a more logical
> grouping available).
>
> /
> Leif
>
> > +
> > +[Pcd]
> > +
> > +
> > +[Depex]
> > + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
> > +
> > --
> > 1.9.1
> >
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support
2018-01-24 11:21 ` Ard Biesheuvel
@ 2018-01-25 0:53 ` Huangming (Mark)
0 siblings, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-25 0:53 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: Ming Huang, Leif Lindholm, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/24 19:21, Ard Biesheuvel wrote:
> On 24 January 2018 at 11:10, Huangming (Mark) <huangming23@huawei.com> wrote:
>>
>>
>> On 2018/1/20 18:50, Ard Biesheuvel wrote:
>>> On 18 January 2018 at 15:01, Ming Huang <heyi.guo@linaro.org> wrote:
>>>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>>>
>>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>>>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>>>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>>>> ---
>>>> Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>>>> Platform/Hisilicon/D03/D03.dsc | 17 +++-
>>>> Platform/Hisilicon/D03/D03.fdf | 70 +++++++++++++
>>>> Platform/Hisilicon/D05/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini | 45 +++++++++
>>>> Platform/Hisilicon/D05/D05.dsc | 19 +++-
>>>> Platform/Hisilicon/D05/D05.fdf | 70 +++++++++++++
>>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc | 81 +++++++++++++++
>>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf | 50 +++++++++
>>>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c | 70 +++++++++++++
>>>> Silicon/Hisilicon/Hisilicon.dsc.inc | 11 +-
>>>> Silicon/Hisilicon/Hisilicon.fdf.inc | 9 ++
>>>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.c | 106 ++++++++++++++++++++
>>>> Silicon/Hisilicon/Library/PlatformFlashAccessLib/PlatformFlashAccessLibDxe.inf | 51 ++++++++++
>>>> 13 files changed, 641 insertions(+), 3 deletions(-)
>>>>
>>>
>>> Excellent!! Very happy to see this added.
>>>
>>>> diff --git a/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>>>> new file mode 100644
>>>> index 0000000..fc834d9
>>>> --- /dev/null
>>>> +++ b/Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>>>> @@ -0,0 +1,45 @@
>>>> +#
>>>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>>>> +# Copyright (c) 2018, Linaro Limited. All rights reserved.
>>>> +# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
>>>> +#
>>>> +# This program and the accompanying materials
>>>> +# are licensed and made available under the terms and conditions of the BSD License
>>>> +# which accompanies this distribution. The full text of the license may be found at
>>>> +# http://opensource.org/licenses/bsd-license.php
>>>> +#
>>>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>>> +#
>>>> +##
>>>> +
>>>> +[Head]
>>>> +NumOfUpdate = 3
>>>> +NumOfRecovery = 0
>>>> +Update0 = SysFvMain
>>>> +Update1 = SysCustom
>>>> +Update2 = SysNvRam
>>>> +
>>>> +[SysFvMain]
>>>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>>>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>>>> +BaseAddress = 0x00000000 # Base address offset on flash
>>>> +Length = 0x002D0000 # Length
>>>> +ImageOffset = 0x00000000 # Image offset of this SystemFirmware image
>>>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>>>> +
>>>> +[SysCustom]
>>>> +FirmwareType = 0 # 0 - SystemFirmware, 1 - NvRam
>>>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>>>> +BaseAddress = 0x002F0000 # Base address offset on flash
>>>> +Length = 0x00010000 # Length
>>>> +ImageOffset = 0x002F0000 # Image offset of this SystemFirmware image
>>>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>>>> +
>>>> +[SysNvRam]
>>>> +FirmwareType = 1 # 0 - SystemFirmware, 1 - NvRam
>>>> +AddressType = 0 # 0 - relative address, 1 - absolute address.
>>>> +BaseAddress = 0x002D0000 # Base address offset on flash
>>>> +Length = 0x00020000 # Length
>>>> +ImageOffset = 0x002D0000 # Image offset of this SystemFirmware image
>>>> +FileGuid = 642e4fcf-2df7-4415-8b70-a03909c57b55 # PcdEdkiiSystemFirmwareFileGuid
>>>> diff --git a/Platform/Hisilicon/D03/D03.dsc b/Platform/Hisilicon/D03/D03.dsc
>>>> index b2eae7d..69bc7b4 100644
>>>> --- a/Platform/Hisilicon/D03/D03.dsc
>>>> +++ b/Platform/Hisilicon/D03/D03.dsc
>>>> @@ -66,7 +66,6 @@
>>>> OemAddressMapLib|Platform/Hisilicon/D03/Library/OemAddressMap2P/OemAddressMap2PHi1610.inf
>>>> PlatformSysCtrlLib|Silicon/Hisilicon/Hi1610/Library/PlatformSysCtrlLibHi1610/PlatformSysCtrlLibHi1610.inf
>>>>
>>>> - CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
>>>> GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
>>>> PlatformBdsLib|Silicon/Hisilicon/Library/PlatformIntelBdsLib/PlatformIntelBdsLib.inf
>>>> !if $(GENERIC_BDS) == TRUE
>>>> @@ -117,6 +116,11 @@
>>>> gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
>>>> gHisiTokenSpaceGuid.PcdIsItsSupported|TRUE
>>>>
>>>> +[PcdsDynamicExDefault.common.DEFAULT]
>>>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareImageDescriptor|{0x0}|VOID*|0x100
>>>> + gEfiMdeModulePkgTokenSpaceGuid.PcdSystemFmpCapsuleImageTypeIdGuid|{0x29, 0x3d, 0x4b, 0xd3, 0x85, 0x00, 0xb3, 0x4a, 0x8b, 0xe8, 0x84, 0x18, 0x8c, 0xc5, 0x04, 0x89}
>>>> + gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiSystemFirmwareFileGuid|{0xcf, 0x4f, 0x2e, 0x64, 0xf7, 0x2d, 0x15, 0x44, 0x8b, 0x70, 0xa0, 0x39, 0x09, 0xc5, 0x7b, 0x55}
>>>> +
>>>> [PcdsFixedAtBuild.common]
>>>> gArmPlatformTokenSpaceGuid.PcdCoreCount|8
>>>>
>>>> @@ -310,6 +314,8 @@
>>>> Platform/Hisilicon/D03/EarlyConfigPeim/EarlyConfigPeimD03.inf
>>>> Silicon/Hisilicon/Drivers/VersionInfoPeim/VersionInfoPeim.inf
>>>>
>>>> + Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>>> +
>>>> MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
>>>> <LibraryClasses>
>>>> NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
>>>> @@ -410,6 +416,9 @@
>>>>
>>>> Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>>>
>>>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>>>> + MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>>>> +
>>>> #
>>>> # FAT filesystem + GPT/MBR partitioning
>>>> #
>>>> @@ -483,6 +492,12 @@
>>>> !else
>>>> IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
>>>> !endif
>>>> + SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf {
>>>> + <LibraryClasses>
>>>> + FmpAuthenticationLib|SecurityPkg/Library/FmpAuthenticationLibPkcs7/FmpAuthenticationLibPkcs7.inf
>>>> + }
>>>> +
>>>> + MdeModulePkg/Application/CapsuleApp/CapsuleApp.inf
>>>>
>>>> #
>>>> # UEFI application (Shell Embedded Boot Loader)
>>>> diff --git a/Platform/Hisilicon/D03/D03.fdf b/Platform/Hisilicon/D03/D03.fdf
>>>> index 0d704b5..ffddd2d 100644
>>>> --- a/Platform/Hisilicon/D03/D03.fdf
>>>> +++ b/Platform/Hisilicon/D03/D03.fdf
>>>> @@ -275,6 +275,8 @@ READ_LOCK_STATUS = TRUE
>>>> INF Platform/Hisilicon/D03/Drivers/SasPlatform/SasPlatform.inf
>>>> INF Platform/Hisilicon/D03/Drivers/Sas/SasDxeDriver.inf
>>>>
>>>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
>>>> + INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf
>>>> #
>>>> # Build Shell from latest source code instead of prebuilt binary
>>>> #
>>>> @@ -336,12 +338,80 @@ READ_LOCK_STATUS = TRUE
>>>>
>>>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>>>
>>>> + INF RuleOverride = FMP_IMAGE_DESC Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
>>>> +
>>>> FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
>>>> SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
>>>> SECTION FV_IMAGE = FVMAIN
>>>> }
>>>> }
>>>>
>>>> +[FV.CapsuleDispatchFv]
>>>> +FvAlignment = 16
>>>> +ERASE_POLARITY = 1
>>>> +MEMORY_MAPPED = TRUE
>>>> +STICKY_WRITE = TRUE
>>>> +LOCK_CAP = TRUE
>>>> +LOCK_STATUS = TRUE
>>>> +WRITE_DISABLED_CAP = TRUE
>>>> +WRITE_ENABLED_CAP = TRUE
>>>> +WRITE_STATUS = TRUE
>>>> +WRITE_LOCK_CAP = TRUE
>>>> +WRITE_LOCK_STATUS = TRUE
>>>> +READ_DISABLED_CAP = TRUE
>>>> +READ_ENABLED_CAP = TRUE
>>>> +READ_STATUS = TRUE
>>>> +READ_LOCK_CAP = TRUE
>>>> +READ_LOCK_STATUS = TRUE
>>>> +
>>>> + INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
>>>> +
>>>> +[FV.SystemFirmwareUpdateCargo]
>>>> +FvAlignment = 16
>>>> +ERASE_POLARITY = 1
>>>> +MEMORY_MAPPED = TRUE
>>>> +STICKY_WRITE = TRUE
>>>> +LOCK_CAP = TRUE
>>>> +LOCK_STATUS = TRUE
>>>> +WRITE_DISABLED_CAP = TRUE
>>>> +WRITE_ENABLED_CAP = TRUE
>>>> +WRITE_STATUS = TRUE
>>>> +WRITE_LOCK_CAP = TRUE
>>>> +WRITE_LOCK_STATUS = TRUE
>>>> +READ_DISABLED_CAP = TRUE
>>>> +READ_ENABLED_CAP = TRUE
>>>> +READ_STATUS = TRUE
>>>> +READ_LOCK_CAP = TRUE
>>>> +READ_LOCK_STATUS = TRUE
>>>> +
>>>> + FILE RAW = 642e4fcf-2df7-4415-8b70-a03909c57b55 { # PcdEdkiiSystemFirmwareFileGuid
>>>> + FD = D03
>>>> + }
>>>> +
>>>> + FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
>>>> + FV = CapsuleDispatchFv
>>>> + }
>>>> +
>>>> + FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
>>>> + Platform/Hisilicon/D03/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
>>>> + }
>>>> +
>>>> +[FmpPayload.FmpPayloadSystemFirmwarePkcs7]
>>>> +IMAGE_HEADER_INIT_VERSION = 0x02
>>>> +IMAGE_TYPE_ID = d34b3d29-0085-4ab3-8be8-84188cc50489 # PcdSystemFmpCapsuleImageTypeIdGuid
>>>
>>> Use a fresh GUID here, and make sure you use a different one for D03/D05 etc.
>>>
>>> This is what identifies the platform when using fwupdmgr etc.
>>>
>>>
>>
>> IMAGE_TYPE_ID in D0x.fdf is need to equal to IMAGE_TYPE_ID_GUID in
>> Silicon/Hisilicon/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc,
>> so D0x is used the same guid.
>
> No. Instead, you need a different version of
> SystemFirmwareDescriptor.aslc for D03 and D05, and use different GUIDs
> for each.
>
> .
>
OK,I will move the SystemFirmwareDescriptor from Silicon/Hisilicon/Drivers/ to
Platform/Hisilicon/D03/Drivers/and Platform/Hisilicon/D05/Drivers/.
and use different guids for each.
Thanks.
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-23 21:29 ` Jeremy Linton
2018-01-24 7:57 ` Huangming (Mark)
@ 2018-01-25 5:56 ` Huangming (Mark)
2018-01-25 15:27 ` Jeremy Linton
1 sibling, 1 reply; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-25 5:56 UTC (permalink / raw)
To: Jeremy Linton, Ming Huang, leif.lindholm, linaro-uefi, edk2-devel,
graeme.gregory
Cc: ard.biesheuvel, zhangjinsong2, wanghuiqiang, guoheyi, waip23,
mengfanrong
On 2018/1/24 5:29, Jeremy Linton wrote:
> Hi,
>
>
> On 01/18/2018 09:01 AM, Ming Huang wrote:
>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>> ---
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Platform/Hisilicon/D05/D05.fdf | 1 +
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
>> 7 files changed, 677 insertions(+), 27 deletions(-)
>>
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index 77a89fd..710339c 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -506,6 +506,7 @@
>> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> #
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 78ab0c8..97de4d2 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
>> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>> #
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> index 808219a..f1927e8 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>> @@ -19,6 +19,7 @@
>> #ifndef _HI1610_PLATFORM_H_
>> #define _HI1610_PLATFORM_H_
>> +#include <IndustryStandard/Acpi.h>
>> //
>> // ACPI table information used to initialize tables.
>> @@ -44,5 +45,31 @@
>> }
>> #define HI1616_WATCHDOG_COUNT 2
>> +#define HI1616_GIC_STRUCTURE_COUNT 64
>> +
>> +#define HI1616_MPID_TA_BASE 0x10000
>> +#define HI1616_MPID_TB_BASE 0x30000
>> +#define HI1616_MPID_TA_2_BASE 0x50000
>> +#define HI1616_MPID_TB_2_BASE 0x70000
>> +
>> +// Differs from Juno, we have another affinity level beyond cluster and core
>> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
>> +
>> +//
>> +// Multiple APIC Description Table
>> +//
>> +#pragma pack (1)
>> +
>> +typedef struct {
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
>> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> +
>> +#pragma pack ()
>> #endif
>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> index 169ee72..33dca03 100644
>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>> @@ -1,9 +1,9 @@
>> /** @file
>> * Multiple APIC Description Table (MADT)
>> *
>> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
>> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
>> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
>> *
>> * This program and the accompanying materials
>> *
>> @@ -19,34 +19,11 @@
>> *
>> **/
>> -
>> -#include <IndustryStandard/Acpi.h>
>> +#include "Hi1616Platform.h"
>> #include <Library/AcpiLib.h>
>> #include <Library/AcpiNextLib.h>
>> #include <Library/ArmLib.h>
>> #include <Library/PcdLib.h>
>> -#include "Hi1616Platform.h"
>> -
>> -// Differs from Juno, we have another affinity level beyond cluster and core
>> -// 0x20000 is only for socket 0
>> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
>> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
>> -
>> -//
>> -// Multiple APIC Description Table
>> -//
>> -#pragma pack (1)
>> -
>> -typedef struct {
>> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
>> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>> -
>> -#pragma pack ()
>> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
>> {
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> new file mode 100644
>> index 0000000..eac4736
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>> @@ -0,0 +1,447 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#include "Pptt.h"
>> +
>> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
>> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
>> +
>> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
>> + ARM_ACPI_HEADER (
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
>> + EFI_ACPI_DESCRIPTION_HEADER,
>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
>> + );
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
>> +{
>> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
>> +};
>> +
>> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
>> +{
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
>> +};
>> +
>> +EFI_STATUS
>> +InitCacheInfo(
>> + )
>> +{
>> + UINT8 Index;
>> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
>> + CSSELR_DATA CsselrData;
>> + CCSIDR_DATA CcsidrData;
>> +
>> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
>> + CsselrData.Data = 0;
>> + CcsidrData.Data = 0;
>> + Type1Attributes.Data = 0;
>> +
>> + if (Index == 0) { //L1I
>> + CsselrData.Bits.InD = 1;
>> + CsselrData.Bits.Level = 0;
>> + Type1Attributes.Bits.CacheType = 1;
>> + } else if (Index == 1) {
>> + Type1Attributes.Bits.CacheType = 0;
>> + CsselrData.Bits.Level = Index -1;
>> + } else {
>> + Type1Attributes.Bits.CacheType = 2;
>> + CsselrData.Bits.Level = Index -1;
>> + }
>> +
>> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
>> +
>> + if (CcsidrData.Bits.Wa == 1) {
>> + Type1Attributes.Bits.AllocateType = 1;
>> + if (CcsidrData.Bits.Ra == 1) {
>> + Type1Attributes.Bits.AllocateType++;
>> + }
>> + }
>> +
>> + if (CcsidrData.Bits.Wt == 1) {
>> + Type1Attributes.Bits.WritePolicy = 1;
>> + }
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
>> +
>> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
>> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
>> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
>> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
>> + mPpttCacheType1[Index].Associativity * \
>> + mPpttCacheType1[Index].NumberOfSets;
>> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
>> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>> + }
>> +
>> + // L3
>> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>> + PPTT_TYPE1_LINE_SIZE_VALID;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddCoreTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo,
>> + IN UINT32 ProcessorId
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->AcpiProcessorId = ProcessorId;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddClusterTable (
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddScclTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>> + UINT32 *PrivateResource;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> +
>> + // Add cache type structure
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +EFI_STATUS
>> +AddSocketTable(
>> + IN VOID *PpttTable,
>> + IN OUT VOID *PpttTableLengthRemain,
>> + IN UINT32 Flags,
>> + IN UINT32 Parent,
>> + IN UINT32 ResourceNo
>> + )
>> +{
>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
>> + UINT32 *PrivateResource;
>> + UINT8 Index;
>> +
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + PpttType0->Type = 0;
>> + PpttType0->Flags = Flags;
>> + PpttType0->Parent= Parent;
>> + PpttType0->PrivateResourceNo = ResourceNo;
>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>> +
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
>> +
>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
>> + return EFI_OUT_OF_RESOURCES;
>> + }
>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
>> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> +VOID
>> +GetApic(
>> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
>> +VOID *PpttTable,
>> +IN UINT32 PpttTableLengthRemain,
>> +IN UINT32 Index1
>> +)
>> +{
>> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
>> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
>> + UINT32 Parent = 0;
>> + UINT32 Flags = 0;
>> + UINT32 ResourceNo = 0;
>> + //Get APIC data
>> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
>> + SocketOffset = 0;
>> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
>> + ScclOffset = 0;
>> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
>> + ClusterOffset = 0;
>> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
>> +
>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
>> +
>> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
>> + //This processor is unusable
>> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
>> + return;
>> + }
>> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
>> + //This processor is unusable
>> + Index1++;
>> + continue;
>> + }
>> +
>> + if (SocketOffset == 0) {
>> + //Add socket0 for type0 table
>> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
>> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>> + Parent = 0;
>> + Flags = PPTT_TYPE0_SOCKET_FLAG;
>> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ScclOffset == 0) {
>> + //Add socket0die0 for type0 table
>> + ResourceNo = 1;
>> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>> + Parent = SocketOffset;
>> + Flags = PPTT_TYPE0_DIE_FLAG;
>> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> + if (ClusterOffset == 0) {
>> + //Add socket0die0ClusterId for type0 table
>> + ResourceNo = 1;
>> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>> + Parent = ScclOffset;
>> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
>> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>> + }
>> +
>> + //Add socket0die0ClusterIdCoreId for type0 table
>> + ResourceNo = 2;
>> + Parent = ClusterOffset;
>> + Flags = PPTT_TYPE0_CORE_FLAG;
>> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
>> +
>> + Index1++;
>> + }
>> + }
>> + }
>> + }
>> + return ;
>> +}
>> +
>> +VOID
>> +PpttSetAcpiTable(
>> + IN EFI_EVENT Event,
>> + IN VOID *Context
>> + )
>> +{
>> + UINTN AcpiTableHandle;
>> + EFI_STATUS Status;
>> + UINT8 Checksum;
>> + EFI_ACPI_SDT_HEADER *Table;
>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
>> + EFI_ACPI_TABLE_VERSION TableVersion;
>> + VOID *PpttTable;
>> + UINTN TableKey;
>> + UINT32 Index0, Index1;
>> + UINT32 PpttTableLengthRemain = 0;
>> +
>> + gBS->CloseEvent (Event);
>> +
>> + InitCacheInfo ();
>> +
>> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
>> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
>> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
>> +
>> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
>> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
>> + if (EFI_ERROR (Status)) {
>> + break;
>> + }
>> + //Find APIC table
>> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
>> + continue;
>> + }
>> +
>> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
>> + Index1 = 0;
>> +
>> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
>> + break;
>> + }
>> +
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
>> + }
>> +
>> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
>> +
>> + AcpiTableHandle = 0;
>> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
>> +
>> + FreePool (PpttTable);
>> + return ;
>> +}
>> +
>> +EFI_STATUS
>> +InitPpttTable(
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_EVENT ReadyToBootEvent;
>> +
>> + Status = EfiCreateEventReadyToBootEx (
>> + TPL_NOTIFY,
>> + PpttSetAcpiTable,
>> + NULL,
>> + &ReadyToBootEvent
>> + );
>> + ASSERT_EFI_ERROR (Status);
>> +
>> + return Status;
>> +}
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +PpttEntryPoint(
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
>> + if (EFI_ERROR (Status)) {
>> + return EFI_ABORTED;
>> + }
>> +
>> + InitPpttTable ();
>> +
>> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
>> +
>> + return EFI_SUCCESS;
>> +}
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> new file mode 100644
>> index 0000000..5dc635f
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>> @@ -0,0 +1,142 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +#ifndef _PPTT_H_
>> +#define _PPTT_H_
>> +
>> +#include <IndustryStandard/Acpi.h>
>> +#include <Library/ArmLib/ArmLibPrivate.h>
>> +#include <Library/BaseMemoryLib.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/MemoryAllocationLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Library/UefiLib.h>
>> +#include <Protocol/AcpiSystemDescriptionTable.h>
>> +#include <Protocol/AcpiTable.h>
>> +#include "../D05AcpiTables/Hi1616Platform.h"
>> +
>> +///
>> +/// "PPTT" Processor Properties Topology Table
>> +///
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
>> +#define EFI_ACPI_MAX_NUM_TABLES 20
>> +
>> +#define PPTT_TABLE_MAX_LEN 0x6000
>> +#define PPTT_SOCKET_NO 0x2
>> +#define PPTT_DIE_NO 0x2
>> +#define PPTT_CULSTER_NO 0x4
>> +#define PPTT_CORE_NO 0x4
>> +#define PPTT_SOCKET_COMPONENT_NO 0x1
>> +#define PPTT_CACHE_NO 0x4
>> +
>> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
>> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
>> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
>> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
>
> First most of these definitions should be in the common acpi 6.2 header.. I actually have a patch for that sitting around (along with the juno table) but you have basically the same thing here..
>
> For the parts not defined by ACPI I would leave them in this file (SOCKET & DIE flag).
>
> That said, I think DIE_FLAG here should be 0. You will mess up the topology view if you put that on the DIE. Further, while the spec doesn't ban marking every node in the tree with that flag, I'm trying to clarify the spec so it says that the flag can only be set once between a given processor node and the root.
>
> I understand why you probably did this, but it should be under user control (via a HII option). The SRAT domains need to start basically where the die flag is set at the moment. Hopefully in the future we will have an actual flag (that to is in the works) to put here but until that is the case it should default to 0 (unless you allow the user to shift the physical socket from the actual socket to the die). Either way that will be HiSi specific behavior and not in the general header.
>
>
> Thanks,
>
>
I found a difference in Acpi62.h and ACPI 6.2 specification:
Acpi62.h:
///
/// Processor hierarchy node structure
///
typedef struct {
UINT32 Type; // UINT32 ?
UINT8 Length;
...
} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR;
ACPI 6.2 specification:
Table 5-150 Processor Hierarchy Node Structure
Type is UINT8
Which one is right?
Thanks.
>> +#define PPTT_TYPE0_CLUSTER_FLAG 0
>> +#define PPTT_TYPE0_CORE_FLAG PPTT_TYPE0_PROCESSORID_VALID
>> +
>> +#define PPTT_TYPE1_SIZE_VALID BIT0
>> +#define PPTT_TYPE1_NUMBER_OF_SETS_VALID BIT1
>> +#define PPTT_TYPE1_ASSOCIATIVITY_VALID BIT2
>> +#define PPTT_TYPE1_ALLOCATION_TYPE_VALID BIT3
>> +#define PPTT_TYPE1_CACHE_TYPE_VALID BIT4
>> +#define PPTT_TYPE1_WRITE_POLICY_VALID BIT5
>> +#define PPTT_TYPE1_LINE_SIZE_VALID BIT6
>> +
>> +typedef union {
>> + struct {
>> + UINT32 InD :1;
>> + UINT32 Level :3;
>> + UINT32 Reserved :28;
>> + } Bits;
>> + UINT32 Data;
>> +}CSSELR_DATA;
>> +
>> +typedef union {
>> + struct {
>> + UINT32 LineSize :3;
>> + UINT32 Associativity :10;
>> + UINT32 NumSets :15;
>> + UINT32 Wa :1;
>> + UINT32 Ra :1;
>> + UINT32 Wb :1;
>> + UINT32 Wt :1;
>> + } Bits;
>> + UINT32 Data;
>> +}CCSIDR_DATA;
>> +
>> +//
>> +// Processor Hierarchy Node Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 Parent;
>> + UINT32 AcpiProcessorId;
>> + UINT32 PrivateResourceNo;
>> +} EFI_ACPI_6_2_PPTT_TYPE0;
>> +
>> +//
>> +// Cache Configuration
>> +//
>> +typedef union {
>> + struct {
>> + UINT8 AllocateType :2;
>> + UINT8 CacheType :2;
>> + UINT8 WritePolicy :1;
>> + UINT8 Reserved :3;
>> + } Bits;
>> + UINT8 Data;
>> +}PPTT_TYPE1_ATTRIBUTES;
>> +
>> +//
>> +// Cache Type Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 Flags;
>> + UINT32 NextLevelOfCache;
>> + UINT32 Size;
>> + UINT32 NumberOfSets;
>> + UINT8 Associativity;
>> + UINT8 Attributes;
>> + UINT16 LineSize;
>> +} EFI_ACPI_6_2_PPTT_TYPE1;
>> +
>> +//
>> +// ID Structure
>> +//
>> +typedef struct {
>> + UINT8 Type;
>> + UINT8 Length;
>> + UINT16 Reserved;
>> + UINT32 VendorId;
>> + UINT64 Level1Id;
>> + UINT64 Level2Id;
>> + UINT16 MajorRev;
>> + UINT16 MinorRev;
>> + UINT16 SpinRev;
>> +} EFI_ACPI_6_2_PPTT_TYPE2;
>> +
>> +#endif // _PPTT_H_
>> +
>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> new file mode 100644
>> index 0000000..ce26b97
>> --- /dev/null
>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>> @@ -0,0 +1,55 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>> +*
>> +**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x00010005
>> + BASE_NAME = AcpiPptt
>> + FILE_GUID = AAB14F90-DC2E-4f33-A594-C7894A5B412D
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = PpttEntryPoint
>> +
>> +[Sources.common]
>> + Pptt.c
>> + Pptt.h
>> +
>> +[Packages]
>> + MdePkg/MdePkg.dec
>> + edk2-platforms/Silicon/Hisilicon/HisiPkg.dec
>> + ArmPkg/ArmPkg.dec
>> +
>> +[LibraryClasses]
>> + ArmLib
>> + HobLib
>> + UefiRuntimeServicesTableLib
>> + UefiDriverEntryPoint
>> + BaseMemoryLib
>> + DebugLib
>> +
>> +[Guids]
>> +
>> +
>> +[Protocols]
>> + gEfiAcpiTableProtocolGuid # PROTOCOL ALWAYS_CONSUMED
>> + gEfiAcpiSdtProtocolGuid
>> +
>> +[Pcd]
>> +
>> +
>> +[Depex]
>> + gEfiAcpiTableProtocolGuid AND gEfiAcpiSdtProtocolGuid
>> +
>>
>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support
2018-01-25 5:56 ` Huangming (Mark)
@ 2018-01-25 15:27 ` Jeremy Linton
0 siblings, 0 replies; 72+ messages in thread
From: Jeremy Linton @ 2018-01-25 15:27 UTC (permalink / raw)
To: Huangming (Mark), Ming Huang, leif.lindholm, linaro-uefi,
edk2-devel, graeme.gregory
Cc: ard.biesheuvel, zhangjinsong2, wanghuiqiang, guoheyi, waip23,
mengfanrong
Hi,
On 01/24/2018 11:56 PM, Huangming (Mark) wrote:
>
>
> On 2018/1/24 5:29, Jeremy Linton wrote:
>> Hi,
>>
>>
>> On 01/18/2018 09:01 AM, Ming Huang wrote:
>>> From: Jason Zhang <zhangjinsong2@huawei.com>
>>>
>>> Contributed-under: TianoCore Contribution Agreement 1.1
>>> Signed-off-by: Jason Zhang <zhangjinsong2@huawei.com>
>>> Signed-off-by: Ming Huang <huangming23@huawei.com>
>>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>>> ---
>>> Platform/Hisilicon/D05/D05.dsc | 1 +
>>> Platform/Hisilicon/D05/D05.fdf | 1 +
>>> Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h | 27 ++
>>> Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc | 31 +-
>>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.c | 447 ++++++++++++++++++++
>>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.h | 142 +++++++
>>> Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf | 55 +++
>>> 7 files changed, 677 insertions(+), 27 deletions(-)
>>>
>>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>>> index 77a89fd..710339c 100644
>>> --- a/Platform/Hisilicon/D05/D05.dsc
>>> +++ b/Platform/Hisilicon/D05/D05.dsc
>>> @@ -506,6 +506,7 @@
>>> MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
>>> Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>>> + Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>>> Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>> #
>>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>>> index 78ab0c8..97de4d2 100644
>>> --- a/Platform/Hisilicon/D05/D05.fdf
>>> +++ b/Platform/Hisilicon/D05/D05.fdf
>>> @@ -241,6 +241,7 @@ READ_LOCK_STATUS = TRUE
>>> INF Silicon/Hisilicon/Drivers/HisiAcpiPlatformDxe/AcpiPlatformDxe.inf
>>> INF RuleOverride=ACPITABLE Silicon/Hisilicon/Hi1616/D05AcpiTables/AcpiTablesHi1616.inf
>>> + INF Silicon/Hisilicon/Hi1616/Pptt/Pptt.inf
>>> INF Silicon/Hisilicon/Drivers/AcpiPlatformDxe/AcpiPlatformDxe.inf
>>> #
>>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>>> index 808219a..f1927e8 100644
>>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/Hi1616Platform.h
>>> @@ -19,6 +19,7 @@
>>> #ifndef _HI1610_PLATFORM_H_
>>> #define _HI1610_PLATFORM_H_
>>> +#include <IndustryStandard/Acpi.h>
>>> //
>>> // ACPI table information used to initialize tables.
>>> @@ -44,5 +45,31 @@
>>> }
>>> #define HI1616_WATCHDOG_COUNT 2
>>> +#define HI1616_GIC_STRUCTURE_COUNT 64
>>> +
>>> +#define HI1616_MPID_TA_BASE 0x10000
>>> +#define HI1616_MPID_TB_BASE 0x30000
>>> +#define HI1616_MPID_TA_2_BASE 0x50000
>>> +#define HI1616_MPID_TB_2_BASE 0x70000
>>> +
>>> +// Differs from Juno, we have another affinity level beyond cluster and core
>>> +#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (HI1616_MPID_TA_BASE | ((ClusterId) << 8) | (CoreId))
>>> +#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (HI1616_MPID_TB_BASE | ((ClusterId) << 8) | (CoreId))
>>> +#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (HI1616_MPID_TA_2_BASE | ((ClusterId) << 8) | (CoreId))
>>> +#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (HI1616_MPID_TB_2_BASE | ((ClusterId) << 8) | (CoreId))
>>> +
>>> +//
>>> +// Multiple APIC Description Table
>>> +//
>>> +#pragma pack (1)
>>> +
>>> +typedef struct {
>>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>>> + EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[HI1616_GIC_STRUCTURE_COUNT];
>>> + EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>>> + EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>>> +} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>>> +
>>> +#pragma pack ()
>>> #endif
>>> diff --git a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>>> index 169ee72..33dca03 100644
>>> --- a/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>>> +++ b/Silicon/Hisilicon/Hi1616/D05AcpiTables/MadtHi1616.aslc
>>> @@ -1,9 +1,9 @@
>>> /** @file
>>> * Multiple APIC Description Table (MADT)
>>> *
>>> -* Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
>>> -* Copyright (c) 2015 - 2016, Hisilicon Limited. All rights reserved.
>>> -* Copyright (c) 2015 - 2016, Linaro Limited. All rights reserved.
>>> +* Copyright (c) 2012 - 2018, ARM Limited. All rights reserved.
>>> +* Copyright (c) 2015 - 2018, Hisilicon Limited. All rights reserved.
>>> +* Copyright (c) 2015 - 2018, Linaro Limited. All rights reserved.
>>> *
>>> * This program and the accompanying materials
>>> *
>>> @@ -19,34 +19,11 @@
>>> *
>>> **/
>>> -
>>> -#include <IndustryStandard/Acpi.h>
>>> +#include "Hi1616Platform.h"
>>> #include <Library/AcpiLib.h>
>>> #include <Library/AcpiNextLib.h>
>>> #include <Library/ArmLib.h>
>>> #include <Library/PcdLib.h>
>>> -#include "Hi1616Platform.h"
>>> -
>>> -// Differs from Juno, we have another affinity level beyond cluster and core
>>> -// 0x20000 is only for socket 0
>>> -#define PLATFORM_GET_MPID_TA(ClusterId, CoreId) (0x10000 | ((ClusterId) << 8) | (CoreId))
>>> -#define PLATFORM_GET_MPID_TB(ClusterId, CoreId) (0x30000 | ((ClusterId) << 8) | (CoreId))
>>> -#define PLATFORM_GET_MPID_TA_2(ClusterId, CoreId) (0x50000 | ((ClusterId) << 8) | (CoreId))
>>> -#define PLATFORM_GET_MPID_TB_2(ClusterId, CoreId) (0x70000 | ((ClusterId) << 8) | (CoreId))
>>> -
>>> -//
>>> -// Multiple APIC Description Table
>>> -//
>>> -#pragma pack (1)
>>> -
>>> -typedef struct {
>>> - EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header;
>>> - EFI_ACPI_6_1_GIC_STRUCTURE GicInterfaces[64];
>>> - EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE GicDistributor;
>>> - EFI_ACPI_6_1_GIC_ITS_STRUCTURE GicITS[8];
>>> -} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE;
>>> -
>>> -#pragma pack ()
>>> EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
>>> {
>>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>>> new file mode 100644
>>> index 0000000..eac4736
>>> --- /dev/null
>>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.c
>>> @@ -0,0 +1,447 @@
>>> +/** @file
>>> +*
>>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>>> +*
>>> +* This program and the accompanying materials
>>> +* are licensed and made available under the terms and conditions of the BSD License
>>> +* which accompanies this distribution. The full text of the license may be found at
>>> +* http://opensource.org/licenses/bsd-license.php
>>> +*
>>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>> +*
>>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>>> +*
>>> +**/
>>> +
>>> +#include "Pptt.h"
>>> +
>>> +EFI_ACPI_TABLE_PROTOCOL *mAcpiTableProtocol = NULL;
>>> +EFI_ACPI_SDT_PROTOCOL *mAcpiSdtProtocol = NULL;
>>> +
>>> +EFI_ACPI_DESCRIPTION_HEADER mPpttHeader =
>>> + ARM_ACPI_HEADER (
>>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE,
>>> + EFI_ACPI_DESCRIPTION_HEADER,
>>> + EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION
>>> + );
>>> +
>>> +EFI_ACPI_6_2_PPTT_TYPE2 mPpttSocketType2[PPTT_SOCKET_COMPONENT_NO] =
>>> +{
>>> + {2, sizeof(EFI_ACPI_6_2_PPTT_TYPE2), 0, 0, 0, 0, 0, 0, 0}
>>> +};
>>> +
>>> +EFI_ACPI_6_2_PPTT_TYPE1 mPpttCacheType1[PPTT_CACHE_NO] =
>>> +{
>>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1I 48K 0xC000 CacheAssociativity8Way
>>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L1D 32k 0x8000 CacheAssociativity8Way
>>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0, 0, 0, 0, 0}, //L2 1M 0x100000 CacheAssociativity8Way
>>> + {1, sizeof(EFI_ACPI_6_2_PPTT_TYPE1), 0, 0, 0, 0x1000000, 0x2000, 0x10, 0x0A, 0x80} //L3 16M 0x1000000 CacheAssociativity16Way Linesize-128byte
>>> +};
>>> +
>>> +EFI_STATUS
>>> +InitCacheInfo(
>>> + )
>>> +{
>>> + UINT8 Index;
>>> + PPTT_TYPE1_ATTRIBUTES Type1Attributes;
>>> + CSSELR_DATA CsselrData;
>>> + CCSIDR_DATA CcsidrData;
>>> +
>>> + for (Index = 0; Index < PPTT_CACHE_NO - 1; Index++) {
>>> + CsselrData.Data = 0;
>>> + CcsidrData.Data = 0;
>>> + Type1Attributes.Data = 0;
>>> +
>>> + if (Index == 0) { //L1I
>>> + CsselrData.Bits.InD = 1;
>>> + CsselrData.Bits.Level = 0;
>>> + Type1Attributes.Bits.CacheType = 1;
>>> + } else if (Index == 1) {
>>> + Type1Attributes.Bits.CacheType = 0;
>>> + CsselrData.Bits.Level = Index -1;
>>> + } else {
>>> + Type1Attributes.Bits.CacheType = 2;
>>> + CsselrData.Bits.Level = Index -1;
>>> + }
>>> +
>>> + CcsidrData.Data = ReadCCSIDR (CsselrData.Data);
>>> +
>>> + if (CcsidrData.Bits.Wa == 1) {
>>> + Type1Attributes.Bits.AllocateType = 1;
>>> + if (CcsidrData.Bits.Ra == 1) {
>>> + Type1Attributes.Bits.AllocateType++;
>>> + }
>>> + }
>>> +
>>> + if (CcsidrData.Bits.Wt == 1) {
>>> + Type1Attributes.Bits.WritePolicy = 1;
>>> + }
>>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] Level = %x!CcsidrData = %x!\n",CsselrData.Bits.Level, CcsidrData.Data));
>>> +
>>> + mPpttCacheType1[Index].NumberOfSets = (UINT16)CcsidrData.Bits.NumSets + 1;
>>> + mPpttCacheType1[Index].Associativity = (UINT16)CcsidrData.Bits.Associativity + 1;
>>> + mPpttCacheType1[Index].LineSize = (UINT16)( 1 << (CcsidrData.Bits.LineSize + 4));
>>> + mPpttCacheType1[Index].Size = mPpttCacheType1[Index].LineSize * \
>>> + mPpttCacheType1[Index].Associativity * \
>>> + mPpttCacheType1[Index].NumberOfSets;
>>> + mPpttCacheType1[Index].Attributes = Type1Attributes.Data;
>>> + mPpttCacheType1[Index].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>>> + PPTT_TYPE1_LINE_SIZE_VALID;
>>> +
>>> + }
>>> +
>>> + // L3
>>> + mPpttCacheType1[3].Flags = PPTT_TYPE1_SIZE_VALID | PPTT_TYPE1_NUMBER_OF_SETS_VALID | PPTT_TYPE1_ASSOCIATIVITY_VALID | \
>>> + PPTT_TYPE1_ALLOCATION_TYPE_VALID | PPTT_TYPE1_CACHE_TYPE_VALID | PPTT_TYPE1_WRITE_POLICY_VALID | \
>>> + PPTT_TYPE1_LINE_SIZE_VALID;
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +EFI_STATUS
>>> +AddCoreTable(
>>> + IN VOID *PpttTable,
>>> + IN OUT VOID *PpttTableLengthRemain,
>>> + IN UINT32 Flags,
>>> + IN UINT32 Parent,
>>> + IN UINT32 ResourceNo,
>>> + IN UINT32 ProcessorId
>>> + )
>>> +{
>>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>>> + UINT32 *PrivateResource;
>>> + UINT8 Index;
>>> +
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + PpttType0->Type = 0;
>>> + PpttType0->Flags = Flags;
>>> + PpttType0->Parent= Parent;
>>> + PpttType0->AcpiProcessorId = ProcessorId;
>>> + PpttType0->PrivateResourceNo = ResourceNo;
>>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>>> +
>>> + *(UINT32 *)PpttTableLengthRemain -= (UINTN)PpttType0->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>>> +
>>> + // Add cache type structure
>>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>>> + }
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +EFI_STATUS
>>> +AddClusterTable (
>>> + IN VOID *PpttTable,
>>> + IN OUT VOID *PpttTableLengthRemain,
>>> + IN UINT32 Flags,
>>> + IN UINT32 Parent,
>>> + IN UINT32 ResourceNo
>>> + )
>>> +{
>>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>>> + UINT32 *PrivateResource;
>>> +
>>> + if ((*(UINT32 *)PpttTableLengthRemain) < (sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4)) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + PpttType0->Type = 0;
>>> + PpttType0->Flags = Flags;
>>> + PpttType0->Parent= Parent;
>>> + PpttType0->PrivateResourceNo = ResourceNo;
>>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>>> +
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>>> +
>>> + // Add cache type structure
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[2], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +EFI_STATUS
>>> +AddScclTable(
>>> + IN VOID *PpttTable,
>>> + IN OUT VOID *PpttTableLengthRemain,
>>> + IN UINT32 Flags,
>>> + IN UINT32 Parent,
>>> + IN UINT32 ResourceNo
>>> + )
>>> +{
>>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>>> + EFI_ACPI_6_2_PPTT_TYPE1 *PpttType1;
>>> + UINT32 *PrivateResource;
>>> +
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + PpttType0->Type = 0;
>>> + PpttType0->Flags = Flags;
>>> + PpttType0->Parent= Parent;
>>> + PpttType0->PrivateResourceNo = ResourceNo;
>>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>>> +
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>>> +
>>> + // Add cache type structure
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE1)) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>>> + PpttType1 = (EFI_ACPI_6_2_PPTT_TYPE1 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + gBS->CopyMem (PpttType1, &mPpttCacheType1[3], sizeof(EFI_ACPI_6_2_PPTT_TYPE1));
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType1->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType1->Length;
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +EFI_STATUS
>>> +AddSocketTable(
>>> + IN VOID *PpttTable,
>>> + IN OUT VOID *PpttTableLengthRemain,
>>> + IN UINT32 Flags,
>>> + IN UINT32 Parent,
>>> + IN UINT32 ResourceNo
>>> + )
>>> +{
>>> + EFI_ACPI_6_2_PPTT_TYPE0 *PpttType0;
>>> + EFI_ACPI_6_2_PPTT_TYPE2 *PpttType2;
>>> + UINT32 *PrivateResource;
>>> + UINT8 Index;
>>> +
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE0)) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + PpttType0 = (EFI_ACPI_6_2_PPTT_TYPE0 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + PpttType0->Type = 0;
>>> + PpttType0->Flags = Flags;
>>> + PpttType0->Parent= Parent;
>>> + PpttType0->PrivateResourceNo = ResourceNo;
>>> + PpttType0->Length = sizeof(EFI_ACPI_6_2_PPTT_TYPE0) + ResourceNo * 4;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType0->Length;
>>> +
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType0->Length;
>>> + if (*(UINT32 *)PpttTableLengthRemain < ResourceNo * 4) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + PrivateResource = (UINT32 *)((UINT8 *)PpttType0 + sizeof(EFI_ACPI_6_2_PPTT_TYPE0));
>>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] sizeof(EFI_ACPI_6_2_PPTT_TYPE2) = %x!\n", sizeof(EFI_ACPI_6_2_PPTT_TYPE2)));
>>> +
>>> + for (Index = 0; Index < ResourceNo; Index++, PrivateResource++) {
>>> + if (*(UINT32 *)PpttTableLengthRemain < sizeof(EFI_ACPI_6_2_PPTT_TYPE2)) {
>>> + return EFI_OUT_OF_RESOURCES;
>>> + }
>>> + *PrivateResource = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>>> + PpttType2 = (EFI_ACPI_6_2_PPTT_TYPE2 *)(PpttTable + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + gBS->CopyMem (PpttType2, &mPpttSocketType2[Index], sizeof(EFI_ACPI_6_2_PPTT_TYPE2));
>>> + *(UINT32 *)PpttTableLengthRemain -= PpttType2->Length;
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length += PpttType2->Length;
>>> + }
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> +
>>> +VOID
>>> +GetApic(
>>> +EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable,
>>> +VOID *PpttTable,
>>> +IN UINT32 PpttTableLengthRemain,
>>> +IN UINT32 Index1
>>> +)
>>> +{
>>> + UINT32 IndexSocket, IndexSccl, IndexCulster, IndexCore;
>>> + UINT32 SocketOffset, ScclOffset, ClusterOffset;
>>> + UINT32 Parent = 0;
>>> + UINT32 Flags = 0;
>>> + UINT32 ResourceNo = 0;
>>> + //Get APIC data
>>> + for (IndexSocket = 0; IndexSocket < PPTT_SOCKET_NO; IndexSocket++) {
>>> + SocketOffset = 0;
>>> + for (IndexSccl = 0; IndexSccl < PPTT_DIE_NO; IndexSccl++) {
>>> + ScclOffset = 0;
>>> + for (IndexCulster = 0; IndexCulster < PPTT_CULSTER_NO; IndexCulster++) {
>>> + ClusterOffset = 0;
>>> + for (IndexCore = 0; IndexCore < PPTT_CORE_NO; IndexCore++) {
>>> +
>>> + DEBUG ((DEBUG_INFO, "[Acpi PPTT] IndexSocket:%x, IndexSccl:%x, IndexCulster:%x, IndexCore:%x!\n",IndexSocket,IndexSccl ,IndexCulster,IndexCore));
>>> +
>>> + if (ApicTable->GicInterfaces[Index1].AcpiProcessorUid != Index1) {
>>> + //This processor is unusable
>>> + DEBUG ((DEBUG_ERROR, "[Acpi PPTT] Please check MADT table for UID!\n"));
>>> + return;
>>> + }
>>> + if ((ApicTable->GicInterfaces[Index1].Flags & BIT0) == 0 ) {
>>> + //This processor is unusable
>>> + Index1++;
>>> + continue;
>>> + }
>>> +
>>> + if (SocketOffset == 0) {
>>> + //Add socket0 for type0 table
>>> + ResourceNo = PPTT_SOCKET_COMPONENT_NO;
>>> + SocketOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length;
>>> + Parent = 0;
>>> + Flags = PPTT_TYPE0_SOCKET_FLAG;
>>> + AddSocketTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>>> + }
>>> + if (ScclOffset == 0) {
>>> + //Add socket0die0 for type0 table
>>> + ResourceNo = 1;
>>> + ScclOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>>> + Parent = SocketOffset;
>>> + Flags = PPTT_TYPE0_DIE_FLAG;
>>> + AddScclTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>>> + }
>>> + if (ClusterOffset == 0) {
>>> + //Add socket0die0ClusterId for type0 table
>>> + ResourceNo = 1;
>>> + ClusterOffset = ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length ;
>>> + Parent = ScclOffset;
>>> + Flags = PPTT_TYPE0_CLUSTER_FLAG;
>>> + AddClusterTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo);
>>> + }
>>> +
>>> + //Add socket0die0ClusterIdCoreId for type0 table
>>> + ResourceNo = 2;
>>> + Parent = ClusterOffset;
>>> + Flags = PPTT_TYPE0_CORE_FLAG;
>>> + AddCoreTable (PpttTable, &PpttTableLengthRemain, Flags, Parent, ResourceNo, Index1);
>>> +
>>> + Index1++;
>>> + }
>>> + }
>>> + }
>>> + }
>>> + return ;
>>> +}
>>> +
>>> +VOID
>>> +PpttSetAcpiTable(
>>> + IN EFI_EVENT Event,
>>> + IN VOID *Context
>>> + )
>>> +{
>>> + UINTN AcpiTableHandle;
>>> + EFI_STATUS Status;
>>> + UINT8 Checksum;
>>> + EFI_ACPI_SDT_HEADER *Table;
>>> + EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *ApicTable;
>>> + EFI_ACPI_TABLE_VERSION TableVersion;
>>> + VOID *PpttTable;
>>> + UINTN TableKey;
>>> + UINT32 Index0, Index1;
>>> + UINT32 PpttTableLengthRemain = 0;
>>> +
>>> + gBS->CloseEvent (Event);
>>> +
>>> + InitCacheInfo ();
>>> +
>>> + PpttTable = AllocateZeroPool (PPTT_TABLE_MAX_LEN);
>>> + gBS->CopyMem (PpttTable, &mPpttHeader, sizeof(EFI_ACPI_DESCRIPTION_HEADER));
>>> + PpttTableLengthRemain = PPTT_TABLE_MAX_LEN - sizeof(EFI_ACPI_DESCRIPTION_HEADER);
>>> +
>>> + for (Index0 = 0; Index0 < EFI_ACPI_MAX_NUM_TABLES; Index0++) {
>>> + Status = mAcpiSdtProtocol->GetAcpiTable (Index0, &Table, &TableVersion, &TableKey);
>>> + if (EFI_ERROR (Status)) {
>>> + break;
>>> + }
>>> + //Find APIC table
>>> + if (Table->Signature != EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE) {
>>> + continue;
>>> + }
>>> +
>>> + ApicTable = (EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE *)Table;
>>> + Index1 = 0;
>>> +
>>> + GetApic (ApicTable, PpttTable, PpttTableLengthRemain, Index1);
>>> + break;
>>> + }
>>> +
>>> + if (EFI_ERROR (Status)) {
>>> + DEBUG ((DEBUG_ERROR,"%a:%d Status=%r\n",__FILE__,__LINE__,Status));
>>> + }
>>> +
>>> + Checksum = CalculateCheckSum8 ((UINT8 *)(PpttTable), ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length);
>>> + ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Checksum= Checksum;
>>> +
>>> + AcpiTableHandle = 0;
>>> + Status = mAcpiTableProtocol->InstallAcpiTable (mAcpiTableProtocol, PpttTable, ((EFI_ACPI_DESCRIPTION_HEADER *)PpttTable)->Length, &AcpiTableHandle);
>>> +
>>> + FreePool (PpttTable);
>>> + return ;
>>> +}
>>> +
>>> +EFI_STATUS
>>> +InitPpttTable(
>>> + )
>>> +{
>>> + EFI_STATUS Status;
>>> + EFI_EVENT ReadyToBootEvent;
>>> +
>>> + Status = EfiCreateEventReadyToBootEx (
>>> + TPL_NOTIFY,
>>> + PpttSetAcpiTable,
>>> + NULL,
>>> + &ReadyToBootEvent
>>> + );
>>> + ASSERT_EFI_ERROR (Status);
>>> +
>>> + return Status;
>>> +}
>>> +
>>> +EFI_STATUS
>>> +EFIAPI
>>> +PpttEntryPoint(
>>> + IN EFI_HANDLE ImageHandle,
>>> + IN EFI_SYSTEM_TABLE *SystemTable
>>> + )
>>> +{
>>> + EFI_STATUS Status;
>>> +
>>> + Status = gBS->LocateProtocol (&gEfiAcpiTableProtocolGuid, NULL, (VOID**)&mAcpiTableProtocol);
>>> + if (EFI_ERROR (Status)) {
>>> + return EFI_ABORTED;
>>> + }
>>> +
>>> + Status = gBS->LocateProtocol (&gEfiAcpiSdtProtocolGuid, NULL, (VOID**) &mAcpiSdtProtocol);
>>> + if (EFI_ERROR (Status)) {
>>> + return EFI_ABORTED;
>>> + }
>>> +
>>> + InitPpttTable ();
>>> +
>>> + DEBUG ((DEBUG_INFO, "Acpi Pptt init done.\n"));
>>> +
>>> + return EFI_SUCCESS;
>>> +}
>>> diff --git a/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>>> new file mode 100644
>>> index 0000000..5dc635f
>>> --- /dev/null
>>> +++ b/Silicon/Hisilicon/Hi1616/Pptt/Pptt.h
>>> @@ -0,0 +1,142 @@
>>> +/** @file
>>> +*
>>> +* Copyright (c) 2017, Hisilicon Limited. All rights reserved.
>>> +* Copyright (c) 2017, Linaro Limited. All rights reserved.
>>> +*
>>> +* This program and the accompanying materials
>>> +* are licensed and made available under the terms and conditions of the BSD License
>>> +* which accompanies this distribution. The full text of the license may be found at
>>> +* http://opensource.org/licenses/bsd-license.php
>>> +*
>>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>>> +*
>>> +* Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
>>> +*
>>> +**/
>>> +
>>> +#ifndef _PPTT_H_
>>> +#define _PPTT_H_
>>> +
>>> +#include <IndustryStandard/Acpi.h>
>>> +#include <Library/ArmLib/ArmLibPrivate.h>
>>> +#include <Library/BaseMemoryLib.h>
>>> +#include <Library/DebugLib.h>
>>> +#include <Library/MemoryAllocationLib.h>
>>> +#include <Library/UefiBootServicesTableLib.h>
>>> +#include <Library/UefiLib.h>
>>> +#include <Protocol/AcpiSystemDescriptionTable.h>
>>> +#include <Protocol/AcpiTable.h>
>>> +#include "../D05AcpiTables/Hi1616Platform.h"
>>> +
>>> +///
>>> +/// "PPTT" Processor Properties Topology Table
>>> +///
>>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')
>>> +#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01
>>> +#define EFI_ACPI_MAX_NUM_TABLES 20
>>> +
>>> +#define PPTT_TABLE_MAX_LEN 0x6000
>>> +#define PPTT_SOCKET_NO 0x2
>>> +#define PPTT_DIE_NO 0x2
>>> +#define PPTT_CULSTER_NO 0x4
>>> +#define PPTT_CORE_NO 0x4
>>> +#define PPTT_SOCKET_COMPONENT_NO 0x1
>>> +#define PPTT_CACHE_NO 0x4
>>> +
>>> +#define PPTT_TYPE0_PHYSICAL_PKG BIT0
>>> +#define PPTT_TYPE0_PROCESSORID_VALID BIT1
>>> +#define PPTT_TYPE0_SOCKET_FLAG PPTT_TYPE0_PHYSICAL_PKG
>>> +#define PPTT_TYPE0_DIE_FLAG PPTT_TYPE0_PHYSICAL_PKG
>>
>> First most of these definitions should be in the common acpi 6.2 header.. I actually have a patch for that sitting around (along with the juno table) but you have basically the same thing here..
>>
>> For the parts not defined by ACPI I would leave them in this file (SOCKET & DIE flag).
>>
>> That said, I think DIE_FLAG here should be 0. You will mess up the topology view if you put that on the DIE. Further, while the spec doesn't ban marking every node in the tree with that flag, I'm trying to clarify the spec so it says that the flag can only be set once between a given processor node and the root.
>>
>> I understand why you probably did this, but it should be under user control (via a HII option). The SRAT domains need to start basically where the die flag is set at the moment. Hopefully in the future we will have an actual flag (that to is in the works) to put here but until that is the case it should default to 0 (unless you allow the user to shift the physical socket from the actual socket to the die). Either way that will be HiSi specific behavior and not in the general header.
>>
>>
>> Thanks,
>>
>>
>
> I found a difference in Acpi62.h and ACPI 6.2 specification:
> Acpi62.h:
> ///
> /// Processor hierarchy node structure
> ///
> typedef struct {
> UINT32 Type; // UINT32 ?
> UINT8 Length;
> ...
> } EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR;
>
> ACPI 6.2 specification:
> Table 5-150 Processor Hierarchy Node Structure
> Type is UINT8
>
> Which one is right?
That is easy, the specification..
Thanks,
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-23 10:23 ` Leif Lindholm
@ 2018-01-27 1:47 ` Huangming (Mark)
2018-01-27 10:37 ` Ard Biesheuvel
2018-01-29 11:16 ` Leif Lindholm
0 siblings, 2 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-27 1:47 UTC (permalink / raw)
To: Leif Lindholm, Ming Huang
Cc: linaro-uefi, edk2-devel, graeme.gregory, ard.biesheuvel, guoheyi,
wanghuiqiang, zhangjinsong2, mengfanrong, waip23
On 2018/1/23 18:23, Leif Lindholm wrote:
> On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
>> OsBootLib can create OS option after upgrade firmware.
>
> I will respond more strongly that Ard did:
>
> I have seen functionality like this implemented in publicly available
> systems - laptops, desktops.
> Without exception, they end up in bug reports saying "my system
> refuses to boot after installation/upgrade".
> Without exception, they add to existing negative perceptions of UEFI
> in general in certain market spaces.
>
> Presumably this is trying to address a real problem you have faced.
> Please bring this issue to the table for discussion, so that we can
> agree on an appropriate way of resolving it.
>
> Regardless, this code will not be included in 18.02.
>
> /
> Leif
>
> .
>
The problem is that OS boot option is lost after upgrade firmware.
It is inconvenient for using. OsBootLib can help this.
OsBootLib retain the options installed by OS, and create OS boot option
after upgrade firmware if grub file is existed in EFI partition and in mUefiOsBootFiles,
and delete redundant options in the same GPT.
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-27 1:47 ` Huangming (Mark)
@ 2018-01-27 10:37 ` Ard Biesheuvel
2018-01-29 8:55 ` Huangming (Mark)
2018-01-29 11:16 ` Leif Lindholm
1 sibling, 1 reply; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-27 10:37 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Leif Lindholm, Ming Huang, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 27 January 2018 at 01:47, Huangming (Mark) <huangming23@huawei.com> wrote:
>
>
> On 2018/1/23 18:23, Leif Lindholm wrote:
>> On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
>>> OsBootLib can create OS option after upgrade firmware.
>>
>> I will respond more strongly that Ard did:
>>
>> I have seen functionality like this implemented in publicly available
>> systems - laptops, desktops.
>> Without exception, they end up in bug reports saying "my system
>> refuses to boot after installation/upgrade".
>> Without exception, they add to existing negative perceptions of UEFI
>> in general in certain market spaces.
>>
>> Presumably this is trying to address a real problem you have faced.
>> Please bring this issue to the table for discussion, so that we can
>> agree on an appropriate way of resolving it.
>>
>> Regardless, this code will not be included in 18.02.
>>
>> /
>> Leif
>>
>> .
>>
>
> The problem is that OS boot option is lost after upgrade firmware.
Why is that? There is no need to clear the variable store if you
upgrade the executable image. If you fix this issue, you don't need
this patch.
> It is inconvenient for using. OsBootLib can help this.
>
> OsBootLib retain the options installed by OS, and create OS boot option
> after upgrade firmware if grub file is existed in EFI partition and in mUefiOsBootFiles,
> and delete redundant options in the same GPT.
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-27 10:37 ` Ard Biesheuvel
@ 2018-01-29 8:55 ` Huangming (Mark)
2018-01-29 10:19 ` Ard Biesheuvel
0 siblings, 1 reply; 72+ messages in thread
From: Huangming (Mark) @ 2018-01-29 8:55 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: Leif Lindholm, Ming Huang, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 2018/1/27 18:37, Ard Biesheuvel wrote:
> On 27 January 2018 at 01:47, Huangming (Mark) <huangming23@huawei.com> wrote:
>>
>>
>> On 2018/1/23 18:23, Leif Lindholm wrote:
>>> On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
>>>> OsBootLib can create OS option after upgrade firmware.
>>>
>>> I will respond more strongly that Ard did:
>>>
>>> I have seen functionality like this implemented in publicly available
>>> systems - laptops, desktops.
>>> Without exception, they end up in bug reports saying "my system
>>> refuses to boot after installation/upgrade".
>>> Without exception, they add to existing negative perceptions of UEFI
>>> in general in certain market spaces.
>>>
>>> Presumably this is trying to address a real problem you have faced.
>>> Please bring this issue to the table for discussion, so that we can
>>> agree on an appropriate way of resolving it.
>>>
>>> Regardless, this code will not be included in 18.02.
>>>
>>> /
>>> Leif
>>>
>>> .
>>>
>>
>> The problem is that OS boot option is lost after upgrade firmware.
>
> Why is that? There is no need to clear the variable store if you
> upgrade the executable image. If you fix this issue, you don't need
> this patch.
>
Ok, retaining the variable store can solve the problem also.
But retaining the variable store have some issues, like,if the struct stored in
variable is different between new firmware and old firmware, this situation may cause
a problem.
If OsBootLib is not needed for community, It will use for internal project in hisilicon.
Thanks.
>> It is inconvenient for using. OsBootLib can help this.
>>
>> OsBootLib retain the options installed by OS, and create OS boot option
>> after upgrade firmware if grub file is existed in EFI partition and in mUefiOsBootFiles,
>> and delete redundant options in the same GPT.
>>
>
> .
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-29 8:55 ` Huangming (Mark)
@ 2018-01-29 10:19 ` Ard Biesheuvel
0 siblings, 0 replies; 72+ messages in thread
From: Ard Biesheuvel @ 2018-01-29 10:19 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Leif Lindholm, Ming Huang, linaro-uefi, edk2-devel@lists.01.org,
Graeme Gregory, guoheyi, wanghuiqiang, Jason Zhang, Mengfanrong,
waip23
On 29 January 2018 at 08:55, Huangming (Mark) <huangming23@huawei.com> wrote:
>
>
> On 2018/1/27 18:37, Ard Biesheuvel wrote:
>> On 27 January 2018 at 01:47, Huangming (Mark) <huangming23@huawei.com> wrote:
>>>
>>>
>>> On 2018/1/23 18:23, Leif Lindholm wrote:
>>>> On Thu, Jan 18, 2018 at 11:01:42PM +0800, Ming Huang wrote:
>>>>> OsBootLib can create OS option after upgrade firmware.
>>>>
>>>> I will respond more strongly that Ard did:
>>>>
>>>> I have seen functionality like this implemented in publicly available
>>>> systems - laptops, desktops.
>>>> Without exception, they end up in bug reports saying "my system
>>>> refuses to boot after installation/upgrade".
>>>> Without exception, they add to existing negative perceptions of UEFI
>>>> in general in certain market spaces.
>>>>
>>>> Presumably this is trying to address a real problem you have faced.
>>>> Please bring this issue to the table for discussion, so that we can
>>>> agree on an appropriate way of resolving it.
>>>>
>>>> Regardless, this code will not be included in 18.02.
>>>>
>>>> /
>>>> Leif
>>>>
>>>> .
>>>>
>>>
>>> The problem is that OS boot option is lost after upgrade firmware.
>>
>> Why is that? There is no need to clear the variable store if you
>> upgrade the executable image. If you fix this issue, you don't need
>> this patch.
>>
>
> Ok, retaining the variable store can solve the problem also.
> But retaining the variable store have some issues, like,if the struct stored in
> variable is different between new firmware and old firmware, this situation may cause
> a problem.
>
Yes. That means you have to design it with forward compatibility in
mind, i.e., add reserved fields that default to zero, and use zero as
a reasonable default when you add new fields.
> If OsBootLib is not needed for community, It will use for internal project in hisilicon.
>
Well, that is up to you to decide. But I highly recommend not
hardcoding this kind of knowledge into the firmware to begin with.
>
>>> It is inconvenient for using. OsBootLib can help this.
>>>
>>> OsBootLib retain the options installed by OS, and create OS boot option
>>> after upgrade firmware if grub file is existed in EFI partition and in mUefiOsBootFiles,
>>> and delete redundant options in the same GPT.
>>>
>>
>> .
>>
>
> --
> Best Regards,
>
> Ming
>
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-27 1:47 ` Huangming (Mark)
2018-01-27 10:37 ` Ard Biesheuvel
@ 2018-01-29 11:16 ` Leif Lindholm
2018-02-07 21:16 ` Peter Jones
1 sibling, 1 reply; 72+ messages in thread
From: Leif Lindholm @ 2018-01-29 11:16 UTC (permalink / raw)
To: Huangming (Mark)
Cc: Ming Huang, linaro-uefi, edk2-devel, graeme.gregory,
ard.biesheuvel, guoheyi, wanghuiqiang, zhangjinsong2, mengfanrong,
waip23
On Sat, Jan 27, 2018 at 09:47:31AM +0800, Huangming (Mark) wrote:
> The problem is that OS boot option is lost after upgrade firmware.
> It is inconvenient for using. OsBootLib can help this.
>
> OsBootLib retain the options installed by OS, and create OS boot option
> after upgrade firmware if grub file is existed in EFI partition and in mUefiOsBootFiles,
> and delete redundant options in the same GPT.
"Redundant" such as if the user installs a new Linux distribution on
the same system without manually cleaning the ESP?
This type of system behaviour has been seen multiple times to break
installations in the real world.
Note: my main objections here are really with regards to:
1) the expectation that variable store is erased on fw update
2) automatically rewriting boot variables
If (1) was resolved, then I could potentially see a use for a
last-ditch fallback option (but even then, I don't think it should be
enabled by default).
Regards,
Leif
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-01-29 11:16 ` Leif Lindholm
@ 2018-02-07 21:16 ` Peter Jones
2018-02-11 6:03 ` Huangming (Mark)
2018-02-26 1:12 ` Guo Heyi
0 siblings, 2 replies; 72+ messages in thread
From: Peter Jones @ 2018-02-07 21:16 UTC (permalink / raw)
To: Leif Lindholm
Cc: Huangming (Mark), ard.biesheuvel, edk2-devel, zhangjinsong2,
Ming Huang, mengfanrong, linaro-uefi, guoheyi, waip23,
wanghuiqiang
Coming late to the party because Leif called my attention to this
thread...
On Mon, Jan 29, 2018 at 11:16:21AM +0000, Leif Lindholm wrote:
> This type of system behaviour has been seen multiple times to break
> installations in the real world.
I can't agree more; that's why there's a pile of language in 2.6 and
later that says how to do a better job of this.
> Note: my main objections here are really with regards to:
> 1) the expectation that variable store is erased on fw update
> 2) automatically rewriting boot variables
>
> If (1) was resolved, then I could potentially see a use for a
> last-ditch fallback option (but even then, I don't think it should be
> enabled by default).
I certainly agree resolving #1 is the thing to do here, but there is is
actually useful functionality to have in general on the fallback path -
though I don't think this patch implements it in a correct or preferred
way. In particular, it would be better to follow the advice in 3.1.1 of
the UEFI 2.7 spec, where we say that while yes, the firmware is allowed
to do boot order maintenance, it shouldn't remove anything or change the
order itself except in the most dire of circumstances. In particular:
| The firmware should not, under normal operation, automatically remove
| any correctly formed Boot#### variable currently referenced by the
| BootOrder or BootNext variables. Such removal should be limited to
| scenarios where the firmware is guided by direct user interaction.
The right thing to do here is to publish some PlatformRecovery####
variables as specified in 3.4.2, which can be a static list that's the
same every time you boot up, and when there's a failure here BootNext
and BootOrder have been exhausted, proceed according to 3.4.1 and 3.4.2,
which I'll attempt to summarize below.
The PlatformRecovery#### variables here should have device paths that
are something like:
PlatformRecovery0000: File(\EFI\BOOT\BOOTAA64.EFI)
PlatformRecovery0001:
File(\EFI\centos\grubaa64.efi)/EndInstance/File(\EFI\debian\grubaa64.efi)/EndInstance/File(\EFI\GRUB2\GRUBAA64.EFI)/EndInstance/File(\EFI\Microsoft\Boot\bootmgfw.efi)/EndInstance/File(\EFI\redhat\grub.efi)/EndInstance/... etc .../EndEntire
The EFI_OS_INDICATIONS_START_OS_RECOVERY and
EFI_OS_INDICATIONS_START_PLATFORM_RECOVERY bits should be set in
OsIndicationsSupported.
(As an aside, I don't think we've explicitly said that multi-instance
device paths do or don't work in boot variables, so that may require
some work, or if you have a stronger preference about order you could
just make each one its own PlatformRecovery#### variable. For what it's
worth, I don't think that the list in this patch is great - at the least
the arch suffixes should be generated according to what the build target
is, and what you've got currently doesn't correctly match several
shipping OSes - many of which *do* provide a file at
\EFI\BOOT\BOOT${ARCH}.EFI which will fix the BootOrder for you.)
If you supply those static variables, then in the normal boot path, if
you've exhausted BootNext and all of BootOrder, continue according to
chapter 3.4.2 and then 3.4.3 of the spec. That basically says there's a
list of things to try as if they're Boot#### options:
- If OsRecoveryOrder exists, it's a list of GUIDs under which there may
be OsRecovery#### variables. The GUIDs are processed in the order
they're listed, and the OsRecovery#### variables under each GUID are
processed in hexadecimal numerical order.
- PlatformRecovery#### variables are processed in hexadecimal numerical
order if OsRecovery variables are exhausted without successfully
booting anything.
For everything in that list, the variables basically get treated exactly
like Boot#### variables. For each #### variable:
- parse the variable like you'd parse Boot####, and use the normal
discovery method to iterate across any files that match it.
- if so, see if there's a Boot#### that matches that (it isn't
necessarily in BootOrder); if not create one.
- Try to boot it like any other boot entry: set BootCurrent to the
Boot#### number, do LoadImage() and StartImage(), etc. There's no
modification of BootOrder here.
- If the binary there can't be found, loaded, or returns an
error, continue iterating the normal way to see if there are more
matching files, and if there aren't, then proceed to the next
variable.
If you exhaust this list, it's time for an error message and a
menu or something ;)
There are some important characteristics here that we need to maintain:
1) We haven't really talked enough about when it's really okay to
Boot#### entries, because in general removing them is undoing
something that was done on purpose (even if that purpose has been
obviated now.) A pretty good rule is: don't remove Boot#### variables
unless there are dire circumstances, like you've nearly completely
run out of flash. The user or the OS set these for a reason. If you
absolutely must prune them, start with the ones that aren't in
BootOrder or BootNext, and then proceed to the high-numbered ones
that are duplicates of other ones. And even then, only remove until
you're under some known safe storage threshold.
2) Don't change BootOrder ever. The user set that for a reason. If you
absolutely have to change it, append to the end. But you really
don't need to change it unless the user told you to.
3) Don't probe the disk except to try to match a boot entry you're
attempting to boot from. If you need to read a partition table to
match an HD(), that's fine. If you need to read a disk to match a
File(), that's fine. But only when you're trying to boot those
device paths and they require iterating the disks. All probing the
disk accomplishes in other cases is slowing things down and powering
up devices unnecessarily.
--
Peter
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-02-07 21:16 ` Peter Jones
@ 2018-02-11 6:03 ` Huangming (Mark)
2018-02-26 1:12 ` Guo Heyi
1 sibling, 0 replies; 72+ messages in thread
From: Huangming (Mark) @ 2018-02-11 6:03 UTC (permalink / raw)
To: Peter Jones, Leif Lindholm
Cc: ard.biesheuvel, edk2-devel, zhangjinsong2, Ming Huang,
mengfanrong, linaro-uefi, guoheyi, waip23, wanghuiqiang
Thank you for your detailed reply, I will think about your suggestions.
On 2018/2/8 5:16, Peter Jones wrote:
> Coming late to the party because Leif called my attention to this
> thread...
>
> On Mon, Jan 29, 2018 at 11:16:21AM +0000, Leif Lindholm wrote:
>> This type of system behaviour has been seen multiple times to break
>> installations in the real world.
>
> I can't agree more; that's why there's a pile of language in 2.6 and
> later that says how to do a better job of this.
>
>> Note: my main objections here are really with regards to:
>> 1) the expectation that variable store is erased on fw update
>> 2) automatically rewriting boot variables
>>
>> If (1) was resolved, then I could potentially see a use for a
>> last-ditch fallback option (but even then, I don't think it should be
>> enabled by default).
>
> I certainly agree resolving #1 is the thing to do here, but there is is
> actually useful functionality to have in general on the fallback path -
> though I don't think this patch implements it in a correct or preferred
> way. In particular, it would be better to follow the advice in 3.1.1 of
> the UEFI 2.7 spec, where we say that while yes, the firmware is allowed
> to do boot order maintenance, it shouldn't remove anything or change the
> order itself except in the most dire of circumstances. In particular:
>
> | The firmware should not, under normal operation, automatically remove
> | any correctly formed Boot#### variable currently referenced by the
> | BootOrder or BootNext variables. Such removal should be limited to
> | scenarios where the firmware is guided by direct user interaction.
>
> The right thing to do here is to publish some PlatformRecovery####
> variables as specified in 3.4.2, which can be a static list that's the
> same every time you boot up, and when there's a failure here BootNext
> and BootOrder have been exhausted, proceed according to 3.4.1 and 3.4.2,
> which I'll attempt to summarize below.
>
> The PlatformRecovery#### variables here should have device paths that
> are something like:
>
> PlatformRecovery0000: File(\EFI\BOOT\BOOTAA64.EFI)
> PlatformRecovery0001:
> File(\EFI\centos\grubaa64.efi)/EndInstance/File(\EFI\debian\grubaa64.efi)/EndInstance/File(\EFI\GRUB2\GRUBAA64.EFI)/EndInstance/File(\EFI\Microsoft\Boot\bootmgfw.efi)/EndInstance/File(\EFI\redhat\grub.efi)/EndInstance/... etc .../EndEntire
>
> The EFI_OS_INDICATIONS_START_OS_RECOVERY and
> EFI_OS_INDICATIONS_START_PLATFORM_RECOVERY bits should be set in
> OsIndicationsSupported.
>
> (As an aside, I don't think we've explicitly said that multi-instance
> device paths do or don't work in boot variables, so that may require
> some work, or if you have a stronger preference about order you could
> just make each one its own PlatformRecovery#### variable. For what it's
> worth, I don't think that the list in this patch is great - at the least
> the arch suffixes should be generated according to what the build target
> is, and what you've got currently doesn't correctly match several
> shipping OSes - many of which *do* provide a file at
> \EFI\BOOT\BOOT${ARCH}.EFI which will fix the BootOrder for you.)
>
> If you supply those static variables, then in the normal boot path, if
> you've exhausted BootNext and all of BootOrder, continue according to
> chapter 3.4.2 and then 3.4.3 of the spec. That basically says there's a
> list of things to try as if they're Boot#### options:
>
> - If OsRecoveryOrder exists, it's a list of GUIDs under which there may
> be OsRecovery#### variables. The GUIDs are processed in the order
> they're listed, and the OsRecovery#### variables under each GUID are
> processed in hexadecimal numerical order.
> - PlatformRecovery#### variables are processed in hexadecimal numerical
> order if OsRecovery variables are exhausted without successfully
> booting anything.
>
> For everything in that list, the variables basically get treated exactly
> like Boot#### variables. For each #### variable:
> - parse the variable like you'd parse Boot####, and use the normal
> discovery method to iterate across any files that match it.
> - if so, see if there's a Boot#### that matches that (it isn't
> necessarily in BootOrder); if not create one.
> - Try to boot it like any other boot entry: set BootCurrent to the
> Boot#### number, do LoadImage() and StartImage(), etc. There's no
> modification of BootOrder here.
> - If the binary there can't be found, loaded, or returns an
> error, continue iterating the normal way to see if there are more
> matching files, and if there aren't, then proceed to the next
> variable.
>
> If you exhaust this list, it's time for an error message and a
> menu or something ;)
>
> There are some important characteristics here that we need to maintain:
> 1) We haven't really talked enough about when it's really okay to
> Boot#### entries, because in general removing them is undoing
> something that was done on purpose (even if that purpose has been
> obviated now.) A pretty good rule is: don't remove Boot#### variables
> unless there are dire circumstances, like you've nearly completely
> run out of flash. The user or the OS set these for a reason. If you
> absolutely must prune them, start with the ones that aren't in
> BootOrder or BootNext, and then proceed to the high-numbered ones
> that are duplicates of other ones. And even then, only remove until
> you're under some known safe storage threshold.
> 2) Don't change BootOrder ever. The user set that for a reason. If you
> absolutely have to change it, append to the end. But you really
> don't need to change it unless the user told you to.
> 3) Don't probe the disk except to try to match a boot entry you're
> attempting to boot from. If you need to read a partition table to
> match an HD(), that's fine. If you need to read a disk to match a
> File(), that's fine. But only when you're trying to boot those
> device paths and they require iterating the disks. All probing the
> disk accomplishes in other cases is slowing things down and powering
> up devices unnecessarily.
>
--
Best Regards,
Ming
^ permalink raw reply [flat|nested] 72+ messages in thread
* Re: [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib
2018-02-07 21:16 ` Peter Jones
2018-02-11 6:03 ` Huangming (Mark)
@ 2018-02-26 1:12 ` Guo Heyi
1 sibling, 0 replies; 72+ messages in thread
From: Guo Heyi @ 2018-02-26 1:12 UTC (permalink / raw)
To: Peter Jones
Cc: Leif Lindholm, Huangming (Mark), ard.biesheuvel, edk2-devel,
zhangjinsong2, Ming Huang, mengfanrong, linaro-uefi, guoheyi,
waip23, wanghuiqiang
Hi Peter,
Thanks for your detailed explanation. I still have one question:
On normal platforms, there are more boot options created by UEFI other than the
hard disk boot option created by OS installation, like PXE network boot, USB
stick boot, etc. If we use the PlatformRecovery#### method, will UEFI first
try all normal boot options like PXE and USB? If PXE boot environment is always
available, then the system may enter PXE OS installation again, which is not
what we expect.
Thanks and regards,
Gary (Heyi Guo)
On Wed, Feb 07, 2018 at 04:16:55PM -0500, Peter Jones wrote:
> Coming late to the party because Leif called my attention to this
> thread...
>
> On Mon, Jan 29, 2018 at 11:16:21AM +0000, Leif Lindholm wrote:
> > This type of system behaviour has been seen multiple times to break
> > installations in the real world.
>
> I can't agree more; that's why there's a pile of language in 2.6 and
> later that says how to do a better job of this.
>
> > Note: my main objections here are really with regards to:
> > 1) the expectation that variable store is erased on fw update
> > 2) automatically rewriting boot variables
> >
> > If (1) was resolved, then I could potentially see a use for a
> > last-ditch fallback option (but even then, I don't think it should be
> > enabled by default).
>
> I certainly agree resolving #1 is the thing to do here, but there is is
> actually useful functionality to have in general on the fallback path -
> though I don't think this patch implements it in a correct or preferred
> way. In particular, it would be better to follow the advice in 3.1.1 of
> the UEFI 2.7 spec, where we say that while yes, the firmware is allowed
> to do boot order maintenance, it shouldn't remove anything or change the
> order itself except in the most dire of circumstances. In particular:
>
> | The firmware should not, under normal operation, automatically remove
> | any correctly formed Boot#### variable currently referenced by the
> | BootOrder or BootNext variables. Such removal should be limited to
> | scenarios where the firmware is guided by direct user interaction.
>
> The right thing to do here is to publish some PlatformRecovery####
> variables as specified in 3.4.2, which can be a static list that's the
> same every time you boot up, and when there's a failure here BootNext
> and BootOrder have been exhausted, proceed according to 3.4.1 and 3.4.2,
> which I'll attempt to summarize below.
>
> The PlatformRecovery#### variables here should have device paths that
> are something like:
>
> PlatformRecovery0000: File(\EFI\BOOT\BOOTAA64.EFI)
> PlatformRecovery0001:
> File(\EFI\centos\grubaa64.efi)/EndInstance/File(\EFI\debian\grubaa64.efi)/EndInstance/File(\EFI\GRUB2\GRUBAA64.EFI)/EndInstance/File(\EFI\Microsoft\Boot\bootmgfw.efi)/EndInstance/File(\EFI\redhat\grub.efi)/EndInstance/... etc .../EndEntire
>
> The EFI_OS_INDICATIONS_START_OS_RECOVERY and
> EFI_OS_INDICATIONS_START_PLATFORM_RECOVERY bits should be set in
> OsIndicationsSupported.
>
> (As an aside, I don't think we've explicitly said that multi-instance
> device paths do or don't work in boot variables, so that may require
> some work, or if you have a stronger preference about order you could
> just make each one its own PlatformRecovery#### variable. For what it's
> worth, I don't think that the list in this patch is great - at the least
> the arch suffixes should be generated according to what the build target
> is, and what you've got currently doesn't correctly match several
> shipping OSes - many of which *do* provide a file at
> \EFI\BOOT\BOOT${ARCH}.EFI which will fix the BootOrder for you.)
>
> If you supply those static variables, then in the normal boot path, if
> you've exhausted BootNext and all of BootOrder, continue according to
> chapter 3.4.2 and then 3.4.3 of the spec. That basically says there's a
> list of things to try as if they're Boot#### options:
>
> - If OsRecoveryOrder exists, it's a list of GUIDs under which there may
> be OsRecovery#### variables. The GUIDs are processed in the order
> they're listed, and the OsRecovery#### variables under each GUID are
> processed in hexadecimal numerical order.
> - PlatformRecovery#### variables are processed in hexadecimal numerical
> order if OsRecovery variables are exhausted without successfully
> booting anything.
>
> For everything in that list, the variables basically get treated exactly
> like Boot#### variables. For each #### variable:
> - parse the variable like you'd parse Boot####, and use the normal
> discovery method to iterate across any files that match it.
> - if so, see if there's a Boot#### that matches that (it isn't
> necessarily in BootOrder); if not create one.
> - Try to boot it like any other boot entry: set BootCurrent to the
> Boot#### number, do LoadImage() and StartImage(), etc. There's no
> modification of BootOrder here.
> - If the binary there can't be found, loaded, or returns an
> error, continue iterating the normal way to see if there are more
> matching files, and if there aren't, then proceed to the next
> variable.
>
> If you exhaust this list, it's time for an error message and a
> menu or something ;)
>
> There are some important characteristics here that we need to maintain:
> 1) We haven't really talked enough about when it's really okay to
> Boot#### entries, because in general removing them is undoing
> something that was done on purpose (even if that purpose has been
> obviated now.) A pretty good rule is: don't remove Boot#### variables
> unless there are dire circumstances, like you've nearly completely
> run out of flash. The user or the OS set these for a reason. If you
> absolutely must prune them, start with the ones that aren't in
> BootOrder or BootNext, and then proceed to the high-numbered ones
> that are duplicates of other ones. And even then, only remove until
> you're under some known safe storage threshold.
> 2) Don't change BootOrder ever. The user set that for a reason. If you
> absolutely have to change it, append to the end. But you really
> don't need to change it unless the user told you to.
> 3) Don't probe the disk except to try to match a boot entry you're
> attempting to boot from. If you need to read a partition table to
> match an HD(), that's fine. If you need to read a disk to match a
> File(), that's fine. But only when you're trying to boot those
> device paths and they require iterating the disks. All probing the
> disk accomplishes in other cases is slowing things down and powering
> up devices unnecessarily.
>
> --
> Peter
^ permalink raw reply [flat|nested] 72+ messages in thread
end of thread, other threads:[~2018-02-26 1:06 UTC | newest]
Thread overview: 72+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-01-18 15:01 [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Ming Huang
2018-01-18 15:01 ` [PATCH edk2-platforms v1 01/14] Hisilicon/D05: Add PPTT support Ming Huang
2018-01-20 10:16 ` Ard Biesheuvel
2018-01-22 9:16 ` Huangming (Mark)
2018-01-23 6:00 ` Huangming (Mark)
2018-01-22 13:53 ` Leif Lindholm
2018-01-22 14:15 ` Leif Lindholm
2018-01-24 13:49 ` graeme.gregory
2018-01-23 21:29 ` Jeremy Linton
2018-01-24 7:57 ` Huangming (Mark)
2018-01-25 5:56 ` Huangming (Mark)
2018-01-25 15:27 ` Jeremy Linton
2018-01-18 15:01 ` [PATCH edk2-platforms v1 02/14] Hisilicon D03/D05：Switch to Generic BDS driver Ming Huang
2018-01-20 10:27 ` Ard Biesheuvel
2018-01-22 18:38 ` Leif Lindholm
2018-01-23 6:03 ` Huangming (Mark)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 03/14] Hisilicon D03/D05: Optimize the feature of BMC set boot option Ming Huang
2018-01-20 10:41 ` Ard Biesheuvel
2018-01-23 8:28 ` Huangming (Mark)
2018-01-23 10:28 ` Leif Lindholm
2018-01-23 10:51 ` Huangming (Mark)
2018-01-18 15:01 ` [PATCH edk2-platforms v1 04/14] Hisilicon D03/D05: Add capsule upgrade support Ming Huang
2018-01-20 10:50 ` Ard Biesheuvel
2018-01-23 8:53 ` Huangming (Mark)
2018-01-23 9:33 ` Ard Biesheuvel
2018-01-24 11:10 ` Huangming (Mark)
2018-01-24 11:21 ` Ard Biesheuvel
2018-01-25 0:53 ` Huangming (Mark)
2018-01-23 14:06 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 05/14] Hisilicon D03/D05: Open SasPlatform source code Ming Huang
2018-01-20 10:57 ` Ard Biesheuvel
2018-01-23 11:01 ` Huangming (Mark)
2018-01-23 14:04 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 06/14] Hisilicon D03/D05: Open SnpPlatform " Ming Huang
2018-01-20 11:00 ` Ard Biesheuvel
2018-01-23 11:01 ` Huangming (Mark)
2018-01-23 14:07 ` Leif Lindholm
2018-01-24 12:31 ` Huangming (Mark)
2018-01-24 13:47 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 07/14] Hisilicon/Smbios: modify type 4 Ming Huang
2018-01-20 11:01 ` Ard Biesheuvel
2018-01-23 14:15 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 08/14] Hisilicon/PCIe: Disable PCIe ASPM Ming Huang
2018-01-20 11:04 ` Ard Biesheuvel
2018-01-18 15:01 ` [PATCH edk2-platforms v1 09/14] Hisilicon/D05: Replace SP805Watchdog by WatchdogTimer driver Ming Huang
2018-01-20 11:05 ` Ard Biesheuvel
2018-01-23 14:21 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 10/14] Hisilicon/D03: " Ming Huang
2018-01-20 11:05 ` Ard Biesheuvel
2018-01-23 14:21 ` Leif Lindholm
2018-01-18 15:01 ` [PATCH edk2-platforms v1 11/14] Hisilicon/D05/ACPI: Add ITS PXM Ming Huang
2018-01-20 11:06 ` Ard Biesheuvel
2018-01-18 15:01 ` [PATCH edk2-platforms v1 12/14] Hisilicon/D05/ACPI: Add Pcie, HNS and SAS PXM Ming Huang
2018-01-20 11:08 ` Ard Biesheuvel
2018-01-18 15:01 ` [PATCH edk2-platforms v1 13/14] Hisilicon/Library: Add OsBootLib Ming Huang
2018-01-20 11:11 ` Ard Biesheuvel
2018-01-23 10:23 ` Leif Lindholm
2018-01-27 1:47 ` Huangming (Mark)
2018-01-27 10:37 ` Ard Biesheuvel
2018-01-29 8:55 ` Huangming (Mark)
2018-01-29 10:19 ` Ard Biesheuvel
2018-01-29 11:16 ` Leif Lindholm
2018-02-07 21:16 ` Peter Jones
2018-02-11 6:03 ` Huangming (Mark)
2018-02-26 1:12 ` Guo Heyi
2018-01-18 15:01 ` [PATCH edk2-platforms v1 14/14] Hisilicon D03/D05: Update firmware version to 18.02 Ming Huang
2018-01-20 11:11 ` Ard Biesheuvel
2018-01-23 10:18 ` Leif Lindholm
2018-01-24 1:17 ` Huangming (Mark)
2018-01-24 7:54 ` Leif Lindholm
2018-01-22 13:26 ` [PATCH edk2-platforms v1 00/14] Improve D0x platforms and bug fix Leif Lindholm
2018-01-23 14:24 ` Leif Lindholm
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