From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::141; helo=mail-it1-x141.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-it1-x141.google.com (mail-it1-x141.google.com [IPv6:2607:f8b0:4864:20::141]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 35E332118EF74 for ; Thu, 15 Nov 2018 05:08:45 -0800 (PST) Received: by mail-it1-x141.google.com with SMTP id v11so29136184itj.0 for ; Thu, 15 Nov 2018 05:08:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=I1sEMxKid1anN9PrhrI/qCWo5TlpyWY31fboEeepdWU=; b=RPSMMcfqV3VviVp45W0v/Pe5OYV9mm6nJXVSwNk5Jp2Qqlj40ggfrC3Q5dsPvAzL1u 72NDr7KJhQNB2myYCVtvxkzWz01cNpAWQVGtBkCFslT1dNkbZRfrzR6hWhitvXcDUHDR P9J63lEvkhrQPjtkIxt5dofvbbnJr50McJRXM= X-Google-DKIM-Signature: v=1; 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charset="UTF-8" On Wed, 14 Nov 2018 at 14:15, Leif Lindholm wrote: > > On Wed, Nov 07, 2018 at 02:38:37PM +0100, Ard Biesheuvel wrote: > > On 7 November 2018 at 14:13, Ard Biesheuvel wrote: > > > BaseIoLibIntrinsicArmVirt was created to prevent LTO from merging > > > accesses to MMIO regions, resulting in instructions with multiple > > > output registers that KVM on ARM cannot emulate (since the exception > > > syndrome information that KVM relies on can only describe a single > > > output register) > > > > > > However, using double word loads on ARM amounts to the same thing, > > > and so code that relies on doing 64-bit MMIO to regions that are > > > emulated under KVM (such as the GICv3 TYPER register) will still > > > suffer from the original issue. > > > > > > So replace ldrd and strd with equivalent two instruction sequences. > > > > > > Contributed-under: TianoCore Contribution Agreement 1.1 > > > Signed-off-by: Ard Biesheuvel > > > > Please consider this patch with the hunk below appended > > Reviewed-by: Leif Lindholm > Pushed as 9cabe9d45755fa4e7412e4eba7825d0c46982001 > > > --- > > > MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S | 6 ++++-- > > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S > > > index 3ad22bd5706d..0d802d6928d6 100644 > > > --- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S > > > +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.S > > > @@ -125,7 +125,8 @@ ASM_PFX(MmioWrite32Internal): > > > // @return The value read. > > > // > > > ASM_PFX(MmioRead64Internal): > > > - ldrd r0, r1, [r0] > > > + ldr r1, [r0, #4] > > > + ldr r0, [r0] > > > dmb > > > bx lr > > > > > > @@ -141,5 +142,6 @@ ASM_PFX(MmioRead64Internal): > > > // > > > ASM_PFX(MmioWrite64Internal): > > > dmb st > > > - strd r2, r3, [r0] > > > + str r2, [r0] > > > + str r3, [r0, #4] > > > bx lr > > > > diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > > b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > > index e1a3d68a430c..deba8c1f0c59 100644 > > --- a/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > > +++ b/MdePkg/Library/BaseIoLibIntrinsic/Arm/ArmVirtMmio.asm > > @@ -127,7 +127,8 @@ MmioWrite32Internal > > ; @return The value read. > > ; > > MmioRead64Internal > > - ldrd r0, r1, [r0] > > + ldr r1, [r0, #4] > > + ldr r0, [r0] > > dmb > > bx lr > > > > @@ -143,7 +144,8 @@ MmioRead64Internal > > ; > > MmioWrite64Internal > > dmb st > > - strd r2, r3, [r0] > > + str r2, [r0] > > + str r3, [r0, #4] > > bx lr > > > > END